Abstract: Systems and methods are provided for power measurement of signals such that the power measurement is insensitive to PVT variations of the measurement systems. A power measurement system includes an analog squarer circuitry, an integrating ADC, and a controller. The squarer circuitry calculates the power of a signal whose power is to be measured while the integrating ADC integrates the calculated power over a runup interval to generate an integrated power. The squarer circuitry also calculates the power of a reference for the integrating ADC to de-integrate the integrated power over a rundown interval. The power measurements are independent of PVT variations of the analog squarer circuitry and integrating ADC. The controller digitally controls the runup interval and measures the rundown interval to provide digitized power measurements. The analog squarer circuitry have replica squarer circuits. Process dependent mismatches between the replica analog circuitry may be removed through a calibration process.

Abstract: An apparatus and a method select and use parameter values for an RF power amplifier linearizer to pre-distort the input signals of a power amplifier, so as to achieve a linear output response in the power amplifier. The apparatus and the method select from a number sets of parameter values, each set of parameter values corresponding to a different output power range of the power amplifier. The set of parameters include a coefficient vector tailored for the particular output power range for that set. The power amplifier input power is repeatedly measured and filtered at various time intervals. The input power measurements may be filtered by a fast attack/slow decay filter, which follows the peaks of the measurements under operation of the fast attack portion of the filter and provides a low variance during operation of the slow decay portion of the filter.

Abstract: RF predistortion apparatus for making linear the output signal of non-linear components such as RF power amplifiers. The apparatus comprises an RF input line for carrying an RF signal connected to an envelope detector for finding the envelope of the RF signal, a power detector for finding the power of the RF signal and a quadrature modulator. The apparatus also comprises a coefficient vector input line for carrying an input signal that carries one or more coefficients to a digitally controlled analog subsystem (DCAS). The DCAS having circuitry for processing both the output of the envelope detector and the output of the power detector by selecting one or more coefficients from the coefficient vector input line for generating a weighted summation of the power of the RF signal and a weighted summation of the envelope voltage of the RF signal that are output to the quadrature modulator.

Abstract: A performance monitor for generating a digital error signal based upon an RF input signal and an amplified RF output signal is provided.

Abstract: Pre-distortion and memory compensation apparatuses and methods for a non-linear component are provided. The apparatus comprises an adaptive block for generating a plurality of correlation coefficients, which are used to weight a plurality of synthesis work functions to pre-distort a given signal. The adaptive block can be driven by an error signal generated from a feedback signal from the non-linear component output signal and a delayed version of the input signal. The apparatus is capable of being operated directly at radio frequency. Also provided are apparatuses and methods for generation of quadrature signals, transconductance amplification employing negative resistance, variable-gain amplification, and envelope detection.

Abstract: In one embodiment, a signal processor for linearizing a non-linear circuit through pre-distortion of an input signal is provided that includes: a first coupler for extracting a version of the input signal, wherein a remaining portion of the input signal not extracted by the first coupler is provided to a first node; a mixer for multiplying the extracted version of the input signal with a pre-distortion signal to produce an additive signal, the pre-distortion signal having a relatively small or zero constant component such that the additive signal includes either no linear version of the input signal or a linear version of the input signal that has a lower power than the remaining portion of the input signal; and a second coupler to add the additive signal to the remaining portion of the input signal at the first node to form a pre-distorted input signal, whereby if the non-linear circuit processes the pre-distorted input signal to form an output signal, the output signal is a substantially linear function of

Abstract: A mixed-signal adaptive integrated circuit may comprise a primary function circuit, a digitally controlled analog sub-system cooperatively connected with the primary function circuit, and an on-chip signal analyzer. The on-chip signal analyzer may be arranged to analyze RF signals. The signal analyzer may comprise at least one multiplexor for selecting selected RF signals for comparison and analysis, and may comprise a digital signal processor (DSP) for analyzing the selected RF signals and adjusting at least one operational parameter of the digitally controlled analog sub-system responsive to the analysis.

Abstract: A performance optimizing circuit is provided for a signal processing system which is parameterized by a set of coefficients that vary the operational characteristics of the signal processing system. The performance optimizing circuit receives as input a reference signal and an output signal of the signal processing system. The performance optimizing circuit may include (a) a cost computation circuit that receives the reference signal and the output signal and provides as output a cost signal representing a cost function computed using a set of current values for the set of coefficients, the output signal and the reference signal; and (b) a cost optimizer circuit that, at each of a plurality of successive time intervals, evaluates one or more values of the cost signal in the cost computation circuit and provides to the signal processing system a new set of values for the set of coefficients.

Abstract: A pre-distorter is provided for distorting an RF input signal to provide a pre-distorted radio frequency (RF) input signal to an amplifier that provides an amplified RF output signal, wherein the RF input signal has an envelope. The pre-distorter includes: a radio-frequency signal processing circuit that distorts the RF input signal according to a polynomial of powers of the envelope, each power of the envelope being weighted by a corresponding pre-distortion weight; and a performance monitor operable to compare a version of the amplified RF output signal to a delayed version of the RF input signal to provide an error signal, wherein the performance monitor is configured to iteratively adapt the coefficients based upon a gradient of a cost function, the cost function being a function of the error signal.

Abstract: Systems and methods provide analog delay elements, which may be utilized in isolation or in a cascade, such as for use within equalizers or other types of applications. For example, a delay element may include a broadband amplifier and a passive, programmable filter, which may provide a desired magnitude and group delay response over a wide frequency range while being tolerant of process variations. An equalizer, for example, may include the delay element within its feed forward filter and/or within its other circuits, such as within its adaptive coefficient generator or slicer input time-align circuit.

Abstract: A high-order harmonics generator includes a plurality of high-pass filters to block out DC signals. In one embodiment, high-pass filters are coupled to the output signals from an envelope detector and a power detector. A high-pass filter can also be coupled to the output of a multiplier that multiplies the filtered envelope signal and the filtered power signal. Additional multipliers may also be used at outputs of multipliers in a cascaded chain of multipliers for higher harmonics generation.

Abstract: An RF squarer circuit comprises a first RF multiplier and a first variable gain transimpedance amplifier (TIA). The first RF multiplier receives an RF input signal RFIN and provides a first output current. The first TIA receives the first output current as an input. The first TIA provides an output voltage VOUT.

Abstract: Pre-distortion and memory compensation apparatuses and methods for a non-linear component are provided. The apparatus comprises an adaptive block for generating a plurality of correlation coefficients, which are used to weight a plurality of synthesis work functions to pre-distort a given signal. The adaptive block can be driven by an error signal generated from a feedback signal from the non-linear component output signal and a delayed version of the input signal. The apparatus is capable of being operated directly at radio frequency. Also provided are apparatuses and methods for generation of quadrature signals, transconductance amplification employing negative resistance, variable-gain amplification, and envelope detection.

Abstract: Pre-distortion apparatuses and methods for a non-linear component are provided. The apparatus comprises an adaptive block for generating a plurality of correlation coefficients, which are used to weight a plurality of synthesis work functions to pre-distort a given signal. The adaptive block can be driven by an error signal generated from a feedback signal from the non-linear component output signal and a delayed version of the input signal. The apparatus is capable of being operated directly at radio frequency. Also provided are apparatuses and methods for generation of quadrature signals, transconductance amplification employing negative resistance, variable-gain amplification, and envelope detection.

Abstract: A polynomial generator and memory compensator module is provided that includes: a first bank of delay filters for generating current and delayed versions of the envelope for an RF input signal and for the square of the envelope, a polynomial generator for generating polynomials using the current and delayed versions of the envelope, each polynomial being weighted according to pre-distortion weights; an adder for adding the polynomials to provide a pre-distortion signal for pre-distorting the RF input signal to provide a pre-distorted RF input signal such that a power amplifier amplifying the pre-distorted RF input signal provides an amplified RF output signal that reduces a non-linearity of the power amplifier; and a second bank of delay filters for generating delayed versions of the output signal, wherein the adder further adds the delayed versions of the output signal to the polynomials to provide the pre-distortion signal.

Abstract: An apparatus and method for adaptively introducing a compensating signal latency related to a signal latency of a data symbol decision circuit. Adaptive timing control circuitry, including an interpolating mixer implemented as a tapped delay line with correlated tap coefficients, introduces a latency adaptively and substantially matching the latency of the data decision circuit for use within an adaptive equalizer, thereby minimizing the mean-squared error of such decision circuit. This adaptive latency is used in generating the feedback error signal which, in turn, can be used by the feedforward equalizer for dynamically adjusting its adaptive filter tap coefficients.

Abstract: Systems and methods provide multi-use input/output (I/O) pads for an integrated circuit. For example in accordance with an embodiment, the multi-use pads may be shared to support different integrated circuit functions via the pads, such as selectively for high-speed signaling or general I/O.

Abstract: A continuous time equalizer for equalizing an input signal using a feedforward equalizer portion and a feedback equalizer portion is provided that includes: a slicer operable to make bit decisions on a combined output from the feedforward and feedback equalizer portions; an adaptive delay circuit operable to delay the combined output to form a delayed output; and a controller operable to control the delay provided by the adaptive delay circuit such that a first group delay through the slicer and a second group delay through the adaptive delay circuit in response to a sinusoidal form of the input signal are substantially equal.

Abstract: Systems and methods are disclosed to adaptively generate coefficients for continuous time least mean square error equalizers and to correct offset in high-gain amplifiers. An adaptive coefficient generator includes a bank of individual coefficient generators, each utilizing a first adaptive correction signal for a first correction and a second adaptive correction signal for a second more precise correction. The adaptive correction signals for offset correction can be a current or voltage. The first adaptive correction signal is set by maintaining the second adaptive correction signal constant, such as setting it to zero, and adjusting the first signal until the magnitude of the coefficient is minimized. The second adaptive correction signal is then set by maintaining the first adaptive correction signal at its set value by adjusting the second signal until the magnitude of the coefficient is again minimized.

Abstract: A decision feedback equalizer with dynamic feedback control for use in an adaptive signal equalizer. Timing within the decision feedback loop is dynamically controlled to optimize recovery of the data signal by the output signal slicer. The dynamic timing is controlled by a signal formed as a combination of feedback and feedforward signals. The feedback signal is an error signal related to a difference between pre-slicer and post-slicer signals. The feedforward signal is formed by differentiating and delaying the incoming data signal.