Patents Assigned to Semiconductor Energy Laboratory Co., Ltd.
  • Publication number: 20240023423
    Abstract: A light-emitting element which includes a plurality of light-emitting layers between a pair of electrodes and has low driving voltage and high emission efficiency is provided. A light-emitting element including first to third light-emitting layers between a cathode and an anode is provided. The first light-emitting layer includes a first phosphorescent material and a first electron-transport material; the second light-emitting layer includes a second phosphorescent material and a second electron-transport material; the third light-emitting layer includes a fluorescent material and a third electron-transport material; the first to third light-emitting elements are provided in contact with an electron-transport layer positioned on a cathode side; and a triplet excitation energy level of a material included in the electron-transport layer is lower than triplet excitation energy levels of the first electron-transport material and the second electron-transport material.
    Type: Application
    Filed: June 29, 2023
    Publication date: January 18, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tsunenori Suzuki, Naoaki Hashimoto, Eriko Sauo, Satoshi Seo
  • Patent number: 11876098
    Abstract: A display device capable of improving image quality is provided. A storage node is provided in each pixel and first data can be held in the storage node. Second data is added to the first data by capacitive coupling, which can be supplied to a display element. Thus, the display device can display a corrected image. A reference potential for the capacitive coupling operation is supplied from a power supply line or the like, and thus the first data and the second data can be supplied from a common signal line.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: January 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Susumu Kawashima, Naoto Kusumoto
  • Patent number: 11875838
    Abstract: A memory device with shortened access time in data reading is provided. The memory device includes a first layer and a second layer positioned above the first layer, the first layer includes a reading circuit, and the second layer includes a first memory cell and a second memory cell. The reading circuit includes a Si transistor. The first memory cell and the second memory cell each include an OS transistor. The first memory cell is electrically connected to the reading circuit, and the second memory cell is electrically connected to the reading circuit. When a first current corresponding to first data retained in the first memory cell flows from the reading circuit to the first memory cell and a second current corresponding to second data retained in the second memory cell flows from the reading circuit to the second memory cell, the reading circuit compares the current amounts of the first current and the second current, and reads the first data.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: January 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuto Yakubo, Takahiko Ishizu
  • Patent number: 11874994
    Abstract: A convenient electronic device or the like is provided. The power consumption of an electronic device or the like is reduced. An electronic device or the like having high visibility regardless of the brightness of external light is provided. An electronic device or the like that can display both a smooth moving image and an eye-friendly still image is provided. Such an electronic device is an electronic device including a first display portion, a second display portion, and a control portion. The control portion is configured to make the first display portion and the second display portion individually display two or more of a first image, a second image, and a third image at a time. The first image is displayed with reflected light, the second image is displayed with emitted light, and the third image is displayed with light including both reflected light and emitted light.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: January 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kensuke Yoshizumi
  • Patent number: 11875837
    Abstract: A semiconductor device resistant to a high temperature with low power consumption is provided. The semiconductor device includes a first and a second circuit, a first and a second cell, and a first and a second wiring. The first cell includes a first transistor, and the second cell includes a second transistor. The first and the second transistor operate in a subthreshold region. The first cell is electrically connected to the first circuit through the first wiring, the first cell is electrically connected to the second circuit through the second wiring, and the second cell is electrically connected to the second circuit through the second wiring. The first cell sets a current flowing through the first transistor to a first current and the second cell sets a current flowing through the second transistor to a second current. At this time, a potential corresponding to the second current is input from the second wiring to the first cell.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: January 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Munehiro Kozuma, Takeshi Aoki
  • Patent number: 11876126
    Abstract: Provided is a method for manufacturing a semiconductor device whose electric characteristics are prevented from being varied and whose reliability is improved. In the method, an insulating film is formed over an oxide semiconductor film, a buffer film is formed over the insulating film, oxygen is added to the buffer film and the insulating film, a conductive film is formed over the buffer film to which oxygen is added, and an impurity element is added to the oxide semiconductor film using the conductive film as a mask. An insulating film containing hydrogen and overlapping with the oxide semiconductor film may be formed after the impurity element is added to the oxide semiconductor film.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: January 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masami Jintyou, Yukinori Shima
  • Publication number: 20240014137
    Abstract: A semiconductor device having favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The semiconductor layer includes an island-shaped top surface. The first insulating layer is provided in contact with a top surface and a side surface of the semiconductor layer. The first conductive layer is positioned over the first insulating layer and includes a portion overlapping with the semiconductor layer. In addition, the semiconductor layer includes a metal oxide, and the first insulating layer includes an oxide. The semiconductor layer includes a first region overlapping with the first conductive layer and a second region not overlapping with the first conductive layer.
    Type: Application
    Filed: September 21, 2023
    Publication date: January 11, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Junichi KOEZUKA, Toshimitsu OBONAI, Masami JINTYOU, Daisuke KUROSAKI
  • Publication number: 20240016044
    Abstract: As a result of miniaturization of a pixel region associated with an improvement in definition and an increase in a substrate size associated with an increase in area, defects due to precision, bending, and the like of a mask used at the time of evaporation have become issues. A partition including portions with different thicknesses over a pixel electrode (also referred to as a first electrode) in a display region and in the vicinity of a pixel electrode layer is formed, without increasing the number of steps, by using a photomask or a reticle provided with an auxiliary pattern having a light intensity reduction function made of a diffraction grating pattern or a semi-transmissive film.
    Type: Application
    Filed: September 20, 2023
    Publication date: January 11, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideaki Kuwabara, Hideto Ohnuma
  • Publication number: 20240013732
    Abstract: It is an object to decrease the number of transistors connected to a capacitor. In a structure, a capacitor and one transistor are included, one electrode of the capacitor is connected to a wiring, and the other electrode of the capacitor is connected to a gate of the transistor. Since a clock signal is input to the wiring, the clock signal is input to the gate of the transistor through the capacitor. Then, on/off of the transistor is controlled by a signal which synchronizes with the clock signal, so that a period when the transistor is on and a period when the transistor is off are repeated. In this manner, deterioration of the transistor can be suppressed.
    Type: Application
    Filed: September 22, 2023
    Publication date: January 11, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Atsushi UMEZAKI
  • Patent number: 11869977
    Abstract: A semiconductor device that can operate at high speed or having high strength against stress is provided. One embodiment of the present invention is a semiconductor device including a semiconductor film including a channel formation region and a pair of impurity regions between which the channel formation region is positioned; agate electrode overlapping side and top portions of the channel formation region with an insulating film positioned between the gate electrode and the side and top portions; and a source electrode and a drain electrode in contact with side and top portions of the pair of impurity regions.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: January 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 11869980
    Abstract: A novel material is provided. A composite oxide semiconductor in which a first region and a plurality of second regions are mixed is provided. Note that the first region contains at least indium, an element M (the element M is one or more of Al, Ga, Y, and Sn), and zinc, and the plurality of second regions contain indium and zinc. Since the plurality of second regions have a higher concentration of indium than the first region, the plurality of second regions have a higher conductivity than the first region. An end portion of one of the plurality of second regions overlaps with an end portion of another one of the plurality of second regions. The plurality of second regions are three-dimensionally surrounded with the first region.
    Type: Grant
    Filed: August 10, 2022
    Date of Patent: January 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 11869979
    Abstract: A semiconductor device includes a transistor including, a first to fifth insulator, a first to third oxide, a first to third conductor. An opening reaching the second oxide is provided in the fourth insulator and the fifth insulator. The third oxide, the third insulator, and the third conductor are arranged sequentially from the inner wall side of the opening so as to fill the opening. In the channel length direction of the transistor, at least part of the fourth insulator in a region where the fourth insulator and the second oxide do not overlap with each other is in contact with the first insulator. In the channel width direction of the transistor, at least part of the third oxide in a region where the third oxide and the second oxide do not overlap with each other is in contact with the first insulator.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: January 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Katsuaki Tochibayashi, Ryota Hodo, Kentaro Sugaya, Naoto Yamade
  • Patent number: 11868877
    Abstract: An arithmetic device and an electronic device having small power consumption is provided. An arithmetic device and an electronic device capable of high-speed operation is provided. An arithmetic device and an electronic device capable of suppressing heat generation is provided. The arithmetic device includes a first arithmetic portion and a second arithmetic portion. The first arithmetic portion includes a first CPU core and a second CPU core. The second arithmetic portion includes a first GPU core and a second GPU core. The CPU cores each have a power gating function and each include a first data retention circuit electrically connected to a flip-flop. The first GPU core includes a second data retention circuit capable of retaining an analog value and reading out the analog value as digital data of two or more bits. The second GPU core includes a third data retention circuit capable of retaining a digital value and reading out the digital value as digital data of one bit.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: January 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiko Ishizu, Takayuki Ikeda, Atsuo Isobe, Atsushi Miyaguchi, Shunpei Yamazaki
  • Patent number: 11869981
    Abstract: The field-effect mobility and reliability of a transistor including an oxide semiconductor film are improved. One embodiment of the present invention is a semiconductor device which includes a gate electrode, an insulating film over the gate electrode, an oxide semiconductor film over the insulating film, and a pair of electrodes over the oxide semiconductor film. The oxide semiconductor film includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, and a third oxide semiconductor film over the second oxide semiconductor film. The first oxide semiconductor film, the second oxide semiconductor film, and the third oxide semiconductor film include the same element. The second oxide semiconductor film includes a region having lower crystallinity than one or both of the first oxide semiconductor film and the third oxide semiconductor film.
    Type: Grant
    Filed: January 20, 2022
    Date of Patent: January 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Kenichi Okazaki, Yasutaka Nakazawa
  • Patent number: 11870436
    Abstract: A semiconductor device that can perform product-sum operation with low power is provided. The semiconductor device includes a switching circuit. The switching circuit includes first to fourth terminals. The switching circuit has a function of selecting one of the third terminal and the fourth terminal as electrical connection destination of the first terminal, and selecting the other of the third terminal and the fourth terminal as electrical connection destination of the second terminal, on the basis of first data. The switching circuit includes a first transistor and a second transistor each having a back gate. The switching circuit has a function of determining a signal-transmission speed between the first terminal and one of the third terminal and the fourth terminal and a signal-transmission speed between the second terminal and the other of the third terminal and the fourth terminal on the basis of potentials of the back gates. The potentials are determined by second data.
    Type: Grant
    Filed: November 17, 2022
    Date of Patent: January 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Yoshiyuki Kurokawa
  • Patent number: 11871641
    Abstract: A display device having a function of sensing light is provided. A highly convenient display device is provided. The display device includes a first substrate, a second substrate, a light-receiving element, a transistor, and a light-emitting element in a display portion. The light-receiving element, the transistor, and the light-emitting element are each positioned between the first substrate and the second substrate. The light-receiving element is positioned closer to the first substrate than the transistor is. The light-emitting element is positioned closer to the second substrate than the transistor is. The light-receiving element includes a layer containing an organic compound. The transistor is electrically connected to the light-emitting element. The display device preferably further includes a lens and light transmitted through the lens preferably enters the light-receiving element.
    Type: Grant
    Filed: July 18, 2019
    Date of Patent: January 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Daisuke Kubota, Ryo Hatsumi, Taisuke Kamada
  • Patent number: 11869428
    Abstract: A display apparatus capable of image capturing with high sensitivity is provided. The display apparatus is configured to include first to third switches, a first transistor, a second transistor, and a light-emitting/receiving element. The first switch is electrically connected to a gate of the first transistor. The second switch is positioned between one of a source and a drain of the first transistor and one electrode of the light-emitting/receiving element. The third switch is positioned between the one electrode of the light-emitting/receiving element and a gate of the second transistor. The other of the source and the drain of the first transistor is supplied with a first potential. The other electrode of the light-emitting/receiving element is supplied with a second potential. The light-emitting/receiving element has a function of emitting light of a first color and a function of receiving light of a second color.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: January 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Susumu Kawashima, Koji Kusunoki, Kazunori Watanabe
  • Patent number: 11867503
    Abstract: An anomaly detection system that outputs an anomaly detection signal before a safety valve of a secondary battery is opened is provided. The anomaly detection system includes a strain sensor, a memory, and a comparator. The memory has a function of retaining an analog potential, and the comparator has a function of comparing a potential output by the strain sensor and the analog potential retained by the memory. The strain sensor is attached to the secondary battery before use, and a predetermined potential is retained in the memory. When a housing of the secondary battery expands while the secondary battery is used, and the potential output by the strain sensor becomes higher (or lower) than the predetermined potential, an anomaly detection signal is output.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: January 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Ryota Tajima, Yuki Okamoto, Shunpei Yamazaki
  • Patent number: 11870042
    Abstract: A sensor element with excellent characteristics is provided. An electronic device including a power storage system with excellent characteristics is provided. A vehicle including a power storage system with excellent characteristics is provided. A novel semiconductor device is provided. The power storage system includes a storage battery, a neural network, and a sensor element; the neural network includes an input layer, an output layer, and one or a plurality of middle layers provided between the input layer and the output layer; a value corresponding to a first signal output from the sensor element is supplied to the input layer; the first signal is an analog signal; the sensor element includes a region in contact with a surface of the storage battery; and the sensor element has a function of measuring one or both of strain and temperature.
    Type: Grant
    Filed: August 28, 2018
    Date of Patent: January 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mayumi Mikami, Ryota Tajima, Hideaki Shishido, Kensuke Yoshizumi
  • Patent number: 11869715
    Abstract: To provide a flexible, highly reliable power storage device or light-emitting device. The device includes a battery unit or a light-emitting unit and a member with rubber elasticity. The battery unit includes a secondary battery. The light-emitting unit includes a light-emitting element. The member with rubber elasticity is provided with a first projection and a second projection. The first projection and the second projection are arranged on a first surface of the battery unit or the light-emitting unit. The first projection and the second projection come in contact with each other when the power storage device is bent such that the first surface of the battery unit faces inward.
    Type: Grant
    Filed: June 22, 2021
    Date of Patent: January 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Kawata, Kei Takahashi