Patents Assigned to Semiconductor Energy Laboratory Co., Ltd.
  • Publication number: 20240026217
    Abstract: A light-emitting element includes an EL layer between a pair of electrodes. The EL layer contains a first compound and a second compound. The first compound is a phosphorescent iridium metal complex having a LUMO level of greater than or equal to ?3.5 eV and less than or equal to ?2.5 eV, and the second compound is an organic compound having a pyrimidine skeleton. The light-emitting element includes an EL layer between a pair of electrodes. The EL layer contains a first compound and a second compound. The first compound is a phosphorescent iridium metal complex having a diazine skeleton, and the second compound is an organic compound having a pyrimidine skeleton.
    Type: Application
    Filed: September 28, 2023
    Publication date: January 25, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kyoko Takeda, Harue Osaka, Satoko Shitagaki, Nobuharu Ohsawa, Satoshi Seo, Hiromi Seo
  • Patent number: 11881513
    Abstract: A semiconductor device that can be scaled down or highly integrated is provided. The semiconductor device includes a first layer and a second layer over the first layer. The first layer and the second layer each include a transistor. The transistor in the first layer and the transistor in the second layer each include a first oxide, a first conductor and a second conductor over the first oxide, a first insulator placed to cover the first conductor, the second conductor, and the first oxide, a second insulator over the first insulator, a second oxide placed between the first conductor and the second conductor over the first oxide, a third insulator over the second oxide, a third conductor over the third insulator, and a fourth insulator in contact with a top surface of the second insulator, a top surface of the second oxide, a top surface of the third insulator, and a top surface of the third conductor.
    Type: Grant
    Filed: April 16, 2019
    Date of Patent: January 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kosei Nei, Tsutomu Murakawa, Toshihiko Takeuchi, Kentaro Sugaya
  • Patent number: 11881578
    Abstract: In manufacturing a storage battery electrode, a method for manufacturing a storage battery electrode with high capacity and stability is provided. As a method for preventing a mixture for forming an active material layer from becoming strongly basic, a first aqueous solution is formed by mixing an active material exhibiting basicity with an aqueous solution exhibiting acidity and including an oxidized derivative of a first conductive additive; a first mixture is formed by reducing the oxidized derivative of the first conductive additive by drying the first aqueous solution; a second mixture is formed by mixing a second conductive additive and a binder; a third mixture is formed by mixing the first mixture and the second mixture; and a current collector is coated with the third mixture. The strong basicity of the mixture for forming an active material layer is lowered; thus, the binder can be prevented from becoming gelled.
    Type: Grant
    Filed: December 21, 2022
    Date of Patent: January 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takahiro Kawakami, Yohei Momma, Teruaki Ochiai, Tatsuya Ikenuma
  • Patent number: 11881489
    Abstract: Provided is a display device with extremely high resolution, a display device with higher display quality, a display device with improved viewing angle characteristics, or a flexible display device. Same-color subpixels are arranged in a zigzag pattern in a predetermined direction. In other words, when attention is paid to a subpixel, another two subpixels exhibiting the same color as the subpixel are preferably located upper right and lower right or upper left and lower left. Each pixel includes three subpixels arranged in an L shape. In addition, two pixels are combined so that pixel units including subpixel are arranged in matrix of 3×2.
    Type: Grant
    Filed: November 22, 2022
    Date of Patent: January 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hisao Ikeda, Kouhei Toyotaka, Hideaki Shishido, Hiroyuki Miyake, Kohei Yokoyama, Yasuhiro Jinbo, Yoshitaka Dozen, Takaaki Nagata, Shinichi Hirasa
  • Patent number: 11881522
    Abstract: A semiconductor device having favorable electrical characteristics is provided. A first oxide is formed over a substrate; a first insulator is formed over the first oxide; an opening reaching the first oxide is formed in the first insulator; a first oxide film is deposited in contact with the first oxide and the first insulator in the opening; a first insulating film is deposited over the first oxide film; microwave treatment is performed from above the first insulating film; heat treatment is performed on one or both of the first insulating film and the first oxide; a first conductive film is deposited over the first insulating film; and part of the first oxide film, part of the first insulating film, and part of the first conductive film are removed until a top surface of the first insulator is exposed, so that a second oxide, a second insulator, and a first conductor are formed.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: January 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Naoki Okuno, Yasuhiro Jinbo
  • Patent number: 11882374
    Abstract: The reading accuracy of an imaging device is increased. Clear image capturing is performed even in the case where the luminance is high. A reading circuit of the imaging device includes an amplifier portion and a conversion portion. The amplifier portion amplifies a potential difference between a first signal and a second signal that are sequentially input and outputs the amplified difference to the conversion portion. The conversion portion converts the output potential of the amplifier portion into a digital value. The amplifier portion is reset on the basis of a first reference potential and the first signal and amplifies the potential difference on the basis of a second reference potential that is different from the first reference potential and the second signal.
    Type: Grant
    Filed: February 17, 2021
    Date of Patent: January 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kei Takahashi, Kouhei Toyotaka, Hidetomo Kobayashi
  • Patent number: 11882376
    Abstract: A driving method of a semiconductor device that takes three-dimensional images with short duration is provided. In a first step, a light source starts to emit light, and first potential corresponding to the total amount of light received by a first photoelectric conversion element and a second photoelectric conversion element is written to a first charge accumulation region. In a second step, the light source stops emitting light and second potential corresponding to the total amount of light received by the first photoelectric conversion element and the second photoelectric conversion element is written to a second charge accumulation region. In a third step, first data corresponding to the potential written to the first charge accumulation region is read. In a fourth step, second data corresponding to the potential written to the second charge accumulation region is read.
    Type: Grant
    Filed: January 3, 2022
    Date of Patent: January 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshiyuki Kurokawa
  • Patent number: 11881177
    Abstract: A display device that can be easily and more flexibly designed is provided. The display device includes a pixel circuit and a driver circuit in a display portion. The driver circuit includes a plurality of pulse output circuits. Each of the plurality of pulse output circuits has a function of driving a gate line. The pixel circuit is electrically connected to the gate line. Each of the plurality of pulse output circuits includes a first transistor. The pixel circuit includes a second transistor. A layer including the second transistor is over a layer including the first transistor, and the first transistor and the second transistor overlap with each other.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: January 23, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidetomo Kobayashi, Kouhei Toyotaka
  • Publication number: 20240023371
    Abstract: A novel method for fabricating a display apparatus is provided. An anode is formed over an insulating layer, an EL layer is formed over the anode, and a cathode is formed over the EL layer. A plurality of light-emitting elements are formed without provision of a partition by selectively removing parts of the anode, the EL layer, and the cathode. A conductive layer having a light-transmitting property is formed to cover the plurality of light-emitting elements. The cathodes of the plurality of light-emitting elements are electrically connected to the conductive layer.
    Type: Application
    Filed: November 25, 2021
    Publication date: January 18, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Shingo EGUCHI, Kenichi OKAZAKI, Koji KUSUNOKI, Kensuke YOSHIZUMI
  • Publication number: 20240023431
    Abstract: Provided is a light-emitting device with high emission efficiency. Provided is a light-emitting device including an anode, a cathode, and an EL layer positioned therebetween; the EL layer includes a light-emitting layer, a first layer, and a second layer; the first layer is positioned between the anode and the light-emitting layer; the first layer is in contact with the second layer; the second layer contains a monoamine compound having an arylamine structure; a first group, a second group, and a third group are bonded to a nitrogen atom included in the amine in the monoamine compound; the first group is a group including a carbazole structure; the second group is a group including a dibenzofuran structure or a dibenzothiophene structure; the third group includes an aromatic hydrocarbon structure having 6 to 18 carbon atoms or a heteroaromatic hydrocarbon structure having 4 to 26 carbon atoms; and a refractive index of the first layer is lower than a refractive index of the light-emitting layer.
    Type: Application
    Filed: June 23, 2021
    Publication date: January 18, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takeyoshi WATABE, Airi UEDA, Kyoko TAKEDA, Nobuharu OHSAWA, Satoshi SEO, Tomohiro KUBOTA, Takashi HIRAHARA
  • Publication number: 20240023423
    Abstract: A light-emitting element which includes a plurality of light-emitting layers between a pair of electrodes and has low driving voltage and high emission efficiency is provided. A light-emitting element including first to third light-emitting layers between a cathode and an anode is provided. The first light-emitting layer includes a first phosphorescent material and a first electron-transport material; the second light-emitting layer includes a second phosphorescent material and a second electron-transport material; the third light-emitting layer includes a fluorescent material and a third electron-transport material; the first to third light-emitting elements are provided in contact with an electron-transport layer positioned on a cathode side; and a triplet excitation energy level of a material included in the electron-transport layer is lower than triplet excitation energy levels of the first electron-transport material and the second electron-transport material.
    Type: Application
    Filed: June 29, 2023
    Publication date: January 18, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tsunenori Suzuki, Naoaki Hashimoto, Eriko Sauo, Satoshi Seo
  • Patent number: 11876098
    Abstract: A display device capable of improving image quality is provided. A storage node is provided in each pixel and first data can be held in the storage node. Second data is added to the first data by capacitive coupling, which can be supplied to a display element. Thus, the display device can display a corrected image. A reference potential for the capacitive coupling operation is supplied from a power supply line or the like, and thus the first data and the second data can be supplied from a common signal line.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: January 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Susumu Kawashima, Naoto Kusumoto
  • Patent number: 11875838
    Abstract: A memory device with shortened access time in data reading is provided. The memory device includes a first layer and a second layer positioned above the first layer, the first layer includes a reading circuit, and the second layer includes a first memory cell and a second memory cell. The reading circuit includes a Si transistor. The first memory cell and the second memory cell each include an OS transistor. The first memory cell is electrically connected to the reading circuit, and the second memory cell is electrically connected to the reading circuit. When a first current corresponding to first data retained in the first memory cell flows from the reading circuit to the first memory cell and a second current corresponding to second data retained in the second memory cell flows from the reading circuit to the second memory cell, the reading circuit compares the current amounts of the first current and the second current, and reads the first data.
    Type: Grant
    Filed: July 6, 2020
    Date of Patent: January 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yuto Yakubo, Takahiko Ishizu
  • Patent number: 11874994
    Abstract: A convenient electronic device or the like is provided. The power consumption of an electronic device or the like is reduced. An electronic device or the like having high visibility regardless of the brightness of external light is provided. An electronic device or the like that can display both a smooth moving image and an eye-friendly still image is provided. Such an electronic device is an electronic device including a first display portion, a second display portion, and a control portion. The control portion is configured to make the first display portion and the second display portion individually display two or more of a first image, a second image, and a third image at a time. The first image is displayed with reflected light, the second image is displayed with emitted light, and the third image is displayed with light including both reflected light and emitted light.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: January 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kensuke Yoshizumi
  • Patent number: 11875837
    Abstract: A semiconductor device resistant to a high temperature with low power consumption is provided. The semiconductor device includes a first and a second circuit, a first and a second cell, and a first and a second wiring. The first cell includes a first transistor, and the second cell includes a second transistor. The first and the second transistor operate in a subthreshold region. The first cell is electrically connected to the first circuit through the first wiring, the first cell is electrically connected to the second circuit through the second wiring, and the second cell is electrically connected to the second circuit through the second wiring. The first cell sets a current flowing through the first transistor to a first current and the second cell sets a current flowing through the second transistor to a second current. At this time, a potential corresponding to the second current is input from the second wiring to the first cell.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: January 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiyuki Kurokawa, Munehiro Kozuma, Takeshi Aoki
  • Patent number: 11876126
    Abstract: Provided is a method for manufacturing a semiconductor device whose electric characteristics are prevented from being varied and whose reliability is improved. In the method, an insulating film is formed over an oxide semiconductor film, a buffer film is formed over the insulating film, oxygen is added to the buffer film and the insulating film, a conductive film is formed over the buffer film to which oxygen is added, and an impurity element is added to the oxide semiconductor film using the conductive film as a mask. An insulating film containing hydrogen and overlapping with the oxide semiconductor film may be formed after the impurity element is added to the oxide semiconductor film.
    Type: Grant
    Filed: August 10, 2021
    Date of Patent: January 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Masami Jintyou, Yukinori Shima
  • Publication number: 20240014137
    Abstract: A semiconductor device having favorable electrical characteristics is provided. A semiconductor device having stable electrical characteristics is provided. A highly reliable semiconductor device is provided. The semiconductor device includes a semiconductor layer, a first insulating layer, and a first conductive layer. The semiconductor layer includes an island-shaped top surface. The first insulating layer is provided in contact with a top surface and a side surface of the semiconductor layer. The first conductive layer is positioned over the first insulating layer and includes a portion overlapping with the semiconductor layer. In addition, the semiconductor layer includes a metal oxide, and the first insulating layer includes an oxide. The semiconductor layer includes a first region overlapping with the first conductive layer and a second region not overlapping with the first conductive layer.
    Type: Application
    Filed: September 21, 2023
    Publication date: January 11, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Junichi KOEZUKA, Toshimitsu OBONAI, Masami JINTYOU, Daisuke KUROSAKI
  • Publication number: 20240016044
    Abstract: As a result of miniaturization of a pixel region associated with an improvement in definition and an increase in a substrate size associated with an increase in area, defects due to precision, bending, and the like of a mask used at the time of evaporation have become issues. A partition including portions with different thicknesses over a pixel electrode (also referred to as a first electrode) in a display region and in the vicinity of a pixel electrode layer is formed, without increasing the number of steps, by using a photomask or a reticle provided with an auxiliary pattern having a light intensity reduction function made of a diffraction grating pattern or a semi-transmissive film.
    Type: Application
    Filed: September 20, 2023
    Publication date: January 11, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideaki Kuwabara, Hideto Ohnuma
  • Publication number: 20240013732
    Abstract: It is an object to decrease the number of transistors connected to a capacitor. In a structure, a capacitor and one transistor are included, one electrode of the capacitor is connected to a wiring, and the other electrode of the capacitor is connected to a gate of the transistor. Since a clock signal is input to the wiring, the clock signal is input to the gate of the transistor through the capacitor. Then, on/off of the transistor is controlled by a signal which synchronizes with the clock signal, so that a period when the transistor is on and a period when the transistor is off are repeated. In this manner, deterioration of the transistor can be suppressed.
    Type: Application
    Filed: September 22, 2023
    Publication date: January 11, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Atsushi UMEZAKI
  • Patent number: 11869977
    Abstract: A semiconductor device that can operate at high speed or having high strength against stress is provided. One embodiment of the present invention is a semiconductor device including a semiconductor film including a channel formation region and a pair of impurity regions between which the channel formation region is positioned; agate electrode overlapping side and top portions of the channel formation region with an insulating film positioned between the gate electrode and the side and top portions; and a source electrode and a drain electrode in contact with side and top portions of the pair of impurity regions.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: January 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki