Patents Assigned to Semiconductor Ltd.
  • Publication number: 20240080034
    Abstract: A method may include, for a signal path comprising a passive antialiasing filter sampled by a switched-capacitor front-end, monitoring a change of a first impedance of a resistor of the passive antialiasing filter responsive to an environmental condition relative to a second impedance of a switched capacitor of the switched-capacitor front end and compensating the signal path for a change in gain of the signal path resulting from the change of the first impedance.
    Type: Application
    Filed: September 7, 2022
    Publication date: March 7, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Arashk NOROUZPOURSHIRAZI, John L. MELANSON, Axel THOMSEN
  • Publication number: 20240079956
    Abstract: A power converter for converting an input voltage at an input of the power converter into an output voltage at an output of the power converter may include a switching node, a power inductor coupled between the switching node and the output, a flying capacitor having a first flying capacitor terminal and a second flying capacitor terminal, a pump capacitor having a first pump capacitor terminal and a second pump capacitor terminal, the second pump capacitor terminal coupled to ground, a first switch coupled between the input and the first flying capacitor terminal, a second switch coupled between the first flying capacitor terminal and the switching node, a third switch coupled between the second flying capacitor terminal and the switching node, a fourth switch coupled between the second flying capacitor terminal and a ground voltage, a fifth switch coupled between the second flying capacitor terminal and the first pump capacitor terminal, and a sixth switch coupled between the output and the first pump capac
    Type: Application
    Filed: November 9, 2023
    Publication date: March 7, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventor: Changjong LIM
  • Publication number: 20240079262
    Abstract: A support stage includes a base portion, a support portion that is erected at a peripheral edge portion of the base portion and with which one surface of a wafer is to be come into contact, a suction groove that is provided at the support portion and to which a suction force with respect to the one surface is to be given, an ejecting hole that is provided in an inward portion of the base portion and by which a gas is to be ejected toward the one surface, and an exhaust hole that is provided in at least either one of the base portion and the support portion and by which a gas is to be discharged from a space between the base portion, the support portion, and the one surface.
    Type: Application
    Filed: November 13, 2023
    Publication date: March 7, 2024
    Applicants: ROHM CO., LTD., LAPIS Semiconductor Co., Ltd.
    Inventors: Hajime USHIO, Yuta MAKINO, Hirofumi SHIRAGASAWA
  • Publication number: 20240074319
    Abstract: The present disclosure relates to circuitry for driving a piezoelectric transducer. The circuitry may be implemented as an integrated circuit and comprises driver circuitry configured to supply a drive signal to cause the transducer to generate an output signal and active inductor circuitry configured to be coupled with the piezoelectric transducer. The active inductor circuitry may be tuneable to adjust a frequency characteristic of the output signal.
    Type: Application
    Filed: October 13, 2023
    Publication date: February 29, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventor: John P. LESSO
  • Publication number: 20240068980
    Abstract: Circuitry for measuring a characteristic of an electrochemical cell, the circuitry comprising: a comparator having a first comparator input, a second comparator input and a comparator output; a feedback path between the comparator output and the second comparator input configured to provide a feedback signal to the second comparator input; and a loop filter configured to apply filtering to the feedback path to generate the feedback signal, wherein the loop filter comprises the electrochemical cell.
    Type: Application
    Filed: October 31, 2023
    Publication date: February 29, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John P. LESSO, Toru IDO
  • Publication number: 20240072823
    Abstract: In accordance with embodiments of the present disclosure, a method may include, in a system comprising a differential filter comprising a plurality of impedance elements, applying a common-mode signal to the differential filter, measuring an output signal of the differential filter in response to the common-mode signal to determine an error due to impedance mismatch of the impedance elements, and tuning one or more of the plurality of impedance elements to minimize the error.
    Type: Application
    Filed: August 25, 2022
    Publication date: February 29, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Arashk NOROUZPOURSHIRAZI, John L. MELANSON, Axel THOMSEN
  • Publication number: 20240072559
    Abstract: A power management system for use in a device comprising a battery and one or more components configured to draw electrical energy from the battery may include a first power converter configured to electrically couple between charging circuitry configured to provide electrical energy for charging the battery and the one or more downstream components and a bidirectional power converter configured to electrically couple between the charging circuitry and the battery, wherein the bidirectional power converter is configured to transfer charge from the battery or transfer charge from the battery based on a power requirement of the one or more components and a power available from the first power converter.
    Type: Application
    Filed: November 7, 2023
    Publication date: February 29, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Ivan PERRY, Hasnain AKRAM, Eric J. KING
  • Publication number: 20240061921
    Abstract: The present invention relates to methods, apparatus and systems for audio playback via a personal audio device following a biometric process. A personal audio device may be used to obtain ear model data for authenticating a user via an ear biometric authentication system. Owing to that successful authentication, the electronic device is informed of the person who is listening to audio playback from the device. Thus the device can implement one or more playback settings which are specific to that authorised user.
    Type: Application
    Filed: October 26, 2023
    Publication date: February 22, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul LESSO, John FORSYTH
  • Publication number: 20240063038
    Abstract: A location detection system for detecting a location of a wafer within a transfer robot vacuum chamber (TRVC), the detection system may include (i) an illumination unit that is configured to direct a transmitted radiation pattern through a transparent window of the TRVC and towards one or more TRVS reflecting elements located below an upper side of a wafer holding element of the transfer robot; wherein the illumination unit is located outside the TRVC; (ii) a sensing unit that is configured to generate one or more detection signals indicative of a received radiation pattern that is reflected from the one or more TRVS reflecting elements; and (iii) a location processing circuit that is configured to detect a location of the wafer based on the one or more detection signals.
    Type: Application
    Filed: August 21, 2022
    Publication date: February 22, 2024
    Applicant: Tower Semiconductor Ltd.
    Inventors: Slava Superfine, Yaniv Malachy, Dany Trabelsi
  • Publication number: 20240060920
    Abstract: A system may include a resonant sensor configured to sense a physical quantity, a measurement circuit communicatively coupled to the resonant sensor and configured to measure one or more resonance parameters associated with the resonant sensor and indicative of the physical quantity using an incident/quadrature detector having an incident channel and a quadrature channel and perform a calibration of a non-ideality between the incident channel and the quadrature channel of the system, the calibration comprising determining the non-ideality by controlling the sensor signal, an oscillation signal for the incident channel, and an oscillation signal for the quadrature channel; and correcting for the non-ideality.
    Type: Application
    Filed: September 19, 2023
    Publication date: February 22, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Tejasvi DAS, Siddharth MARU, John L. MELANSON
  • Patent number: 11907602
    Abstract: A multi-vision display device includes a timing controller, a plurality of display panels, and a plurality of display driver integrated circuits (ICs). The timing controller is configured to receive source data and timing signals from a host, and generate a data packet comprising image data and control data. The plurality of display driver ICs each is connected to any one of the plurality of display panels. The control data includes a panel identifier indicating a number of display panels of the plurality of display panels connected to the display driver IC prior to a corresponding display panel connected to the display driver IC. Adjacent ones of the plurality of display driver ICs are connected to each other, modulate the panel identifier provided from one among the timing controller and a front end display driver IC, and provide the modulated panel identifier to a rear end display driver IC.
    Type: Grant
    Filed: December 28, 2020
    Date of Patent: February 20, 2024
    Assignee: Magnachip Semiconductor, Ltd.
    Inventors: Jung Hoon Sul, Myung Woo Lee, Seung Ryeol Lee, Duk Min Lee
  • Publication number: 20240056095
    Abstract: A system may include a switched-capacitor analog front end comprising a plurality of switches for sampling an analog physical quantity and a bootstrap generation network electrically coupled to the plurality of switches and configured to generate a bootstrap sampling clock for controlling the plurality of switches and generate a floating supply voltage for the bootstrap sampling clock based on the analog physical quantity.
    Type: Application
    Filed: August 10, 2022
    Publication date: February 15, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Arashk NOROUZPOURSHIRAZI, Stephen T. HODAPP, Ravi K. KUMMARAGUNTLA, Paul WILSON, Axel THOMSEN
  • Publication number: 20240053918
    Abstract: An image processing apparatus includes: a line buffer configured to store image data; a clock gating circuit configured to apply a clock signal to the line buffer; and a data processor configured to determine, when performing a write operation, whether to skip the write operation to the line buffer for each of adjacent data according to whether a value of each of the adjacent data within an image is the same, wherein the data processor is further configured to control the clock gating circuit, such that the clock signal is prevented from being applied to the line buffer while the write operation is skipped and the clock signal is applied to the line buffer while the write operation is performed.
    Type: Application
    Filed: January 12, 2023
    Publication date: February 15, 2024
    Applicant: Magnachip Semiconductor, Ltd.
    Inventor: Sangsu PARK
  • Publication number: 20240054931
    Abstract: A display device includes: a display panel including a plurality of pixels, a driver integrated circuit (IC) configured to convert digital data corresponding to an input image to an analog data voltage using a gamma voltage, and to supply the analog data voltage to the plurality of pixels, and a power supply configured to supply a pixel driving voltage to the display panel and the driver IC, and the driver IC includes: a weight selector configured to select a weight for adjusting the gamma voltage based on an amount of change in the pixel driving voltage supplied from the power supply, and a gamma reference voltage generating circuit configured to generate a gamma reference voltage based on the selected weight.
    Type: Application
    Filed: May 31, 2023
    Publication date: February 15, 2024
    Applicant: Magnachip Semiconductor, Ltd.
    Inventors: Jusang PARK, Kyeongwoo KIM, Hyoungkyu KIM
  • Publication number: 20240053387
    Abstract: A system may include a passive floating attenuator configured to receive an analog physical quantity and attenuate the analog physical quantity to a floating attenuated signal defined by voltage nodes other than the voltage nodes of the analog physical quantity, an anti-aliasing filter configured to filter the floating attenuated signal to generate a filtered attenuated signal, and a switched-capacitor sampling circuit comprising a plurality of switches configured to sample the filtered attenuated signal.
    Type: Application
    Filed: August 10, 2022
    Publication date: February 15, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Arashk NOROUZPOURSHIRAZI, Stephen T. HODAPP, Ravi K. KUMMARAGUNTLA, Axel THOMSEN
  • Publication number: 20240056039
    Abstract: Switching amplifier circuitry for driving an inductive load, the switching amplifier circuitry comprising modulator circuitry and output stage circuitry, wherein the switching amplifier circuitry is configured to: while the modulator circuitry is outputting a modulated output signal that gives rise to ripple current in the load: adjust a switching frequency of the modulator circuitry over a predetermined range of frequencies; monitor a power of the switching amplifier circuitry as the switching frequency is adjusted over the predetermined range of frequencies; and select, as an operational switching frequency for the modulator circuitry, a frequency within the predetermined range of frequencies at which the monitored power meets a predefined criterion.
    Type: Application
    Filed: August 11, 2022
    Publication date: February 15, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Matthew BEARDSWORTH, John L. MELANSON
  • Patent number: 11901322
    Abstract: A semiconductor chip packaging method includes forming a bump on a wafer, forming a coating film covering the bump, laser grooving the wafer, plasma etching the wafer on which the laser grooving is performed, exposing the bump by removing the coating film covering the bump, fabricating a semiconductor die by performing mechanical sawing of the wafer, and packaging the semiconductor die.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: February 13, 2024
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Jin Won Jeong, Jae Sik Choi, Byeung Soo Song
  • Publication number: 20240047214
    Abstract: A mask layout for forming a semiconductor device includes an active mask pattern, a gate electrode mask pattern, a silicide blocking mask pattern, and a contact mask pattern. The active mask pattern forms source and drain regions in a substrate. The gate electrode mask pattern, disposed to overlap the active mask pattern, forms a gate electrode between the source region and the drain region. The silicide blocking mask pattern is disposed to overlap the gate electrode mask pattern and the active mask pattern in the gate electrode, the source region, and the drain regions to form a silicide blocking region. The contact mask pattern, disposed spaced apart from the silicide blocking mask pattern, forms a contact plug on the substrate. The silicide blocking mask pattern covers the gate electrode mask pattern and extends to the active mask pattern.
    Type: Application
    Filed: October 23, 2023
    Publication date: February 8, 2024
    Applicant: MagnaChip Semiconductor, Ltd.
    Inventor: Guk Hwan KIM
  • Publication number: 20240048128
    Abstract: Methods and apparatus for controlling a switch transition in an inductive switching circuit are disclosed. A switch driver is configured to receive an indication of current through a diode associated with a first switch and dynamically control a switch transition of a second switch based on the indication of current, so as to reduce the switch transition time, when possible, whilst maintaining a voltage transient due to the switch transition within an acceptable range.
    Type: Application
    Filed: August 24, 2022
    Publication date: February 8, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Vikas VIJAY, Eduardo VELARDE, Bryan QUINONES, Douglas J. W. MACFARLANE, David SMITH, Saurabh K. SINGH
  • Publication number: 20240048108
    Abstract: A bootstrapped switch circuit may include a signal switch configured to, when enabled via a gate terminal of the signal switch during a sampling phase of the bootstrapped switch circuit, pass an input signal received at its input to its output.
    Type: Application
    Filed: August 5, 2022
    Publication date: February 8, 2024
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Arashk NOROUZPOURSHIRAZI, Ravi K. KUMMARAGUNTLA