Patents Assigned to Semiconductor Ltd.
  • Publication number: 20230381814
    Abstract: This application relates to methods and apparatus for driving a transducer with switching drivers. A driver circuit has first and second switching drivers for driving the transducer in a bridge-tied-load configuration, each of the switching drivers having a respective output stage for controllably switching the respective driver output node between high and low switching voltages with a controlled duty cycle. Each of switching drivers is operable in a plurality of different driver modes, wherein the switching voltages are different in said different driver modes. A controller controls the driver mode of operation and the duty cycle of the switching drivers based on the input signal. The controller is configured to control the duty cycles of the first and second switching drivers within defined minimum and maximum limits of duty cycles; and to transition between driver modes of operation when the duty cycle of one of the switching drivers reaches a duty cycle limit.
    Type: Application
    Filed: May 25, 2023
    Publication date: November 30, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Axel THOMSEN, Eric J. KING, Anthony S. DOY, Thomas H. HOFF, John L. MELANSON
  • Publication number: 20230387705
    Abstract: Apparatus for delivering power from a battery node of a battery to an output node, the output node coupled to an analyte monitoring device, the apparatus comprising: a slow charging path between the battery node and the output node; a fast charging path parallel to the slow charging path, the fast charging path switchably coupled between the battery node and the output node; and control circuitry configured to: selectively couple the fast charging path between the battery node and the output node to allow faster transfer of charge between the battery node and the output node than the slow charging path.
    Type: Application
    Filed: May 25, 2022
    Publication date: November 30, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul LESSO, Toru IDO, Claire MOTION
  • Publication number: 20230389334
    Abstract: There is described a two-terminal multi-level memristor element synthesised from binary memristors, which is configured to implement a variable resistance based on unary or binary code words. There is further described a circuit such as a synapse circuit implemented using a multi-level memristor element.
    Type: Application
    Filed: May 25, 2023
    Publication date: November 30, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John Paul LESSO, Gordon James BATES
  • Patent number: 11830740
    Abstract: A mask layout for forming a semiconductor device includes an active mask pattern, a gate electrode mask pattern, a silicide blocking mask pattern, and a contact mask pattern. The active mask pattern forms source and drain regions in a substrate. The gate electrode mask pattern, disposed to overlap the active mask pattern, forms a gate electrode between the source region and the drain region. The silicide blocking mask pattern is disposed to overlap the gate electrode mask pattern and the active mask pattern in the gate electrode, the source region, and the drain regions to form a silicide blocking region. The contact mask pattern, disposed spaced apart from the silicide blocking mask pattern, forms a contact plug on the substrate. The silicide blocking mask pattern covers the gate electrode mask pattern and extends to the active mask pattern.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: November 28, 2023
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventor: Guk Hwan Kim
  • Publication number: 20230379592
    Abstract: A system for relaying communication for a PHY/data link level communication protocol may include a first device having a first and second transceiver, the first transceiver having a first protocol controller configured to detect a first bus condition and second transceiver having a second protocol controller configured to detect a second bus condition and a switching matrix coupled to the first and second transceiver and configured to operate in a relaying mode to enable: the first protocol controller to control a physical layer of the second transceiver and enables the second protocol controller to control a physical layer of the first transceiver, a physical layer of a first transmitter of the first transceiver to receive an output of a second receiver of the second transceiver, and the physical layer of a second transmitter of the second transceiver to receive an output of a first receiver of the first transceiver.
    Type: Application
    Filed: May 17, 2023
    Publication date: November 23, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Wai-Shun SHUM, Amar VELLANKI, Jeffrey SKARZYNSKI, Gautham S. SIVASANKAR, Xingdong DAI, Venugopal CHOUKINISHI, Xiaofan FEI, Xin ZHAO
  • Publication number: 20230376063
    Abstract: This application relates to voltage regulators and, particular, to low-dropout regulators (LDOs). The regulator (300) has an output stage (102) which receives an input voltage (Vin) and outputs an output voltage (Vout) and which includes at least one transistor (103) as an output device configured to pass an output current to the output, ased on a drive voltage (V1). A differential amplifier (101) is configured to receive a feedback signal derived from the output voltage and also a reference voltage (REF) to generate an amplifier output to control the drive voltage (V1) to minimise any difference between the feedback signal and the reference voltage. A controller (301) is operable to selectively reconfigure the output stage to provide a change in output current in response to a load activity signal (ACT), which is indicative of a change in load activity that results in a change in load current demand for a load connected, in use, to the output.
    Type: Application
    Filed: May 25, 2023
    Publication date: November 23, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John L. MELANSON, John P. LESSO
  • Publication number: 20230377602
    Abstract: A detected sound signal may comprise speech or non-verbal sounds, and many non-verbal sounds contain health information. If the speech, or a non-verbal sound containing health information, was produced by an enrolled user, data relating to the sound can be stored in a storage element. A system also comprises a data modification block, for obfuscating received data to provide an obfuscated version of the stored data. The system then has a first access mechanism, for controlling access to the stored data such that only an authorised user can obtain access to said stored data, and a second access mechanism, for controlling access to said stored data such the second access mechanism only provides access to the obfuscated version of the stored data.
    Type: Application
    Filed: July 26, 2023
    Publication date: November 23, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventor: John Paul LESSO
  • Publication number: 20230366747
    Abstract: A current digital-to-analog converter may be used in a system for measuring temperature of a thermistor, with mismatch reduction techniques applied to digital-to-analog converter elements of the digital-to-analog converter in order to maximize accuracy and precisions of the temperature measurement.
    Type: Application
    Filed: March 28, 2023
    Publication date: November 16, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Vamsikrishna PARUPALLI, Zhong YOU, Johann G. GABORIAU, Amar VELLANKI, Vikrant ARUMUGAM
  • Publication number: 20230369882
    Abstract: A battery charging system may include a first current source for charging a battery that provides a direct current for charging the battery and a second current source for charging the battery that provides an alternating current for charging the battery and that provides electrical energy for operation of a system load of the battery during discharging of the battery. Further, a battery charging system may include a first current source for charging a battery that provides a direct current for charging the battery and a second current source for charging the battery that provides an alternating current at a frequency of at least 5 KHz for charging the battery.
    Type: Application
    Filed: April 27, 2023
    Publication date: November 16, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John L. MELANSON, Eric J. KING
  • Publication number: 20230353111
    Abstract: An integrated circuit (IC), comprising: a first input pin for receiving a first input signal; a first converter configured to convert the first input signal to a first output signal; a first gain stage configured to apply a first gain to the first output signal; gain update circuitry configured to: output a first external gain control signal to a first output pin of the IC; and subsequently output a first internal gain control signal to the first gain stage to update the first gain of the first gain stage, wherein output of the first internal gain control signal is delayed relative to output of the first external gain control signal by a first predetermined delay, the first predetermined delay to compensate for signal chain delay between the first input pin and the first gain stage.
    Type: Application
    Filed: November 8, 2022
    Publication date: November 2, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Andrew J. HOWLETT, Michael CHANDLER-PAGE, David P. SINGLETON, Erich P. ZWYSSIG
  • Publication number: 20230353937
    Abstract: Signal processing circuitry configured to receive an input signal and to output a processed output signal, wherein the signal processing circuitry is configured to: receive an indication of a temporal location of a transient in the input signal; and provide, in the processed output signal, a masking signal bridging the temporal location of the transient to mask the transient.
    Type: Application
    Filed: November 8, 2022
    Publication date: November 2, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Andrew J. HOWLETT, Michael CHANDLER-PAGE, Lea S. GEORGIEVA
  • Publication number: 20230344351
    Abstract: The present disclosure relates to power converter circuitry, and in particular to power converter circuitry for providing a supply voltage to a load such as amplifier circuitry. In one aspect the invention provides a system comprising: amplifier circuitry; and power converter circuitry for receiving a supply voltage and providing an output voltage to the amplifier circuitry, the power converter circuitry comprising: a control loop for regulating an output voltage of the power converter circuitry in accordance with a target output voltage value; and controller circuitry configured to adjust the target output voltage value if the supply voltage to the power converter circuitry is within a first predefined threshold of a requested output voltage of the power converter circuitry.
    Type: Application
    Filed: April 13, 2023
    Publication date: October 26, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Alastair M. BOOMER, John B. BOWLERWELL, James MUNGER, Andrew J. HOWLETT
  • Publication number: 20230345149
    Abstract: A robust analog counter that may include an output capacitor having a first capacitance, and a charging unit (CU) that is configured to determine that an event to be counted occurred, and charge the output capacitor at a first current and during a output capacitor charging period, wherein a duration of the output capacitor charging period is proportional to the first capacitance, thereby increasing an output voltage of the output capacitor by a voltage quote that is indifferent to at least one out of process variation, temperature or power supply voltage value.
    Type: Application
    Filed: April 26, 2022
    Publication date: October 26, 2023
    Applicant: Tower Semiconductor Ltd.
    Inventors: Raz Reshef, Dmitry Dain
  • Publication number: 20230341348
    Abstract: Circuitry for processing an analyte signal obtained from an electrochemical cell, the circuitry comprising: a first analog-to-digital converter (ADC) configured to generate a first digital output based on the analyte signal; a second ADC configured to generate a second digital output based on the analyte signal; and control circuitry configured to control generation of the second digital output by the second ADC based on the first digital output from the first ADC.
    Type: Application
    Filed: April 21, 2022
    Publication date: October 26, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventor: John P. LESSO
  • Publication number: 20230344388
    Abstract: This application relates to methods and apparatus for power limiting for amplifiers. An amplifier is configured to receive an input supply voltage and to draw, in use, an amplifier input current resulting in an amplifier input power. A power limiter is configured to monitor an indication of the amplifier input power, determine a first signal limit based on said indication of the amplifier input power and a pre-set limit and apply regulation to the input signal to provide a regulated input signal for input to the amplifier that does not exceed the first signal limit.
    Type: Application
    Filed: April 18, 2023
    Publication date: October 26, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Kemal S. DEMIRCI, Tian ZHAO, Jeffrey A. MAY, Theodore M. BURK, Thomas H. HOFF, Edward M. VEESER
  • Publication number: 20230343359
    Abstract: A method of detecting a suitability of a signal for live speech detection, the method comprising: receiving the signal containing speech from a transducer; measuring a signal characteristic of an audible component of the received signal; estimating an expected signal characteristic of an ultrasonic component of the received signal based on the measured signal characteristic of the audible component; determining, based on the estimated expected signal characteristic, whether the ultrasonic component is suitable for detecting whether the speech is live speech.
    Type: Application
    Filed: April 26, 2022
    Publication date: October 26, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: William E. SHERWOOD, Fred D. GEIGER, Narayan KOVVALI, Seth SUPPAPPOLA
  • Publication number: 20230344331
    Abstract: A driver apparatus for driving a load with a differential drive signal is described. For a level of input signal within a first range, a first switching driver modulates the voltage at a first output node with a first modulation index by switchably connecting at least one flying capacitor to the first output node, whilst a second switching driver modulates the voltage at a second output node with a second modulation index by controlling switching between DC voltages that are maintained throughout a switching cycle of the driver apparatus. The first and second switching drivers are controlled so, for at least a first part of the first input range, a change in input signal level results in a change of the first controlled modulation index that has a different magnitude to any change in the second controlled modulation index a constant modulation frequency of the differential drive signal is maintained.
    Type: Application
    Filed: October 21, 2022
    Publication date: October 26, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Lingli ZHANG, Yongjie CHENG, John L. MELANSON
  • Publication number: 20230344394
    Abstract: A system may include an analog loop filter comprising a plurality of analog integrators, the analog loop filter configured to receive an analog signal input and a feedback output signal, at least one sampler for sampling outputs of the analog integrators, a second loop filter coupled between an output of an analog pulse-width modulation driver and a digital pulse-width modulation controller, wherein the second loop filter comprises at least one integrator and is configured to receive sampled outputs of the analog integrators from the at least one sampler and receive a feedback pulse-width modulation signal from the analog pulse-width modulation driver, and a correction subsystem configured to apply a non-linear function to a signal path of the second loop filter in order to compensate for non-linearity introduced as a result of sampling outputs of the analog integrators.
    Type: Application
    Filed: April 20, 2023
    Publication date: October 26, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: John L. MELANSON, Abhishek MUKHERJEE, Lingli ZHANG, Zhaohui HE
  • Publication number: 20230336013
    Abstract: A method of adapting a battery charging profile of a battery may include monitoring one or more parameters associated with the battery during normal operation of a device powered from the battery and while the battery is simultaneously charged by a charger and is discharged by a dynamic system load of the device, determining an impedance of the battery based on the one or more parameters, determining a condition of the battery based on the impedance and the one or more parameters, and adapting the battery charging profile based on the condition.
    Type: Application
    Filed: April 4, 2023
    Publication date: October 19, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Emmanuel A. MARCHAIS, Eric J. KING, John L. MELANSON
  • Publication number: 20230336068
    Abstract: A power converter system may include a first power converter configured to couple via its input to a power source and configured to convert an input voltage provided by the power source to an intermediate voltage, a second power converter coupled via its input to an output of the first power converter and configured to convert the intermediate voltage to a regulated output voltage, a capacitor coupled at one of its terminals to an electrical node of the intermediate voltage. Based on one or more electrical parameters of the power converter, the second power converter is controlled to regulate the regulated output voltage at a substantially constant level and the first power converter is controlled to control the intermediate voltage to maintain the intermediate voltage between a maximum voltage and a minimum voltage and regulate an input current drawn from the power source at a substantially constant level.
    Type: Application
    Filed: June 19, 2023
    Publication date: October 19, 2023
    Applicant: Cirrus Logic International Semiconductor Ltd.
    Inventors: Jeffrey A. MAY, Eric J. KING, Christian LARSEN, Eric EKLUND