Abstract: A circuit configuration for controlling a power semiconductor device has a first circuit carrier and a second circuit carrier arranged parallel to and spaced apart from the first, and having a plastic molded body arranged in an intermediate space between the first and second circuit carrier, wherein the first circuit carrier has a first conductor track with a first contact point, which can be implemented in particular as a contact pad or as a contact receptacle, which is arranged on a main side of the first circuit carrier facing the plastic molded body, wherein the second circuit carrier has a second conductor track with a second contact point, which is arranged on a main side of the second circuit carrier facing the plastic molded body, wherein the plastic molded body has a first holder for a first component with a first and a second contact device, and wherein the first contact device is electrically conductively connected to the first contact point and the second contact device is electrically conductivel

Abstract: A power semiconductor module contains a power semiconductor assembly, a housing which in a housing side with an outer surface has a recess with a direction of passage in the normal direction of the outer surface, having an internal contact device which has an electrically conducting contact inside the housing to an external connection element, designed as a load terminal element, with one section in the recess and having a spring element. The connection element is designed as a rigid metallic shaped body with an inner and an outer contact surface, and the outer contact surface is accessible from the outside, and the connection element is connected to the housing via an electrically insulating and mechanically elastic retaining device such that the connection element is moveable in the direction of passage, and wherein the spring element is arranged and designed in such a way that the spring action thereof acts directly or indirectly on the connection element in the direction of passage.

Abstract: A power semiconductor module has a first and second intermediate circuit rail, an AC potential rail and with a packaged first and second power semiconductor switch. The respective power semiconductor switch has a first and second load current terminal and a control terminal, wherein the first power semiconductor switch is between the first intermediate circuit rail and the AC potential rail and the second power semiconductor switch is between the second intermediate circuit rail and the AC potential rail. The first load terminal of the first power semiconductor switch is contacted to the first intermediate circuit rail and the second load terminal of the first power semiconductor switch is electrically conductively contacted to the AC potential rail.

Abstract: The invention relates to a power semiconductor device comprising a pin element which passes through a housing opening, comprising a support device, further comprising an elastic sealing device which is arranged on the support device, comprising a pressure device which is arranged on the sealing device, and comprising an electrically conductive sleeve. A first pressure element of the pressure device presses a first sealing element of the sealing device against a first support element of the support device in the axial direction of the pin element causes deformation of the first sealing element so that the first sealing element presses against the housing opening wall and against the sleeve in a perpendicular direction in relation to the axial direction of the pin element.

Abstract: A diode has a semiconductor body having a first and a second semiconductor body main side. The semiconductor body has a first semiconductor zone. The semiconductor body has a second semiconductor zone arranged on the first semiconductor zone in an inner region of the semiconductor body and not extending as far as the semiconductor body edge of the semiconductor body. The semiconductor body has a third semiconductor zone arranged on the second semiconductor zone and has a higher doping concentration than the second semiconductor zone. The semiconductor body has a fourth semiconductor zone arranged on the first semiconductor zone in a semiconductor body edge region and extending from the second semiconductor zone in the direction towards the semiconductor body edge as far as the semiconductor body edge.

Abstract: A power semiconductor circuit comprising a field effect transistor having a drain, a source and a gate as terminals, and further comprising a control device having a drive device and an undervoltage detection circuit. The drive device drives the field effect transistor and is electrically connected to the gate of the field effect transistor. The undervoltage detection circuit generates an undervoltage detection signal if a power semiconductor voltage present between the drain and the source of the field effect transistor falls below a specific voltage value. The drive device switches on the field effect transistor when a switch-on command for switching on the field effect transistor and the undervoltage detection signal are present. The invention provides a power semiconductor circuit with low energy loss.

Abstract: The invention relates to a power electronic switching device having a substrate, which has a non-conductive insulation layer on which at least one first conductor track 40 and at least one second conductor track 50 are applied. The first conductor track 40 is assigned an electrical DC voltage potential DC+ of the power electronic switching device and the one second conductor track 50 is assigned an electrical AC voltage potential AC of the power electronic switching device. At three first partial power switches are arranged on the first conductor track. At least three second partial power switches are arranged on the second conductor track. The at least three first partial power switches are connected electrically in parallel with each other to form a first parallel circuit and the at least three second partial power switches are electrically connected in parallel with each other to form a second parallel circuit.

Abstract: A power electronics method and assembly produced by the method. The assembly has a substrate, having a power semiconductor element, and an adhesion layer disposed therebetween, wherein the substrate has a first surface that faces a power semiconductor element, a power semiconductor element has a third surface that faces the substrate, the adhesion layer has a second surface which, preferably across the full area, contacts the third surface and has a first consistent surface contour having a first roughness, and wherein a fourth surface of the power semiconductor element that is opposite the third surface has a second surface contour having a second roughness, said second surface contour following the first surface contour.

Abstract: A control device for a power semiconductor switch, includes an actuating device, a first current path, a second current path, which connects the second output of the actuating device to a circuit node of the control device in an electrically conductive manner, wherein the second current path incorporates an electrical switching off resistor which is electrically connected in-circuit between a second output of the actuating device and the circuit node of the control device, a third current path, which connects the circuit node of the control device to a control device terminal of the control device in an electrically conductive manner, and an switching off acceleration circuit, which is electrically connected in parallel with the switching off resistor, comprising a diode, an electrical resistor, and a capacitor which is electrically connected in parallel with said resistor, wherein the cathode of the diode is connected to a second electrical terminal of the capacitor in an electrically conductive manner, and

Abstract: A power electronic switching device having plurality of potential surfaces. At least two different potentials are respectively assigned to at least one of the potential surfaces. A plurality of semiconductor components are arranged in an n×m matrix, oriented in the x-y-direction, on a first conductor track, formed by at least one potential surface of the first potential. The semiconductor components are connected in parallel with one another and form a current valve. In this case, the semiconductor components can be distributed among a plurality of potential surfaces of the first potential which form the first conductor track.

Abstract: A pressing ram having an elastic cushion element and intended for the material-bonded press-sintering connection of a first connection partner to a second connection partner of a power-electronics component. The elastic cushion element of the pressing ram is enclosed by a dimensionally stable frame, within which the cushion element and a guide part of the pressing ram are guided for linear movement such that the dimensionally stable frame lowers onto the first connection partner, or a workpiece carrier with the first connection partner arranged therein, and, following abutment against the same, the pressing ram together with the elastic cushion element is lowered onto the second connection partner and the elastic cushion exerts a pressure necessary for connecting the first connection partner to the second connection partner.

Abstract: Method and apparatus for the electrodeposition of a contact metal layer on contact areas of semiconductor components in a wafer assemblage. The method comprises: a) providing a wafer having components having at least one pn junction; b) arranging a non-conductive homogenizing device with respect to the first surfaces of the components, and an electrical contact device at a second surface of the wafer; c) introducing the wafer into an electroplating bath having an electrode, wherein the surface thereof consists at least partly of a first contact metal, and wherein the first surface of the components is in contact with the electroplating bath; d) applying a voltage to the electrode and to the contact device, as a result of which current flows between the electrode and the contact device, through the electroplating bath and the component and contact metal is thus deposited at the first contact areas of the components.

Abstract: A power electronic arrangement having a power semiconductor module and an external load-connecting element is provided with the external load-connecting element has a first connection device, and the power semiconductor module has a housing, a base plate and an internal load-connecting element with a second connection device, wherein the base plate has a first cut out through which the first connection device extends into the interior of the power semiconductor module and is connected there in a frictionally locking and electrically conductive fashion to a second connection device of the internal load-connecting element.

Abstract: The invention relates to a power semiconductor device comprising a pin element which passes through a housing opening, comprising a support device, further comprising an elastic sealing device which is arranged on the support device, comprising a pressure device which is arranged on the sealing device, and comprising an electrically conductive sleeve. A first pressure element of the pressure device presses a first sealing element of the sealing device against a first support element of the support device in the axial direction of the pin element causes deformation of the first sealing element so that the first sealing element presses against the housing opening wall and against the sleeve in a perpendicular direction in relation to the axial direction of the pin element.

Abstract: A control device for a power semiconductor switch includes an actuating device, which on a third control device terminal, upon the reception of a switching on command, generates an actuating voltage for the switching on of the power semiconductor switch and, upon the reception of an switching off command, generates an actuating voltage for the switching off of the power semiconductor switch, and a current detection circuit, which generates a first high-current signal if an actuating voltage assumes a voltage value at which the power semiconductor switch is switched on, and a primary voltage of the power semiconductor switch applied between first and second control device terminals exceeds a first power semiconductor switch primary voltage value.

Abstract: The invention relates to a power semiconductor device having a pin element which passes through a housing opening, an elastic sealing device which is arranged between a housing opening wall of the housing, where the housing opening wall delimits the housing opening and encircles the pin element. The pin element runs through the sleeve and through a sealing device opening of the sealing element. The sealing device is not connected in a materially bonded manner to the sleeve, to the housing opening wall and to the pin element and the sealing device seals off the housing opening wall from the sleeve and seals off the sleeve from the pin element. A crosslinked potting compound is arranged on the sealing device. The crosslinked potting compound is connected in a materially bonded manner to the sleeve, to the housing opening wall and to the pin element and the potting compound seals off the housing opening wall from the sleeve and seals off the sleeve from the pin element.

Abstract: A diode has a semiconductor body having a first and a second semiconductor body main side, wherein the semiconductor body has a first semiconductor zone, wherein the semiconductor body has a second semiconductor zone arranged on the first semiconductor zone in an inner region of the semiconductor body and not extending as far as the semiconductor body edge of the semiconductor body, wherein the semiconductor body has a third semiconductor zone arranged on the second semiconductor zone and having a higher doping concentration than the second semiconductor zone, wherein the semiconductor body has a fourth semiconductor zone arranged on the first semiconductor zone in a semiconductor body edge region and extending from the second semiconductor zone in the direction towards the semiconductor body edge as far as the semiconductor body edge, wherein the semiconductor body has a cutout proceeding from a planar outer surface of the third semiconductor zone, which forms a surface region of the second semiconductor bod