Patents Assigned to Sharp
  • Patent number: 7377660
    Abstract: A photographing assisting apparatus is used when a subject is photographed using a photographing apparatus. The photographing assisting apparatus has a planar light source that, while in a state covering a to-be-photographed area on the subject, shines light on the to-be-photographed area on the subject and that is translucent in the direction pointing from the to-be-photographed area on the subject to the photographing apparatus, and a support portion that supports the photographing apparatus such that the distance between the subject and the photographing apparatus is kept fixed. The photographing assisting apparatus permits the subject to be illuminated with more evenly distributed brightness and permits a given illumination condition of the subject to be obtained stably.
    Type: Grant
    Filed: December 16, 2004
    Date of Patent: May 27, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Yoshihiro Izumi
  • Patent number: 7379594
    Abstract: Methods and systems for segmentation of digital mixed-content documents. Segmentation processes may include identification of text and background regions and identification of contone regions outside the text and background regions. Further analysis may be performed to identify additional text and background regions within the contone regions thereby identifying verified contone regions, which may then be divided into contone sub-regions.
    Type: Grant
    Filed: January 28, 2004
    Date of Patent: May 27, 2008
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: A. Mufit Ferman, Richard J. Campbell, John E. Dolan
  • Patent number: 7379140
    Abstract: A liquid crystal display device includes a first substrate and a second substrate sandwiching a liquid crystal layer therebetween, a first polarizer disposed adjacent to the first substrate at a side opposite to a side of the first polarizer facing the liquid crystal layer, with a first gap between the first polarizer and the first substrate, a second polarizer disposed adjacent to the second substrate at a side opposite to a side of the second polarizer facing the liquid crystal layer, with a second gap between the second polarizer and the second substrate, wherein at least one of the first and second gaps includes therein a first retardation film having a positive optical anisotropy and a second retardation film having a negative optical anisotropy, such that the first retardation film is disposed closer to the liquid crystal layer with respect to the second retardation film.
    Type: Grant
    Filed: May 16, 2006
    Date of Patent: May 27, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Katsufumi Ohmuro, Yoshio Koike, Takahiro Sasaki, Hideaki Tsuda, Hideo Chida
  • Patent number: 7378309
    Abstract: A method of fabricating local interconnect on a silicon-germanium 3D CMOS includes fabricating an active silicon CMOS device on a silicon substrate. An insulator layer is deposited on the silicon substrate and a seed window is opened through the insulator layer to the silicon substrate and to a silicon CMOS device gate. A germanium thin film is deposited on the insulator layer and into windows, forming a contact between the germanium thin film and the silicon device. The germanium thin film is encapsulated in a dielectric material. The wafer is heated at a temperature sufficient to flow the germanium, while maintaining the other layers in a solid condition. The wafer is cooled to solidify the germanium as single crystal germanium and as polycrystalline germanium, which provides local interconnects. Germanium CMOS devices may be fabricated on the single crystal germanium thin film.
    Type: Grant
    Filed: March 15, 2006
    Date of Patent: May 27, 2008
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Jong-Jan Lee, Paul J. Schuele, Sheng Teng Hsu, Jer-Shen Maa
  • Patent number: 7378286
    Abstract: The present invention discloses a novel transistor structure employing semiconductive metal oxide as the transistor conductive channel. By replacing the silicon conductive channel with a semiconductive metal oxide channel, the transistors can achieve simpler fabrication process and could realize 3D structure to increase circuit density. The disclosed semiconductive metal oxide transistor can have great potential in ferroelectric non volatile memory device with the further advantages of good interfacial properties with the ferroelectric materials, possible lattice matching with the ferroelectric layer, reducing or eliminating the oxygen diffusion problem to improve the reliability of the ferroelectric memory transistor. The semiconductive metal oxide film is preferably a metal oxide exhibiting semiconducting properties at the transistor operating conditions, for example, In2O3 or RuO2.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: May 27, 2008
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Sheng Teng Hsu, Tingkai Li, Jong-Jan Lee
  • Patent number: 7380121
    Abstract: An image processing device of the present invention includes a management section for storing an authentication level set in accordance with the volume of image processing which is predicted in accordance with at least one of day and time. When a request for image processing to image data is made, an authentication section changes the authentication level for user authentication in accordance with at least one of day and time. Then, in accordance with this authentication result, requested image processing is performed.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: May 27, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Tatsuo Nomura, Syouichiro Yoshiura, Tsutomu Yoshimoto
  • Patent number: 7378599
    Abstract: A printed circuit board has a substrate formed of an insulator, a strip line provided on a front surface of the substrate, and a ground metal layer provided on a rear surface of the substrate. An opening is provided in the ground metal layer to reach the substrate. A radio wave receiving converter and an antenna device each include the printed circuit board.
    Type: Grant
    Filed: January 9, 2003
    Date of Patent: May 27, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Junichi Somei
  • Patent number: 7379040
    Abstract: A display device includes: a plurality of pixel electrodes; a counter electrode provided so as to oppose the plurality of pixel electrodes to form a display capacitor between each of the plurality of pixel electrodes and the counter electrode; a plurality of storage capacitor electrodes provided so as to respectively oppose the plurality of pixel electrodes to form storage capacitors therebetween; a storage capacitor line electrically connecting together the plurality of storage capacitor electrodes; a test storage capacitor line terminal electrically connected to the storage capacitor line; and a test counter electrode terminal electrically connected to the counter electrode.
    Type: Grant
    Filed: May 24, 2004
    Date of Patent: May 27, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Hideaki Kitazoe
  • Patent number: 7379137
    Abstract: The liquid crystal display device of the present invention includes picture element regions each include a transparent region for providing a transmission mode display and a reflection region for providing a reflection mode display. In each of the picture element regions, the first electrode includes a solid area formed of a conductive film and a non-solid area with no conductive film provided, the liquid crystal layer, in the presence of an applied voltage, forms liquid crystal domains each in a radially-inclined orientation by an inclined electric field generated in the vicinity of the solid area. The second substrate includes a stepped portion having an upper tier located in the reflection region, a lower tier located in the transmission region and a side surface connecting the upper tier and the lower tier to each other, and the side surface of the stepped portion is located in the reflection region and is covered with the second electrode.
    Type: Grant
    Filed: February 2, 2005
    Date of Patent: May 27, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Masumi Kubo
  • Patent number: 7378687
    Abstract: In order to provide a photothyristor having high breakdown voltage and less-varying light sensitivity by improving the sensitivity and the breakdown voltage of the device while maintaining the device small, the device includes a silicon substrate, a transistor portion including an anode region, a gate region and a cathode region and placed on a first main surface of the silicon substrate, a light-receiving portion for receiving light from the outside, and an electrode for establishing an ohmic contact between the anode region and the cathode region. The light receiving portion includes an oxygen-doped polysilicon film overlaid on the silicon substrate through a transparent insulating film and is disposed to surround the transistor portion. The electrode is placed above the transistor portion and has a double-structure consisting of a center portion and an outer portion surrounding the center portion, and the center portion and the outer portion are electrically connected.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: May 27, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Satoshi Nakajima, Seigo Okada
  • Patent number: 7379320
    Abstract: An MFIS memory array having a plurality of MFIS memory transistors with a word line connecting a plurality of MFIS memory transistor gates, wherein all MFIS memory transistors connected to a common word line have a common source, each transistor drain serves as a bit output, and all MFIS channels along a word line are separated by a P+ region and are further joined to a P+ substrate region on an SOI substrate by a P+ region is provided. Also provided are methods of making an MFIS memory array on an SOI substrate; methods of performing a block erase of one or more word lines, and methods of selectively programming a bit.
    Type: Grant
    Filed: October 28, 2005
    Date of Patent: May 27, 2008
    Assignee: Sharp Laboratories of America, Inc.
    Inventors: Sheng Teng Hsu, Fengyan Zhang, Tingkai Li
  • Patent number: 7379694
    Abstract: A combined resistance R1=Vt1/I1 (MO) of a transfer belt (61) and a recording sheet obtained when a transfer current I1 (?A) passes through the transfer belt (61) and the recording sheet upon application of a first transfer bias voltage Vt1 (V) to a transfer roller (6b) from a high-voltage power source (6f) and a combined resistance R2=Vt2/I2 (MO) of the transfer belt (61) and the recording sheet obtained when a transfer current I2 (?A) passes through the transfer belt (61) and the recording sheet upon application of a second transfer bias voltage Vt2 (V) to the transfer roller (6b) from the high-voltage power source (6f), are established to have the relationship: R2/R1=7 ?(I2)?0.5 therebetween.
    Type: Grant
    Filed: March 10, 2004
    Date of Patent: May 27, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Toshiki Takiguchi, Yoko Sawa, Hirokazu Yamauchi, Yoshiaki Masuda, Yoshie Iwakura, Hiroshi Ishii
  • Publication number: 20080116472
    Abstract: A semiconductor light emitting element including a conductive substrate, a bonding metal layer formed on the conductive substrate, a barrier layer formed on the bonding metal layer, a reflective layer formed on the barrier layer, an ohmic electrode layer formed on the reflective layer, a second conductivity type semiconductor layer formed on the ohmic electrode layer, a light emitting layer formed on the second conductivity type semiconductor layer, and a first conductivity type semiconductor layer formed on the light emitting layer, wherein outer peripheries of the second conductivity type semiconductor layer, the light emitting layer, and the first conductivity type semiconductor layer are removed, and a method of manufacturing the same are provided.
    Type: Application
    Filed: November 19, 2007
    Publication date: May 22, 2008
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Atsuo TSUNODA
  • Publication number: 20080118999
    Abstract: A method of fabricating a nitride semiconductor light emitting device includes the steps of: depositing on a substrate a first n-type nitride semiconductor layer, a light emitting layer, a p-type nitride semiconductor layer, and p-type nitride semiconductor tunnel junction layer containing an indium, in this order; depositing a nitride semiconductor evaporation reduction layer on the p-type nitride semiconductor tunnel junction layer at the temperature of the substrate which is at most a temperature higher by 150° C.
    Type: Application
    Filed: November 16, 2007
    Publication date: May 22, 2008
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Satoshi Komada
  • Publication number: 20080117789
    Abstract: In the optical pickup device, a luminous flux emitted from a blue-violet laser as S wave to a blue-violet PBS, passes through a half-wave plate, and is reflected by the blue-violet PBS and a total reflection mirror, before being applied to a BD disc via an objective lens. Luminous fluxes, which were emitted respectively from an infrared laser emitting device and a red laser emitting device and were reflected respectively by infrared and red PBSs, among aligned infrared, red and blue-violets PBSs, before reaching the blue-violet PBS, are reflected by the blue-violet PBS. The luminous fluxes emitted from the blue-violet laser emitting device as P waves pass the blue-violet PBS, and are respectively applied to a CD disc, a DVD disc, or a HD-DVD disc via an diffractive object lens. Thus, it becomes possible to write or read access to four kinds of discs with three wavelengths.
    Type: Application
    Filed: November 15, 2007
    Publication date: May 22, 2008
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Taizoh Yokota, Osamu Miyazaki, Yasuo Nakata
  • Publication number: 20080116476
    Abstract: In a nitride semiconductor light-emitting device having an active layer between an n-type nitride semiconductor layer and a p-type nitride semiconductor layer, the active layer has a multiple quantum well structure including a plurality of InxGa1-xN (0<x?1) quantum well layers and a plurality of InyGa1-yN (0?y<1) barrier layers stacked alternately, and at least one of the plurality of barrier layers has a super-lattice structure in which a plurality of barrier sub-layers having mutually different In composition ratios are stacked periodically.
    Type: Application
    Filed: November 15, 2007
    Publication date: May 22, 2008
    Applicant: Sharp Kabushiki Kaisha
    Inventor: Satoshi KOMADA
  • Publication number: 20080117469
    Abstract: The present invention provides an image processing apparatus capable of preventing a specific image from being added without imposing a burden on the user, at the time of printing image data to which the specific image need not be added. The image processing apparatus includes a processing section configured to process the image data according to processing information, a specific image adding section 63 configured to add the specific image to the image data, and an addition determination section 65 configured to determine whether or not the specific image needs to be added, on the basis of the processing information. When the processing information includes unique information for preventing the image data from being kept confidential, the addition determination section 65 determines that the specific image need not be added.
    Type: Application
    Filed: November 16, 2007
    Publication date: May 22, 2008
    Applicant: Sharp Kabushiki Kaisha
    Inventors: Nobuyuki Ueda, Shuhji Fujii
  • Publication number: 20080116477
    Abstract: A nitride semiconductor light emitting device includes a substrate, and a first n-type nitride semiconductor layer, a light emitting layer, a first p-type nitride semiconductor layer, a second p-type nitride semiconductor layer, a p-type nitride semiconductor tunnel junction layer, an n-type nitride semiconductor tunnel junction layer and a second n-type nitride semiconductor layer that are formed on the substrate. The p-type nitride semiconductor tunnel junction layer and the n-type nitride semiconductor tunnel junction layer form a tunnel junction, and the p-type nitride semiconductor tunnel junction layer has an indium content ratio higher than that of the second p-type nitride semiconductor layer. At least one of the p-type nitride semiconductor tunnel junction layer and the n-type nitride semiconductor tunnel junction layer includes aluminum.
    Type: Application
    Filed: November 16, 2007
    Publication date: May 22, 2008
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Satoshi Komada
  • Publication number: 20080116471
    Abstract: A semiconductor light-emitting device has an n-type DBR layer (3), an n-type cladding layer (4), an active layer (5), a p-type cladding layer (6), a p-type intermediate layer (7), a p-type contact layer (8), a p-type transparent substrate (9), ohmic electrodes (10 and 11), and a reflecting layer (12). The n-type DBR layer (3) has reflectivity for the emission wavelength of the active layer (5).
    Type: Application
    Filed: November 15, 2007
    Publication date: May 22, 2008
    Applicant: SHARP KABUSHIKI KAISHA
    Inventor: Nobuyuki WATANABE
  • Publication number: 20080117462
    Abstract: An improved printer controller system includes bitmap buffers for storing bitmaps as uncompressed data and a buffer manager for managing an allocation of the bitmap buffers to the bitmaps. The buffer manager is configured to recap one of the bitmap buffers according to a bitmap identifier associated with a requested bitmap. A method for managing buffer allocation in a printer apparatus includes allocating one or more buffers to a bitmap, assigning a bitmap identifier to the one or more buffers, and printing the stored bitmap. The method further includes releasing the one or more buffers, receiving a request including the bitmap identifier, and reallocating the one or more buffers to the stored bitmap.
    Type: Application
    Filed: November 22, 2006
    Publication date: May 22, 2008
    Applicant: SHARP LABORATORIES OF AMERICA, INC.
    Inventor: GARY LIN GAEBEL