Patents Assigned to SII SEMICONDUCTOR CORPORATION
  • Patent number: 9337077
    Abstract: A semiconductor device includes a P-type semiconductor substrate including a pad, a ground pad, and a power supply pad, a first N-type diffusion region formed on the P-type semiconductor substrate and connected to the pad, an internal circuit region formed on the P-type semiconductor substrate, and a minority carrier capture region formed between the first N-type diffusion region and the internal circuit region for capturing minority carriers in the P-type semiconductor substrate caused by a surge to the pad. The minority carrier capture region has a triple guard ring including a first P-type diffusion region, a second P-type diffusion region, and a second N-type diffusion region located between the first P-type diffusion region and the second P-type diffusion region. Each of the first P-type diffusion region and the second P-type diffusion region is connected to the ground pad respectively through metal film wirings that are separately formed.
    Type: Grant
    Filed: December 19, 2013
    Date of Patent: May 10, 2016
    Assignee: SII Semiconductor Corporation
    Inventors: Hitomi Sakurai, Yoshitsugu Hirose
  • Patent number: 9323262
    Abstract: Provided is a voltage regulator capable of preventing breakdown of a gate of an input transistor even when an overshoot occurs at an output terminal. The voltage regulator includes a diode, which is provided to an input transistor to which a divided voltage of an error amplifier circuit is input. The diode includes a cathode connected to a source of the input transistor and an anode connected to a gate thereof.
    Type: Grant
    Filed: January 16, 2015
    Date of Patent: April 26, 2016
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventor: Tsutomu Tomioka
  • Patent number: 9322672
    Abstract: Provided is a magnetic sensor device capable of performing signal processing at high speed with high accuracy. The magnetic sensor device includes: a plurality of Hall elements; a plurality of differential amplifiers to which the plurality of Hall elements are connected, respectively; a detection voltage setting circuit for outputting a reference voltage; and a comparator including: a plurality of differential input pairs connected to the plurality of differential amplifiers, respectively; and a differential input pair connected to the detection voltage setting circuit.
    Type: Grant
    Filed: February 19, 2014
    Date of Patent: April 26, 2016
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventors: Daisuke Muraoka, Minoru Ariyama
  • Patent number: 9323258
    Abstract: Provided is a voltage regulator that is low in current consumption and is capable of suppressing the occurrence of an excessive overshoot at an output terminal when a power supply voltage becomes high in a non-regulated state. The voltage regulator includes: an overshoot limiting circuit for detecting an occurrence of an overshoot in an output voltage and limiting a current of the output transistor; and a non-regulated state detection circuit for detecting a non-regulated state of the voltage regulator based on a voltage of an output terminal and a current flowing through the output transistor. The overshoot limiting circuit has an operating current controlled by a detection signal of the non-regulated state detection circuit.
    Type: Grant
    Filed: March 5, 2015
    Date of Patent: April 26, 2016
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventors: Takao Nakashimo, Tadashi Kurozo
  • Patent number: 9310775
    Abstract: To provide an analog electronic timepiece which prevents a crystal oscillation circuit from malfunctioning even if a battery voltage is lowered at motor loading. An analog electronic timepiece is equipped with a crystal vibrator, an oscillation circuit, a frequency division circuit, a constant voltage circuit, an output control circuit, and a motor. The analog electronic timepiece is configured in such a manner that the constant voltage circuit has a voltage holding circuit connected between a gate of an output transistor and a power supply terminal, and the oscillation circuit and the frequency division circuit are operated with a constant voltage generated by the constant voltage circuit as a power supply.
    Type: Grant
    Filed: July 13, 2015
    Date of Patent: April 12, 2016
    Assignee: SII SEMICONDUCTOR CORPORATION
    Inventors: Makoto Mitani, Kotaro Watanabe