Abstract: Provided is a voltage regulator capable of applying an optimal overshoot suppression unit depending on states. The voltage regulator includes: an amplifier for controlling an output transistor based on a voltage obtained by amplifying a difference between a divided voltage and a reference voltage; a first overshoot suppression unit for controlling a gate voltage of the output transistor, to thereby suppress overshoot of the output voltage; a second overshoot suppression unit for controlling an operating current of the amplifier, to thereby suppress the overshoot of the output voltage; and a control circuit. The control circuit is configured to turn on the first overshoot suppression unit immediately after the voltage regulator is powered on, and turn off the first overshoot suppression unit under a state in which the output voltage is stable.

Abstract: Provided is a highly safe battery device in which the accuracy of an overcurrent detection current value and a short-circuit current value is improved and current consumption is reduced. A short-circuit and overcurrent detecting circuit includes: a reference voltage circuit configured to output a reference voltage generated when a constant current flows through an impedance element and a transistor having a resistance value that is changed depending on a voltage of a secondary battery; a first comparator circuit configured to compare a voltage of an overcurrent detecting terminal with the reference voltage; and a second comparator circuit configured to compare a voltage based on the voltage of the overcurrent detecting terminal with the reference voltage.

Abstract: The following configuration is adopted in order to provide a highly reliable optival sensor device which enhances the reliability of devices without making the devices unsuitable for size and thickness reductions. The light sensor comprises an element-mounting portion (3) having a cavity and a lid member closely attached thereinto, the lid member being composed of: a window (2) constituted of a phosphate-based glass to which properties approximate to a spectral luminous efficacy properties have been imparted by compositional control; and a frame (1) constituted of a phosphate-based glass having light-shielding properties.

Abstract: A battery remaining power predicting device is provided which is equipped with a first voltage detection portion which detects the voltage of a battery, a second voltage detection portion which detects a voltage across a current sense resistor for detecting a load current, a controller which predicts the remaining power of the battery, based on the values of the voltages detected by the first and second voltage detection portions, and a constant current source which allows a constant current to flow through the current sense resistor. The controller is configured to calculate a resistance value of the current sense resistor, based on the detected voltage of the second voltage detection portion when the load current flows, and the detected voltage of the second voltage detection portion when the load current and the constant current flow.

Abstract: Provided is a highly safe battery device in which the accuracy of an overcurrent detection current value is high. A charge and discharge control circuit includes an overcurrent detecting terminal, an overcurrent detecting circuit for detecting overcurrent of a secondary battery, the overcurrent detecting circuit being connected to the overcurrent detecting terminal, and a constant current circuit for causing a current to flow to the overcurrent detecting terminal.

Abstract: To provide a delay circuit improved in the accuracy of a delay time. A delay circuit is provided which includes a plurality of switches respectively provided between a plurality of constant current sources and a delay time adjustment terminal, a control circuit which ON/OFF-controls the switches, and a comparator circuit which compares a voltage of the delay time adjustment terminal and a reference voltage. The control circuit sequentially turns ON the switches every preset period after a signal is inputted to a signal input terminal and sets as a delay time, a time taken for the comparator circuit to detect that the voltage of the delay time adjustment terminal exceeds the reference voltage.

Abstract: A short-circuit and overcurrent detecting circuit includes a reference voltage circuit including a constant current circuit, a first impedance element, a first transistor having a resistance value depending a voltage of a secondary battery, a second impedance element, and a second transistor having a resistance value depending the voltage of the secondary battery, which are connected in series. The reference voltage circuit outputs a first reference voltage from a node of the constant current circuit and the first impedance element, and outputs a second reference voltage from a node of the first transistor and the second impedance element. The short-circuit and overcurrent detecting circuit further includes: a first comparator circuit for comparing a voltage of an overcurrent detecting terminal with the first reference voltage; and a second comparator circuit for comparing the voltage of the overcurrent detecting terminal with the second reference voltage.

Abstract: Provided is a voltage regulator in which an output current can be controlled stably and accurately to an overcurrent protection set value without the need of providing a phase compensation circuit including an element having a large area. The voltage regulator includes a constant voltage control circuit including: a first differential amplifier circuit for comparing a first reference voltage and a feedback voltage to each other; and an output transistor to be controlled by an output voltage of the first differential amplifier circuit, and an overcurrent protective circuit including: a resistor for measuring the output current; a second differential amplifier circuit for measuring a difference between voltages at both terminals of the resistor; a comparator for comparing an output voltage of the second differential amplifier circuit and a second reference voltage to each other; and a switch to be controlled by a detection signal of the comparator.

Abstract: To provide a voltage regulator capable of maintaining the accuracy of an output voltage even if it is set to an arbitrary output voltage. A voltage regulator includes an output transistor comprised of an NMOS transistor having a backgate grounded, an error amplifier circuit configured to amplify and output a difference between a divided voltage obtained by dividing an output voltage outputted from the output transistor and a reference voltage and thereby to control a gate of the output transistor, a constant voltage circuit, and a transistor having a gate inputted with a voltage of the constant voltage circuit, a drain connected to the gate of the output transistor, and a source connected to a source of the output transistor.

Abstract: To provide a magnetic sensor circuit that outputs a desired detection pulse while preventing an erroneous detection/erroneous release pulse output when a fluctuation in a power supply voltage occurs within an operating power supply voltage range. A magnetic sensor circuit is configured to include a detection circuit that detects a fluctuation in a power supply voltage or an internal power supply voltage and so as not to latch a determination output of a comparator by a latch circuit that, on the basis of a power supply fluctuation detection signal output from the detection circuit, holds the logic of a control clock signal output from an oscillation circuit for a prescribed period of time and determines the output logic of an output terminal.

Abstract: To provide a crystal oscillation circuit low in current consumption and stably short in oscillation start time. A crystal oscillation circuit is equipped with a crystal vibrator, a feedback resistor, a bias circuit, a constant voltage circuit, and an oscillation inverter configured by a constant current inverter. The oscillation inverter is configured so as to be controlled by currents based on input signals from the bias circuit and the crystal vibrator and driven by an output voltage of the constant voltage circuit.

Abstract: There is provided a nonvolatile memory device having a writing error preventing function with high noise resistance. This structure includes a switch and a noise filter circuit connected in parallel to a clock terminal, wherein a clock pulse monitoring circuit compares the number of clocks input from the clock terminal with a prescribed number, and when detecting abnormality in the number of clocks, switches to a noise countermeasure mode in which the switch is turned off to validate the noise filter circuit.

Abstract: Provided is a voltage regulator capable of keeping the accuracy of an output voltage thereof even at high temperature. The voltage regulator includes: a reference voltage circuit configured to output a reference voltage; an output transistor configured to output an output voltage; a voltage divider circuit configured to divide the output voltage to output a divided voltage; an error amplifier circuit configured to amplify a difference between the reference voltage and the divided voltage, and output the amplified difference to control a gate of the output transistor; a switching circuit configured to switch the divided voltage of the voltage divider circuit; and a temperature detection circuit configured to output a signal in accordance with temperature to control the switching circuit.

Abstract: A semiconductor nonvolatile memory element is used to form a constant current source in a semiconductor integrated circuit device. The semiconductor nonvolatile memory element includes a control gate electrode, a floating gate electrode, source/drain terminals, a thin first gate insulating film, and a second gate insulating film that is thick enough not to be broken down even when a voltage higher than an operating voltage of the semiconductor integrated circuit device is applied thereto, the first and second gate insulating films being formed below the control gate electrode. Thus, provided is a normally on type semiconductor nonvolatile memory element in which a threshold voltage can be regulated through injection of a large amount of charge with respect to the operating voltage from a drain terminal into the floating gate electrode via the second gate insulating film, and injected carriers do not leak in an operating voltage range.

Abstract: Provided is a DC/DC converter capable of operating a circuit to perform stable control even when an output voltage becomes 0 V at the time of activation of a power supply voltage or due to a load short circuit. The DC/DC converter includes an ON-timer circuit including: a ripple generation circuit configured to generate and output a ripple component based on a control signal; an averaging circuit configured to output a signal obtained by averaging an output of the ripple generation circuit; a timer circuit configured to generate and output an ON-time signal based on the signal of the averaging circuit and the control signal; and an activation circuit configured to increase a voltage of an output terminal of the ripple generation circuit to a predetermined voltage.

Abstract: Provided is a highly sensitive vertical Hall element without increasing a chip area. In the vertical Hall element, trenches each filled with an insulating film are formed between a first current supply end and voltage output ends, respectively, which enables the restriction of current flow into the voltage output ends to increase the ratio of a current component perpendicular to a substrate surface, resulting in enhanced sensitivity.

Abstract: A semiconductor wafer has formed thereon various types of semiconductor chips and enables different types of semiconductor chips having the same chip size to be easily distinguished. An excluded region is formed on an outer periphery of the semiconductor wafer, and a region inside the excluded region is divided into different types of regions by boundaries. Mark chips are respectively arranged in the vicinity of both ends of the boundaries.

Abstract: An ultraviolet-erasable nonvolatile semiconductor device has a protective film comprised of a silicon nitride film on which is laminated a silicon oxynitride film. The silicon nitride film has a thickness of 1000 ? or more and 2000 ? or less and the silicon oxynitride film has a thickness of about 7000 ? or more. The silicon nitride film and the silicon oxynitride film cooperate to prevent moisture from penetrating into the ultraviolet-erasable nonvolatile semiconductor device. The thickness of the silicon nitride film is set so that the time for erasing data in a nonvolatile semiconductor storage element through irradiation with ultraviolet rays is not increased.

Abstract: A semiconductor device has first and second NMOS transistors and an internal circuit, all formed in the same semiconductor substrate. The first NMOS transistor has a gate connected to a power supply terminal configured for connection to a power supply, a source and a back gate connected to an internal ground node, and a drain connected to a ground terminal configured for connection to the power supply. The second NMOS transistor has a gate connected to the ground terminal, a source and a back gate connected to the internal ground node, and a drain connected to the power supply terminal. The internal circuit is configured to operate with a voltage between the power supply terminal and the internal ground node. During a normal connection state in which the power supply is normally connected to the semiconductor device, current flows through the internal circuit and the second NMOS transistor.

Abstract: There is provided a voltage regulator that stably operates without using a large phase compensation capacitance. The voltage regulator has a voltage 3-stage amplifier circuit comprised of a differential amplifier circuit, a first source ground amplifier circuit provided with a phase compensation circuit, and a second source ground amplifier circuit, which serves as an output circuit. The voltage 3-stage amplifier circuit is provided, between the first source ground amplifier circuit and the second source ground amplifier circuit, with a phase compensation circuit that is effective for reducing the gains of the differential amplifier circuit and the first source ground amplifier circuit.