Patents Assigned to Silicon Motion, Inc.
  • Patent number: 11188267
    Abstract: The invention introduces a method for handling sudden power off recovery, performed by a processing unit of an electronic apparatus, to include: driving a flash interface to program data sent by a host into pseudo single-level cell (pSLC) blocks of multiple logical unit numbers (LUNs) in a single-level cell (SLC) mode with multiple channels after detecting that the electronic apparatus has suffered a sudden power off (SPO). The pSLC blocks are reserved from being written any data in regular operations until the SPO is detected.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: November 30, 2021
    Assignee: SILICON MOTION, INC.
    Inventors: Jieh-Hsin Chien, Yi-Hua Pao
  • Patent number: 11188265
    Abstract: A method for performing storage space management, an associated data storage device, and a controller thereof are provided. The method includes: receiving an identify controller command from a host device; in response to the identify controller command, returning a reply to the host device to indicate that a plurality of logical block address (LBA) formats are supported, where the plurality of LBA formats are related to access of a non-volatile (NV) memory, and the plurality of LBA formats include a first LBA format and a second LBA format; receiving a first namespace (NS) management command from the host device; in response to the first NS management command, establishing a first NS adopting the first LBA format; receiving a second NS management command from the host device; and in response to the second NS management command, establishing a second NS adopting the second LBA format.
    Type: Grant
    Filed: April 19, 2020
    Date of Patent: November 30, 2021
    Assignee: Silicon Motion, Inc.
    Inventors: Sheng-I Hsu, Ching-Chin Chang
  • Publication number: 20210365197
    Abstract: A flash memory initialization method executed by a flash memory initialization device to initialize a flash memory device having a flash memory and a flash memory controller includes: determining an acceptable maximum number N of candidate addresses; determining a number M of different capacity sizes; classifying the candidate addresses into M portions; determining a difference value between two address values of any two adjacent addresses among the m-th portion of candidate addresses; determining multiple address values of the m-th portion of candidate addresses according to the difference value; and determining actual addresses of the m-th portion of candidate addresses according to the multiple address values; and controlling the flash memory controller to write the boot up information into at least one storage location corresponding to at least one of the m-th portion of candidate addresses according to the actual addresses.
    Type: Application
    Filed: August 9, 2021
    Publication date: November 25, 2021
    Applicant: Silicon Motion, Inc.
    Inventor: Sheng-Yuan Huang
  • Publication number: 20210365569
    Abstract: The invention relates to a method, a non-transitory computer program product, and an apparatus for encrypting and decrypting physical-address information. The method includes: receiving a first read command requesting of the flash controller for first physical block addresses (PBAs) corresponding to a logical block address (LBA) range from a host side, wherein each first PBA indicates which physical address that user data of a first LBA of the LBA range is physically stored in a flash device; reading the first PBAs corresponding to the LBA range from the flash device; arranging the first PBAs into entries; encrypting content of each entry by using an encryption algorithm with an encryption parameter to obtain an encrypted entry; and delivering the encrypted entries to the host side.
    Type: Application
    Filed: April 8, 2021
    Publication date: November 25, 2021
    Applicant: Silicon Motion, Inc.
    Inventor: Yu-Ta CHEN
  • Patent number: 11182286
    Abstract: A high-performance data storage device is disclosed. A non-volatile memory stores a logical-to-physical address mapping table that maps logical addresses recognized by a host to a physical space in the non-volatile memory. The logical-to-physical address mapping table is divided into a plurality of sub mapping tables. A memory controller utilizes temporary storage when controlling the non-volatile memory. The memory controller plans a sub mapping table area in the temporary storage to store sub mapping tables corresponding to a plurality of nodes which are linked and managed by multiple linked lists.
    Type: Grant
    Filed: September 27, 2019
    Date of Patent: November 23, 2021
    Assignee: SILICON MOTION, INC.
    Inventors: Jian-Yu Chen, Bo-Yan Jhan, Yuh-Jang Lo, Shih-Chang Chang
  • Patent number: 11176049
    Abstract: A flash memory controller includes a processor and a cache. When the processor receives a specific write command and specific data a host, the processor stores the specific data into a region of the cache, and the processor generates host-based cache information or flash-memory-based cache information to build or update/optimize a binary tree with fewer number of nodes to improve the searching speed of the binary tree, reducing computation overhead of multiple cores in the flash memory controller, and minimizing the number of accessing the cache to reduce the total latency wherein the host-based cache information may indicate dynamic data length and flash-memory-based cache information indicates the data length of one writing unit such as one page in flash memory chip.
    Type: Grant
    Filed: March 17, 2020
    Date of Patent: November 16, 2021
    Assignee: Silicon Motion, Inc.
    Inventor: Kuan-Hui Li
  • Patent number: 11176035
    Abstract: A data storage device includes a memory device and a memory controller. The memory device includes multiple memory blocks. The memory controller determines whether execution of a garbage collection procedure is required according to a number of spare memory blocks. When the execution of the garbage collection procedure is required, the memory controller determines an execution period according to a latest editing status of a plurality of open memory blocks; starts the execution of the garbage collection procedure so as to perform at least a portion of the garbage collection procedure in the execution period; and suspends the execution of the garbage collection procedure when the execution period has expired but the garbage collection procedure is not finished. The memory controller further determines a time interval for continuing the execution of the garbage collection procedure later according to the latest editing status of the open memory blocks.
    Type: Grant
    Filed: March 26, 2020
    Date of Patent: November 16, 2021
    Assignee: Silicon Motion, Inc.
    Inventor: Kuan-Yu Ke
  • Patent number: 11175841
    Abstract: A method for use in management of a flash memory module is provided. The flash memory module has a plurality of blocks, wherein a portion of the blocks belong to a spare pool. The method includes: preserving at least one erased block in the spare pool for a write operation; monitoring an erasing period regarding the at least one erased block; and performing a replacement operation to replace the at least one erased block when the erase time exceeds a threshold.
    Type: Grant
    Filed: January 7, 2020
    Date of Patent: November 16, 2021
    Assignee: Silicon Motion, Inc.
    Inventors: Jian-Dong Du, Chia-Jung Hsiao, Tsung-Chieh Yang
  • Patent number: 11176033
    Abstract: A data storage device includes a memory device and a memory controller. The memory controller selects a predetermined memory block to receive data and accordingly records multiple logical addresses in a first mapping table. When the predetermined memory block is full, the memory controller edits a second mapping table or a third mapping table based on the first mapping table. The memory controller determines whether the first mapping table has recorded logical addresses of a predetermined number of consecutive logical pages. If not, the memory controller edits the second mapping table. If so, the memory controller skips editing the second mapping table and edits the third mapping table instead, so as to record the mapping information of a predetermined logical page among the predetermined number of consecutive logical pages as representative mapping information in a corresponding field of the third mapping table.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: November 16, 2021
    Assignee: SILICON MOTION, INC.
    Inventor: Kuan-Yu Ke
  • Patent number: 11169878
    Abstract: A non-volatile (NV) memory accessing method using data protection with aid of look-ahead processing, and associated apparatus such as memory device, controller and encoding circuit thereof are provided. The NV memory accessing method may include: receiving a write command and data from a host device; obtaining at least one portion of data to be a plurality of messages, to generate a plurality of parity codes through look-ahead type encoding, wherein regarding a message: starting encoding a first partial message to generate a first encoded result; applying predetermined input response information to a second partial message to generate a second encoded result, and combining the first and the second encoded results to generate a first partial parity code; and starting encoding the message to generate a second partial parity code, and outputting the first and the second partial parity codes to generate a parity code; and writing into the NV memory.
    Type: Grant
    Filed: November 13, 2020
    Date of Patent: November 9, 2021
    Assignee: Silicon Motion, Inc.
    Inventor: Shiuan-Hao Kuo
  • Patent number: 11169760
    Abstract: A multi-screen display control device is shown, in which a plurality of cards are connected in series through universal serial bus (USB) cables. Image data provided by a host is transferred through the USB cables. A first-stage card includes a plurality of first-stage graphics processing units (GPUs) and a first clock buffer. Based on the image data, the first-stage GPUs generate a plurality of high-definition multimedia interface (HDMI) sub-images to be displayed on a plurality of screens. Through the first clock buffer, a clock signal is replicated onto a plurality of paths to be transferred to the different first-stage GPUs and thereby identical clocks are applied to the different first-stage GPUs. Through the first clock buffer, the clock signal is further replicated onto a clock output path to be transferred to a clock output terminal of the first-stage card and thereby is coupled to a second-stage card.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: November 9, 2021
    Assignee: SILICON MOTION, INC.
    Inventors: Chengliang Qi, Guangjun Lyu, Cong Li
  • Publication number: 20210342101
    Abstract: The present invention provides an electronic device, wherein the electronic device includes a flash memory module and a flash memory controller. The flash memory module includes at least one flash memory chip, each flash memory chip includes a plurality of blocks, and each block includes a plurality of pages, and the flash memory controller is configured to access the flash memory module. In the operations of the electronic device, when the flash memory controller sends a read command to the flash memory module to ask for data on at least one page, the flash memory module uses a plurality of read voltages to read each memory cell of the at least one page to obtain multi-bit information of each memory cell, and the flash memory module transmits the multi-bit information of each memory cell of the at least one page to the flash memory controller.
    Type: Application
    Filed: July 15, 2021
    Publication date: November 4, 2021
    Applicant: Silicon Motion, Inc.
    Inventor: Tsung-Chieh Yang
  • Publication number: 20210334045
    Abstract: The present invention provides a method for accessing a flash memory module, wherein the flash memory module comprises at least one flash memory chip, each flash memory chip comprises a plurality of blocks, each block comprises a plurality of pages, and the method comprises: sending a read command to the flash memory module to ask for data on at least one memory unit; and analyzing state information of a plurality of memory cells of the memory unit based on information from the flash memory module to determine a decoding method adopted by a decoder.
    Type: Application
    Filed: July 5, 2021
    Publication date: October 28, 2021
    Applicant: Silicon Motion, Inc.
    Inventor: Tsung-Chieh Yang
  • Publication number: 20210334209
    Abstract: The invention relates to a method, a non-transitory computer program product, and an apparatus for managing data storage. The method performed by a flash controller includes: obtaining information indicating a subregion to be activated, where the subregion is associated with a logical block address (LBA) range; triggering a garbage collection (GC) process being performed in background to migrate user data of all the or a portion of the LBA range associated with the subregion to continuous physical addresses in a flash device; and updating content of a plurality of entries associated with the subregion according to migration results, where each entry includes information indicating which physical address that user data of a corresponding logical address is physically stored in the flash device.
    Type: Application
    Filed: January 28, 2021
    Publication date: October 28, 2021
    Applicant: Silicon Motion, Inc.
    Inventor: Kuan-Yu KE
  • Patent number: 11157624
    Abstract: A method for using an electronic device to activate amass production software tool to initialize a memory device including a flash memory controller and a flash memory includes: using the mass production software tool to retrieve an encrypted configuration file included by the mass production software tool; decrypting the encrypted configuration file to generate a temporarily decrypted configuration file; comparing unique information of the electronic device with unique information recorded in the temporarily decrypted configuration file to determine whether the electronic device is valid/authorized; and performing a flash memory initialization operation upon the flash memory when the electronic device is valid/authorized.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: October 26, 2021
    Assignee: Silicon Motion, Inc.
    Inventor: Shang-Ta Yang
  • Patent number: 11157175
    Abstract: An optimized non-volatile memory operating method. A data storage device has a plurality of non-volatile memory spaces, a plurality of command queues, and a controller. The command queues are provided to correspond to the non-volatile memory spaces one on one. The controller adds task switching commands into the command queues. The non-volatile memory spaces are operated through the same channel. The sharing of the same channel between the non-volatile memory spaces is optimized by the task switching commands.
    Type: Grant
    Filed: May 13, 2020
    Date of Patent: October 26, 2021
    Assignee: SILICON MOTION, INC.
    Inventors: Shu-Lei Chen, Ming-Hung Chang
  • Patent number: 11157181
    Abstract: A card activation device includes a first control unit and a central control unit. In response to a first control command, the central control unit provides first authentication data to the first control unit and the first control unit transmits the first authentication data to the data storage device. After the first authentication data is transmitted to the data storage device, the central control unit provides second authentication data to the first control unit and the first control unit transmits the second authentication data to the data storage device. After the second authentication data is transmitted to the data storage device, the card activation device enters a fully locked state and performs an authentication procedure for authenticating the data storage device. Before the data storage device has passed the authentication procedure, the central control unit is not allowed to transmit any data to the data storage device.
    Type: Grant
    Filed: July 8, 2019
    Date of Patent: October 26, 2021
    Assignee: Silicon Motion, Inc.
    Inventors: Te-Kai Wang, Hsing-Lang Huang
  • Patent number: 11157399
    Abstract: A data storage device includes a memory device and a memory controller. The memory controller is configured to configure a first predetermined memory block which is an SLC memory block and a second predetermined memory block which is a MLC memory block as buffers to receive data. The memory controller determines to use which scheme to receive data in a predetermined period dynamically according to an amount of valid data stored in the memory device. When the memory controller determines to use a first scheme, the memory controller uses the first predetermined memory block to receive data. When the memory controller determines to use a second scheme, the memory controller uses the first predetermined memory block and the second predetermined memory block to receive data. When the memory controller determines to use a third scheme, the memory controller uses the second predetermined memory block to receive data.
    Type: Grant
    Filed: December 2, 2019
    Date of Patent: October 26, 2021
    Assignee: SILICON MOTION, INC.
    Inventor: Wen-Sheng Lin
  • Patent number: 11158390
    Abstract: A method and apparatus for performing automatic power control in a memory device are provided. The method includes: during an initialization phase of the memory device, performing signal level detection on a reference clock request signal to determine whether the reference clock request signal is at a first predetermined voltage level or a second predetermined voltage level, for performing the automatic power control for the memory device, wherein the reference clock request signal is received through an IO pad; and according to a logic value carried by an input signal of a selective regulation circuit (SRC), performing selective power control to generate a secondary power voltage according to a main power voltage, wherein the selective power control makes the secondary power voltage be either equal to the main power voltage or a regulated voltage of the main power voltage in response to the logic value carried by the input signal.
    Type: Grant
    Filed: March 30, 2020
    Date of Patent: October 26, 2021
    Assignee: Silicon Motion, Inc.
    Inventors: Yu-Wei Chyan, Ping-Yen Tsai, Jiyun-Wei Lin
  • Publication number: 20210326278
    Abstract: The invention introduces a method for executing host input-output (IO) commands, performed by a processing unit of a device side, at least including: in response to different types of host IO commands, using multiple stages of a generic framework to drive a frontend interface to interact with a host side for transmitting user data read from a storage unit to the host side, and receiving user data to be programmed into the storage unit from the host side. The frontend interface includes a register, and a data line coupled to the host side. The stages of the generic framework are used to access to the register of the frontend interface and operate the data line of the frontend interface to complete interactions with the host side.
    Type: Application
    Filed: June 28, 2021
    Publication date: October 21, 2021
    Applicant: Silicon Motion, Inc.
    Inventor: Shen-Ting CHIU