Patents Assigned to Siltronic AG
  • Patent number: 9662687
    Abstract: A cleaning method involves: disposing in a cleaning liquid held in a cleaning tank an object to be cleaned; and ultrasonically vibrating the cleaning liquid via an intermediate medium in contact with the cleaning tank to clean said object, the ultrasonically vibrating involving: ultrasonically vibrating the cleaning liquid with the cleaning liquid and the intermediate medium allowing sonic velocities, respectively, having a first difference; and ultrasonically vibrating the cleaning liquid with the cleaning liquid and the intermediate medium allowing sonic velocities, respectively, having a second difference different from the first difference.
    Type: Grant
    Filed: November 3, 2015
    Date of Patent: May 30, 2017
    Assignee: SILTRONIC AG
    Inventors: Yoshihiro Mori, Teruo Haibara, Etsuko Kubo, Masashi Uchibe
  • Patent number: 9662804
    Abstract: A method for sawing a multiplicity of wafers from a workpiece by means of a wire web of a wire saw includes providing a wire web consisting of a plurality of parallel wire sections. The wire web is spanned by at least two wire guide rollers where each wire guide rollers comprises a core having two side surfaces and a lateral surface. The core is composed of a first material. Each core is rotatably mounted along its longitudinal axis and comprises at least two separate cavities. The lateral surface of each core is enclosed by a jacket composed of a second material. Parallel groves are cut into the jacket for guiding the wire sections of the web. The length of the jacket is altered thermally by means of at least one cavity being filled with a temperature regulating medium.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: May 30, 2017
    Assignee: SILTRONIC AG
    Inventors: Peter Wiesner, Robert Kreuzeder
  • Patent number: 9611566
    Abstract: Single crystal silicon ingots are grown by the multi-pulling method in a single crucible with minimization of dislocations by incorporating barium as a quartz crystallization inhibitor in amounts proportional to the diameter of the Czochralski crucible in which the crystal is grown. In at least one of the crystal pulling steps, a magnetic field is applied.
    Type: Grant
    Filed: May 15, 2012
    Date of Patent: April 4, 2017
    Assignee: Siltronic AG
    Inventors: Hideo Kato, Shinichi Kyufu, Masamichi Ohkubo
  • Patent number: 9579826
    Abstract: A method for slicing wafers from a workpiece using a sawing wire, wherein at least two wire guide rolls clamp a wire web, each wire guide roll having a multiplicity of grooves in its lateral surface, wherein at least one groove in which no wire is inserted during the wire sawing is present alongside a wire-guiding groove and, after wear on the wire-guiding grooves or after a defined number of sawing processes, the sawing wire is wound over into the previously unoccupied grooves that are not yet worn or used, respectively.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: February 28, 2017
    Assignee: SILTRONIC AG
    Inventor: Claudia Reinhardt
  • Patent number: 9573296
    Abstract: A method for simultaneously cutting a multiplicity of slices from a cylindrical workpiece, along strictly convex cutting faces, by supplying a suspension of hard substances in a carrier liquid, as cutting medium, to wire portions, while the wire portions, having a longitudinal tension, define a relative motion to the workpiece as a result of wire guide roller rotation with continual alternation between a first direction of rotation and a second direction of rotation, which is opposite to the first direction of rotation, wherein, during the rotation in the first direction, the wire is moved a first length, and during the rotation in the second direction, the wire is moved a second length, and the second length is shorter than the first, and at the cutting operation start a first longitudinal wire tension is greater than a second longitudinal tension at the end.
    Type: Grant
    Filed: April 21, 2015
    Date of Patent: February 21, 2017
    Assignee: SILTRONIC AG
    Inventor: Georg Pietsch
  • Patent number: 9539695
    Abstract: Carriers suitable for receiving one or more semiconductor wafers for the machining thereof in lapping, grinding or polishing machines, comprise a core of a first material which has a high stiffness, the core being completely or partly coated with a second material, and also at least one cutout for receiving a semiconductor wafer, wherein the second material is a thermoset polyurethane elastomer having a Shore A hardness of 20-90. The carriers are preferably coated with the second material after chemical surface activation and application of adhesion promoter, and may be used for simultaneous double-side material-removing machining of a plurality of semiconductor wafers.
    Type: Grant
    Filed: October 1, 2008
    Date of Patent: January 10, 2017
    Assignees: Siltronic AG, Peter Wolters GmbH
    Inventors: Georg Pietsch, Michael Kerstan, Heiko aus dem Spring
  • Patent number: 9533394
    Abstract: The edge region of one side of a semiconductor wafer is polished by pressing the wafer by means of a rotatable polishing head against a polishing pad lying on a rotating polishing plate, and containing fixed abrasive. The polishing head is provided with a resilient membrane radially subdivided into a plurality of chambers by gas or liquid cushions, the polishing pressure independently selectable for each chamber. The wafer is held in position during polishing by a retainer ring pressed against the polishing pad with an application pressure, a polishing agent is introduced between the wafer and the polishing pad, and the polishing pressure exerted on the wafer in a chamber lying in the edge region of the wafer of the polishing head, and the application pressure of the retainer ring, are selected so that material is essentially removed only at the edge of the wafer.
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: January 3, 2017
    Assignee: Siltronic AG
    Inventor: Juergen Schwandner
  • Patent number: 9458554
    Abstract: The invention relates to a semiconductor wafer of monocrystalline silicon, and to a method for producing it. The semiconductor wafer has a zone, DZ, which is free of BMD defects and extends from a front side of the semiconductor wafer into the bulk of the semiconductor wafer, and a region having BMD defects which extends from the DZ further into the bulk of the semiconductor wafer. A silicon single crystal is pulled by the Czochralski method and processed to form a polished monocrystalline silicon substrate wafer. The substrate wafer is treated by rapidly heating and cooling the substrate wafer, slowly heating the rapidly heated and cooled substrate wafer, and keeping the substrate wafer at a specific temperature and over a specific period.
    Type: Grant
    Filed: July 24, 2013
    Date of Patent: October 4, 2016
    Assignee: Siltronic AG
    Inventors: Timo Mueller, Gudrun Kissinger, Dawid Kot, Andreas Sattler
  • Patent number: 9457385
    Abstract: An ultrasonic cleaning method for cleaning an object in a liquid in which a gas is dissolved includes preparing the liquid in which the gas is dissolved. The object is cleaned while applying ultrasonic waves to the liquid so that a ratio determined by dividing a vibration strength of the liquid at a fourth-order frequency of the ultrasonic waves by a vibration strength of the liquid at a fundamental frequency of the ultrasonic waves is larger than 0.8/1000.
    Type: Grant
    Filed: May 13, 2013
    Date of Patent: October 4, 2016
    Assignee: SILTRONIC AG
    Inventors: Yoshihiro Mori, Masashi Uchibe, Teruo Haibara, Etsuko Kubo
  • Patent number: 9427888
    Abstract: A method resumes an interrupted process for sawing a workpiece into wafers using a wire saw that includes advancing a wire web into existing sawing kerfs of the workpiece with a forward movement of the sawing wire with a first speed in the presence of a liquid sawing medium until the wire web or workpiece has reached a position corresponding to the interruption of the wire sawing process. The sawing wire is moved in defined time intervals by a forward movement of a particular length with a second speed and a backward movement of another length with a third speed, where the backward length is less than the forward length and the forward and backward movement correspond to a cycle. The wire length that is unwound during the forward movements is increased until the length during the forward movement corresponds to the length of the forward movement before the interruption.
    Type: Grant
    Filed: November 22, 2013
    Date of Patent: August 30, 2016
    Assignee: SILTRONIC AG
    Inventor: Peter Wiesner
  • Patent number: 9422634
    Abstract: Single crystals are produced by means of the floating zone method, wherein the single crystal crystallizes below a melt zone at a crystallization boundary, and the emission of crystallization heat is impeded by a reflector surrounding the single crystal, wherein the single crystal is heated in the region of an outer edge of the crystallization boundary by means of a heating device in a first zone, wherein a distance ? between an outer triple point Ta at the outer edge of the crystallization boundary and a center Z of the crystallization boundary is influenced. An apparatus for producing the single crystal provides a heat source below the melting induction coil and above the reflector.
    Type: Grant
    Filed: December 5, 2012
    Date of Patent: August 23, 2016
    Assignee: SILTRONIC AG
    Inventors: Georg Raming, Ludwig Altmannshofer, Gundars Ratnieks, Johann Landrichinger, Josef Lobmeyer, Alfred Holzinger
  • Patent number: 9410265
    Abstract: Semiconductor wafers composed of silicon with an epitaxially deposited layer, are prepared by: placing a dummy wafer on a susceptor of an epitaxy reactor; conducting an etching gas through the epitaxy reactor in order to remove residues on surfaces in the epitaxy reactor through the action of the etching gas; conducting a first deposition gas through the epitaxy reactor in order to deposit silicon on surfaces in the epitaxy reactor; replacing the dummy wafer by a substrate wafer composed of silicon; and conducting a second deposition gas through the epitaxy reactor in order to deposit an epitaxial layer on the substrate wafer.
    Type: Grant
    Filed: January 27, 2011
    Date of Patent: August 9, 2016
    Assignee: SILTRONIC AG
    Inventors: Christian Hager, Thomas Loch, Norbert Werner
  • Patent number: 9410262
    Abstract: A silicon single crystal is produced by a method wherein a silicon plate is inductively heated; granular silicon is melted on the silicon plate; and the molten silicon thus produced flows through a flow conduit in the center of the plate to a phase boundary at which a silicon single crystal crystallizes, wherein a silicon ring having a lower resistivity than the plate, and lying on the plate, is inductively heated prior to inductively heating the plate, and melting the ring.
    Type: Grant
    Filed: August 19, 2013
    Date of Patent: August 9, 2016
    Assignee: SILTRONIC AG
    Inventors: Josef Lobmeyer, Georg Brenninger, Waldemar Stein
  • Patent number: 9346188
    Abstract: A method and apparatus are used to simultaneously slice a multiplicity of slices from a workpiece. The workpiece is held with a feed device so as to position an axis of the workpiece parallel to axes of wire guide rolls of a wire saw and is moved from above through a web of the wire saw. A slurry is supplied as abrasive to wire sections of the web while the wire sections are moved relative to the workpiece. The relative movement guides the wire sections from an entry side to an exit side through the workpiece. A coolant is sprayed from the side and below through nozzles into slicing gaps in the workpiece. The nozzles are arranged below the web parallel to the axes of the wire guide rolls. The coolant is sprayed into the slicing gaps through a nozzle situated opposite the entry side of the respective wire section.
    Type: Grant
    Filed: January 25, 2013
    Date of Patent: May 24, 2016
    Assignee: SILTRONIC AG
    Inventor: Georg Pietsch
  • Patent number: 9340897
    Abstract: The diameter of a single crystal is controlled to a set point diameter during pulling of the single crystal from a melt contained in a crucible and which forms a meniscus at a phase boundary on the edge of the single crystal, the meniscus having a height which corresponds to the distance between the phase boundary and a level of the surface of the melt outside the meniscus, comprising repeatedly: determining the diameter of a bright ring on the meniscus; calculating a diameter of the single crystal while taking into account the diameter of the bright ring and the dependency of the diameter of the bright ring on the height of the meniscus and on the diameter of the single crystal itself; and calculating at least one manipulated variable for controlling the diameter of the single crystal on the basis of the difference between the calculated diameter of the single crystal and the set point diameter of the single crystal.
    Type: Grant
    Filed: May 23, 2014
    Date of Patent: May 17, 2016
    Assignee: Siltronic AG
    Inventor: Thomas Schroeck
  • Patent number: 9333673
    Abstract: A method for simultaneously cutting a multiplicity of wafers from a cylindrical workpiece having an axis and a notch applied parallel to the axis in a lateral surface of the workpiece includes applying a cut-in beam on the workpiece where the cut-in beam has a head end and a foot end. The head end is inserted into the notch of the workpiece. The workpiece is held with a feed device so as to position an axis of the work piece parallel to the axes of cylindrical wire guide rollers of a wire saw. The cut-in beam is moved through a planar wire web, where the planar wire web has sections of wire arranged parallel to one another and perpendicular to the axes of the wire guide roller. The wire sections are moved the longitudinal wire direction in the presence of abrasives.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: May 10, 2016
    Assignee: SILTRONIC AG
    Inventor: Georg Pietsch
  • Patent number: 9308619
    Abstract: A method of simultaneous double-side polishing of at least one semiconductor material wafer includes disposing each wafer in a respective suitably dimensioned cutout in a carrier plate having a front and rear side. The at least one wafer is polished between an upper polishing plate covered with a first polishing pad and a lower polishing plate covered with a second polishing pad while supplying a polishing agent. The polishing agent is supplied on the front and rear side of the wafer through openings in the upper and lower polishing pads and the upper and lower polishing plates. Each polishing pad has an inner circular region and outer ring shaped region where the quantity of polishing agent emerging from openings in the working gap per unit time in the inner circular region of the polishing pad is different from the quantity that emerges from openings in the outer ring-shaped region.
    Type: Grant
    Filed: August 29, 2014
    Date of Patent: April 12, 2016
    Assignee: SILTRONIC AG
    Inventor: Juergen Schwandner
  • Patent number: 9303332
    Abstract: Silicon single crystal substrates having uniform resistance, few BMDs in a surface layer and a moderate number of BMDs in a center of thickness of the substrate are formed from Czochralski silicon single crystals. The substrates have a resistivity in the center of a first main surface not lower than 50 ?·cm and a rate of change in resistivity in the first main surface not higher than 3%, an average density of bulk micro defects in a region between the first main surface and a plane at a depth of 50 ?m of less than 1×108/cm3, and an average density of bulk micro defects in a region lying between a plane at a depth of 300 ?m and a plane at a depth of 400 ?m from the first main surface not lower than 1×108 /cm3 and not higher than 1×109 /cm3.
    Type: Grant
    Filed: September 12, 2012
    Date of Patent: April 5, 2016
    Assignee: SILTRONIC AG
    Inventors: Katsuhiko Nakai, Masamichi Ohkubo, Hikaru Sakamoto
  • Patent number: 9296087
    Abstract: A method for conditioning polishing pads for the simultaneous double-side polishing of semiconductor wafer uses a double-side polishing device. The device has an annular lower polishing plate and an annular upper polishing plate, each covered with a polishing pad, as well as a rolling device for carrier disks. The method for conditioning polishing pads includes disposing at least one conditioning tool having external teeth and at least one spacer having external teeth in a working gap formed between the first and second polishing pad, where the thickness of at least one of the conditioning tools differs from the thickness of at least one of the spacers. At least one conditioning tool and one spacer are set, simultaneously, in a revolving movement about the axis of the rolling device and in rotation themselves so as to generate material abrasion of at least one of the polishing pads.
    Type: Grant
    Filed: February 14, 2014
    Date of Patent: March 29, 2016
    Assignee: SILTRONIC AG
    Inventor: Johannes Staudhammer
  • Patent number: 9249525
    Abstract: A ring-shaped resistance heater for supplying heat to a growing single crystal, contains an upper and a lower ring, which are electrically conductively connected by means of a loop adjacent to a ring gap of one ring, such that the flow direction of electric current which is conducted through the rings is opposite in the rings; connecting elements which hold the upper and lower rings together in a spaced apart relationship; and current leads for conducting electric current through the upper and lower rings.
    Type: Grant
    Filed: July 10, 2012
    Date of Patent: February 2, 2016
    Assignee: SILTRONIC AG
    Inventors: Dieter Knerer, Werner Schachinger