Patents Assigned to Solexel, Inc.
  • Patent number: 9680041
    Abstract: A three-dimensional thin-film semiconductor substrate with selective through-holes is provided. The substrate having an inverted pyramidal structure comprising selectively formed through-holes positioned between the front and back lateral surface planes of the semiconductor substrate to form a partially transparent three-dimensional thin-film semiconductor substrate.
    Type: Grant
    Filed: December 19, 2014
    Date of Patent: June 13, 2017
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, David Xuan-Qi Wang
  • Patent number: 9595622
    Abstract: The present disclosure enables high-volume cost effective production of three-dimensional thin film solar cell (3-D TFSC) substrates. Pyramid-like unit cell structures 16 and 50 enable epitaxial growth through an open pyramidal structure 3-D TFSC embodiments 70, 82, 100, and 110 may be combined as necessary. A basic 3-D TFSC having a substrate, emitter, oxidation on the emitter, and front and back metal contacts allows for simple processing. Other embodiments disclose a selective emitter, selective backside metal contacts, and front-side SiN ARC layers. Several processing methods, including process flows 150, 200, 250, 300, and 350, enable production of these 3-D TFSCs.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: March 14, 2017
    Assignee: Solexel, Inc.
    Inventors: Pawan Kapur, Mehrdad M. Moslehi
  • Patent number: 9590035
    Abstract: A semiconductor template having a top surface aligned along a (100) crystallographic orientation plane and an inverted pyramidal cavity defined by a plurality of walls aligned along a (111) crystallographic orientation plane. A method for manufacturing a semiconductor template by selectively removing silicon material from a silicon template to form a top surface aligned along a (100) crystallographic plane of the silicon template and a plurality of walls defining an inverted pyramidal cavity each aligned along a (111) crystallographic plane of the silicon template.
    Type: Grant
    Filed: March 3, 2014
    Date of Patent: March 7, 2017
    Assignee: Solexel, Inc.
    Inventors: David Xuan-Qi Wang, Mehrdad M. Moslehi
  • Patent number: 9583651
    Abstract: Methods for improving the light trapping characteristics of crystalline silicon solar cells are provided. In one embodiment, the backside surface of a crystalline silicon solar cell substrate is textured with a pulsed laser beam. The textured backside surface of the crystalline silicon solar cell substrate is then annealed to remove damage from the laser texturization process.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: February 28, 2017
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Virendra V. Rana, Solene Coutant, Heather Deshazer, Pranav Anbalagan, Benjamin Rattle
  • Patent number: 9515217
    Abstract: According to one aspect of the disclosed subject matter, a method for forming a monolithically isled back contact back junction solar cell is provided. Emitter and base contact regions are formed on a backside of a semiconductor wafer having a light receiving frontside and a backside opposite said frontside. A first level contact metallization is formed on the wafer backside and an electrically insulating backplane is attached to the semiconductor wafer backside. Isolation trenches are formed in the semiconductor wafer patterning the semiconductor wafer into a plurality of electrically isolated isles and the semiconductor wafer is thinned. A metallization structure is formed on the electrically insulating backplane electrically connecting the plurality of isles.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: December 6, 2016
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Pawan Kapur, Karl-Josef Kramer, Michael Wingert
  • Patent number: 9508886
    Abstract: A method for making a crystalline silicon solar cell substrate is provided. A doped dielectric layer is deposited over the backside surface of a crystalline silicon substrate, the doped dielectric layer having a polarity opposite the polarity of the crystalline silicon substrate. Portions of the backside surface of the crystalline substrate are exposed through the doped dielectric layer. An overlayer is deposited over the doped dielectric layer and the exposed portions of the backside surface of the crystalline silicon substrate. Pulsed laser ablation of the overlayer is performed with a flat top laser beam on the silicon substrate to form continuous base openings nested within the exposed portions of the backside surface of the crystalline silicon substrate, the flat top laser beam having a beam intensity profile flatter as compared to a Gaussian beam intensity profile and having a rectangular beam cross section.
    Type: Grant
    Filed: October 11, 2011
    Date of Patent: November 29, 2016
    Assignee: Solexel, Inc.
    Inventors: Virendra V. Rana, Pranav Anbalagan, Mehrdad M. Moslehi
  • Patent number: 9461582
    Abstract: Methods and structures for extracting at least one electric parametric value from a back contact solar cell. According to one embodiment, a first layer of electrically conductive metal having an interdigitated pattern of base electrodes and emitter electrodes is formed on the backside surface of a semiconductor solar cell substrate. An electrically insulating layer is formed on the first layer of electrically conductive metal providing electrical isolation between the first layer of electrically conductive metal and a second layer of electrically conductive metal. Vias are formed in the electrically insulating layer providing access to the first layer of electrically conductive metal. A second electrically conductive metallization layer is formed on the electrically insulating layer and contacts the first electrically conductive metal layer through the vias.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: October 4, 2016
    Assignee: Solexel, Inc.
    Inventors: Swaroop Kommera, Pawan Kapur, Mehrdad M. Moslehi
  • Patent number: 9455362
    Abstract: Methods for laser irradiation aluminum doping for monocrystalline silicon substrates are provided. According to one aspect of the disclosed subject matter, aluminum metal contacts are formed directly on a surface of a monocrystalline silicon substrate. The aluminum metal contact is selectively heated via laser irradiation, thereby causing the aluminum and a portion of the monocrystalline silicon substrate in proximity to the aluminum to reach a temperature sufficient to allow at least a portion of the silicon to dissolve in the aluminum. The aluminum and the portion of the monocrystalline silicon substrate in proximity to the aluminum is allowed to cool, thereby forming an aluminum-rich doped silicon layer on the monocrystalline silicon substrate.
    Type: Grant
    Filed: December 30, 2011
    Date of Patent: September 27, 2016
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Virendra V. Rana, Pranav Anbalagan
  • Patent number: 9419165
    Abstract: A method for making a back contact solar cell. Base isolation regions are formed in a crystalline silicon back contact solar cell substrate having a substrate thickness in the range of approximately 1 micron to 100 microns. Pulsed laser ablation of a substance on the crystalline silicon back contact solar cell substrate is performed to form base openings, wherein the substance is at least one of silicon oxide, silicon nitride, aluminum oxide, silicon oxynitride, or silicon carbide. Emitter regions are selectively doped and base regions are selectively doped. Contact openings are formed for the selectively doped base regions and the selectively doped emitter regions. Metallization is formed on the selectively doped base regions and the selectively doped emitter regions.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: August 16, 2016
    Assignee: Solexel, Inc.
    Inventors: Virendra V. Rana, JianJun Liang, Pranav Anbalagan, Mehrdad M. Moslehi
  • Patent number: 9401276
    Abstract: An apparatus for forming porous silicon layers on at least two surfaces of a plurality of silicon templates in a batch electrochemical anodic etch process is provided. The apparatus comprises a plurality of edge-sealing template mounts operable to prevent formation of porous silicon at the edges of a plurality of templates. An electrolyte is disposed among the plurality of templates. The apparatus further comprises a power supply operable to switch polarity, change current intensity, and control etching time to produce the porous silicon layers.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: July 26, 2016
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Karl-Josef Kramer, David Xuan-Qi Wang, Pawan Kapur, Somnath Nag, George D. Kamian, Jay Ashjaee, Takao Yonehara
  • Patent number: 9397250
    Abstract: According to one embodiment, a releasing apparatus for separating a semiconductor substrate from a semiconductor template, the releasing apparatus having an enclosed pressure chamber having at least one gas inlet and at least one gas outlet. A top vacuum chuck for securing a released semiconductor substrate or semiconductor template in the enclosed pressure chamber. A bottom vacuum chuck for securing an attached semiconductor substrate and semiconductor template in the enclosed pressure chamber. A gap between the attached semiconductor substrate and semiconductor template and the top vacuum chuck allowing gas flowing through the gap to generate lifting forces on the attached semiconductor substrate and semiconductor template.
    Type: Grant
    Filed: May 3, 2012
    Date of Patent: July 19, 2016
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, David Xuan-Qi Wang, Sam Tone Tor, Karl-Josef Kramer
  • Patent number: 9379258
    Abstract: Fabrication methods for making back contact back junction solar cells. A base dopant source, a field emitter dopant source, and an emitter dopant source are deposited on the back surface of a solar cell substrate. The solar cell substrate is annealed forming emitter contact regions corresponding to the emitter dopant source, field emitter regions corresponding to the field emitter dopant, and base contact regions corresponding to the base dopant source. The base dopant source, field emitter dopant source, and the emitter dopant source are etched. A backside passivation layer is deposited on the back surface of the solar cell. Contacts are opened to the emitter contact regions and the base contact regions through the backside passivation layer. Patterned base metallization and patterned emitter metallization is formed on the back surface of the solar cell with electrical interconnections to the base contact regions and the emitter contact regions.
    Type: Grant
    Filed: September 22, 2014
    Date of Patent: June 28, 2016
    Assignee: Solexel, Inc.
    Inventors: Pawan Kapur, Anand Deshpande, Virendra V. Rana, Mehrdad M. Moslehi, Sean M. Seutter
  • Patent number: 9349887
    Abstract: A three-dimensional thin-film solar cell comprising a three-dimensional thin-film solar cell substrate having a prism array design comprising a plurality dual-aperture unit cells with emitter junction regions and doped base regions. The three-dimensional thin-film solar cell comprises emitter metallization regions and base metallization regions.
    Type: Grant
    Filed: December 3, 2012
    Date of Patent: May 24, 2016
    Assignee: Solexel, Inc.
    Inventor: Mehrdad M. Moslehi
  • Patent number: 9343299
    Abstract: A method is provided for fabricating a semiconductor substrate by forming a porous semiconductor layer conformally on a semiconductor template and then forming a semiconductor substrate conformally on the porous semiconductor layer. An inner trench having a depth less than the thickness of the semiconductor substrate is formed on the semiconductor substrate. An outer trench providing access to the porous semiconductor layer is formed on the semiconductor substrate and is positioned between the inner trench and the edge of the semiconductor substrate. The semiconductor substrate is then released from the semiconductor template.
    Type: Grant
    Filed: October 2, 2012
    Date of Patent: May 17, 2016
    Assignee: Solexel, Inc.
    Inventors: David Xuan-Qi Wang, Mehrdad M. Moslehi
  • Patent number: 9337374
    Abstract: Processing equipment for the metallization of a plurality of semiconductor workpieces. A controlled atmospheric non-oxidizing gas region comprises at least two enclosed deposition zones, the controlled atmospheric non-oxidizing gas region is isolated from external oxidizing ambient. A temperature controller adjusts the temperature of the semiconductor workpiece in each of the at least two enclosed deposition zones. Each of the enclosed deposition zones comprising at least one spray gun for the metallization of the semiconductor workpiece. A transport system moves the semiconductor workpiece through the controlled atmospheric non-oxidizing gas region. A batch carrier plate carries the semiconductor workpiece through the controlled atmospheric non-oxidizing gas region. The controlled atmospheric non-oxidizing gas region further comprises a gas-based pre-cleaning zone.
    Type: Grant
    Filed: December 23, 2012
    Date of Patent: May 10, 2016
    Assignee: Solexel, Inc.
    Inventors: Karl-Josef Kramer, Jay Ashjaee, Mehrdad M. Moslehi, Anthony Calcaterra, David Dutton, Pawan Kapur, Sean Seutter, Homi Fatemi
  • Patent number: 9330952
    Abstract: In one embodiment, there is provided a carrier comprising a top semiconductor layer having isolated positive electrode regions and isolated negative electrode regions separated by a frontside trench through the top semiconductor layer extending at least to an underlying insulating layer positioned between the top semiconductor layer and a bottom semiconductor layer. A dielectric layer covers the top exposed surfaces of the carrier. Backside trenches through the bottom semiconductor layer extending at least to the insulating layer form isolated backside regions corresponding to the frontside positive and negative electrode regions. Backside contacts positioned on the bottom semiconductor layer and coupled to the positive and negative electrode regions allow for the electric charging of the frontside electrode regions.
    Type: Grant
    Filed: December 30, 2010
    Date of Patent: May 3, 2016
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, David Xuan-Qi Wang
  • Patent number: 9318644
    Abstract: A back contact back junction thin-film solar cell is formed on a thin-film semiconductor solar cell. Preferably the thin film semiconductor material comprises crystalline silicon. Base regions, emitter regions, and front surface field regions are formed through ion implantation and annealing processes.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: April 19, 2016
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Virendra V. Rana, Pawan Kapur
  • Publication number: 20160087579
    Abstract: A solar photovoltaic module laminate for electric power generation is provided. A plurality of solar cells are embedded within module laminate and arranged to form at least one string of electrically interconnected solar cells within said module laminate. A plurality of power optimizers are embedded within the module laminate and electrically interconnected to and powered with the plurality of solar cells. Each of the distributed power optimizers capable of operating in either pass-through mode without local maximum-power-point tracking (MPPT) or switching mode with local maximum-power-point tracking (MPPT) and having at least one associated bypass switch for distributed shade management.
    Type: Application
    Filed: April 14, 2014
    Publication date: March 24, 2016
    Applicant: Solexel, Inc.
    Inventor: Mehrdad M. Moslehi
  • Patent number: 9293619
    Abstract: A back contact solar cell comprises an active semiconductor absorber for use in a back contact solar cell having a light capturing front side and a backside opposite the light capturing front side. A first interdigitated metallization is positioned over the backside of the active semiconductor absorber. The first interdigitated metallization forming base and emitter contact metallization of the back contact solar cell. A backplane is positioned over the backside of the active semiconductor absorber and the first interdigitated metallization. A second interdigitated metallization is positioned over the backplane. The second interdigitated metallization is connected to the first interdigitated metallization for extracting photovoltaic power from the active semiconductor absorber. The second interdigitated metallization has base and emitter busbars over the backplane for electrical connection.
    Type: Grant
    Filed: November 20, 2012
    Date of Patent: March 22, 2016
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Michael Wingert
  • Publication number: 20160035918
    Abstract: A three-dimensional thin-film solar cell 100, comprising a three-dimensional thin-film solar cell substrate comprising a plurality of single-aperture or dual-aperture unit cells with emitter junction regions 522 and doped base regions 530, emitter metallization regions 525 and base metallization regions 532. Optionally, the three-dimensional thin-film solar cell may be mounted on a rear mirror for improved light trapping and conversion efficiency.
    Type: Application
    Filed: December 3, 2012
    Publication date: February 4, 2016
    Applicant: SOLEXEL, INC.
    Inventor: Mehrdad M. Moslehi