Patents Assigned to Solexel, Inc.
  • Patent number: 9236510
    Abstract: A method for making an ablated electrically insulating layer on a semiconductor substrate. A first relatively thin layer of at least an undoped glass or undoped oxide is deposited on a surface of a semiconductor substrate having n-type doping. A first relatively thin semiconductor layer having at least one substance chosen from amorphous semiconductor, nanocrystalline semiconductor, microcrystalline semiconductor, or polycrystalline semiconductor is deposited on the relatively thin layer of at least an undoped glass or undoped oxide. At least a layer of borosilicate glass or borosilicate/undoped glass stack is deposited on the relatively thin semiconductor layer. The at least borosilicate glass or borosilicate/undoped glass stack is selectively ablated with a pulsed laser, and the relatively thin semiconductor layer substantially protects the semiconductor substrate from the pulsed laser.
    Type: Grant
    Filed: December 20, 2013
    Date of Patent: January 12, 2016
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Virendra V. Rana, Pranav Anbalagan, Vivek Saraswat
  • Patent number: 9219171
    Abstract: Structures and methods for a solar cell having an integrated bypass switch are provided. According to one embodiment, an integrated solar cell and bypass switch comprising a semiconductor layer having background doping, a frontside, and a backside is provided. A patterned first level metal is positioned on the layer backside and an electrically insulating backplane is positioned on the first level metal. A trench isolation pattern partitions the semiconductor layer into a solar cell region and at least one monolithically integrated bypass switch region. A patterned second level metal is positioned on the electrically insulating backplane and which connects to the first level metal through the backplane to complete the electrical metallization of the monolithically integrated solar cell and bypass switch structure.
    Type: Grant
    Filed: October 16, 2013
    Date of Patent: December 22, 2015
    Assignee: Solexel, Inc.
    Inventor: Mehrdad M. Moslehi
  • Patent number: 9214353
    Abstract: Methods and systems are provided for the split and separation of a layer of desired thickness of crystalline semiconductor material containing optical, photovoltaic, electronic, micro-electro-mechanical system (MEMS), or optoelectronic devices, from a thicker donor wafer using laser irradiation.
    Type: Grant
    Filed: February 26, 2013
    Date of Patent: December 15, 2015
    Assignee: Solexel, Inc.
    Inventors: Takao Yonehara, Virenda V. Rana, Sean Seutter, Mehrdad M. Moslehi, Subramanian Tamilmani
  • Patent number: 9214585
    Abstract: Annealing solutions providing damage-free laser patterning utilizing auxiliary heating to anneal laser damaged ablation regions are provided herein. Ablation spots on an underlying semiconductor substrate are annealed during or after pulsed laser ablation patterning of overlying transparent passivation layers.
    Type: Grant
    Filed: April 29, 2014
    Date of Patent: December 15, 2015
    Assignee: Solexel, Inc.
    Inventors: Virendra V. Rana, Mehrdad M. Moslehi, Pawan Kapur, Benjamin Rattle, Heather Deshazer, Solene Coutant
  • Publication number: 20150349708
    Abstract: A solar photovoltaic module laminate for electric power generation is provided. The module comprises a plurality of solar cells embedded within the module laminate and electrically interconnected to form at least one string of electrically interconnected solar cells within said module laminate. And at least one remote-access module switch (RAMS) power electronic circuit embedded within the module laminate electrically interconnected to and powered with said at least one string of electrically interconnected solar cells and serving as a remote-controlled module power delivery gate switch.
    Type: Application
    Filed: April 14, 2014
    Publication date: December 3, 2015
    Applicant: Solexel, Inc.
    Inventor: Mehrdad M. Moslehi
  • Patent number: 9196759
    Abstract: Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.
    Type: Grant
    Filed: February 23, 2015
    Date of Patent: November 24, 2015
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Pawan Kapur, Karl-Josef Kramer, David Xuan-Qi Wang, Sean M. Seutter, Virendra V. Rana, Anthony Calcaterra, Emmanuel Van Kerschaver
  • Patent number: 9130076
    Abstract: Fabrication methods and structures are provided for the formation of monolithically isled back contact back junction solar cells. In one embodiment, base and emitter contact metallization is formed on the backside of a back contact back junction solar cell substrate. A trench stop layer is formed on the backside of a back contact back junction solar cell substrate and is electrically isolated from the base and emitter contact metallization. The trench stop layer has a pattern for forming a plurality semiconductor regions. An electrically insulating layer is formed on the base and emitter contact metallization and the trench stop layer. A trench isolation pattern is formed through the back contact back junction solar cell substrate to the trench stop layer which partitions the semiconductor layer into a plurality of solar cell semiconductor regions on the electrically insulating layer.
    Type: Grant
    Filed: January 20, 2015
    Date of Patent: September 8, 2015
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Virendra V. Rana, Heather Deshazer, Pawan Kapur
  • Patent number: 9099584
    Abstract: A three-dimensional structure having a mixture of inverted pyramidal cavities and substantially flat areas defines the frontside and backside of a substrate. The substantially flat areas have ridges forming base openings of the inverted pyramidal cavities and planar linear regions across the substrate. Pyramidal sidewalls define the pyramidal cavities from the ridges to pyramidal apices. Metallization contacts emitter regions on the frontside of the substantially flat areas.
    Type: Grant
    Filed: April 26, 2010
    Date of Patent: August 4, 2015
    Assignee: Solexel, Inc.
    Inventors: Suketu Parikh, Nevran Ozguven, Duncan Harwood, Mehrdad M. Moslehi
  • Patent number: 9093323
    Abstract: Methods here disclosed provide for selectively coating three-dimensional features on a substrate while avoiding liquid coating material wicking into micro cavities on the substrates. The steps include depositing a semiconductor layer on a sacrificial layer formed on a template and selectively etching the sacrificial layer. Then, the steps include releasing the semiconductor layer from the template and coating three-dimensional features on the substrate using a liquid coating step for applying a liquid coating material to a pre-determined surface of the three-dimensional features on the substrate.
    Type: Grant
    Filed: July 15, 2013
    Date of Patent: July 28, 2015
    Assignee: Solexel, Inc.
    Inventors: David Xuan-Qi Wang, Mehrdad M. Moslehi, Somnath Nag
  • Patent number: 9076642
    Abstract: This disclosure enables high-productivity fabrication of porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.
    Type: Grant
    Filed: September 24, 2011
    Date of Patent: July 7, 2015
    Assignee: Solexel, Inc.
    Inventors: Takao Yonehara, Subramanian Tamilmani, Karl-Josef Kramer, Jay Ashjaee, Mehrdad M. Moslehi, Yasuyoshi Miyaji, Noriyuki Hayashi, Takamitsu Inahara
  • Publication number: 20150159292
    Abstract: This disclosure enables high-productivity controlled fabrication of uniform porous semiconductor layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers). Some applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation). Further, this disclosure is applicable to the general fields of photovoltaics, MEMS, including sensors and actuators, stand-alone, or integrated with integrated semiconductor microelectronics, semiconductor microelectronics chips and optoelectronics.
    Type: Application
    Filed: December 8, 2014
    Publication date: June 11, 2015
    Applicant: Solexel, Inc.
    Inventors: Karl-Josef Kramer, Mehrdad M. Moslehi, Subramanian Tamilmani, George D. Kamian, Jay Ashjaee, Takao Yonehara
  • Patent number: 9053957
    Abstract: A structure and method operable to create a reusable template for detachable thin semiconductor substrates is provided. The reusable template has a three-dimensional (3-D) surface topography comprising a plurality of raised areas comprising a rounded top and separated by a plurality of depressed areas.
    Type: Grant
    Filed: May 17, 2013
    Date of Patent: June 9, 2015
    Assignee: Solexel, Inc.
    Inventors: Suketu Parikh, David Dutton, Pawan Kapur, Somnath Nag, Mehrdad M. Moslehi, Karl-Josef Kramer, Nevran Ozguven, Burcu Ucok
  • Publication number: 20150140721
    Abstract: Various laser processing schemes are disclosed for producing various types of hetero junction and homo-junction solar cells. The methods include base and emitter contact opening, selective doping, metal ablation, annealing to improve passivation, and selective emitter doping via laser heating of aluminum. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero junction solar cells. Laser ablation techniques are disclosed that leave the underlying silicon substantially undamaged. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, or other cleavage techniques such as ion implantation and heating, that are either planar or textured/three-dimensional.
    Type: Application
    Filed: December 20, 2013
    Publication date: May 21, 2015
    Applicant: SOLEXEL, INC.
    Inventors: Mehrdad M. Moslehi, Virendra V. Rana, Pranav Anbalagan, Vivek Saraswat
  • Publication number: 20150101761
    Abstract: Solar photovoltaic window blind slats for power generation from internal and external light sources are provided are provided. A plurality of solar cells are attached to at least two sides of a slat core. Distributed maximum power point tracking optimizer components are associated with each solar cell. The solar cells and corresponding distributed maximum power point tracking optimizer components on each slat side are connected in electrical series.
    Type: Application
    Filed: May 12, 2014
    Publication date: April 16, 2015
    Applicant: Solexel, Inc.
    Inventors: Mehrdad M. Moslehi, Pawan Kapur
  • Patent number: 8999058
    Abstract: This disclosure enables high-productivity fabrication of semiconductor-based separation layers (made of single layer or multi-layer porous semiconductors such as porous silicon, comprising single porosity or multi-porosity layers), optical reflectors (made of multi-layer/multi-porosity porous semiconductors such as porous silicon), formation of porous semiconductor (such as porous silicon) for anti-reflection coatings, passivation layers, and multi-junction, multi-band-gap solar cells (for instance, by forming a variable band gap porous silicon emitter on a crystalline silicon thin film or wafer-based solar cell). Other applications include fabrication of MEMS separation and sacrificial layers for die detachment and MEMS device fabrication, membrane formation and shallow trench isolation (STI) porous silicon (using porous silicon formation with an optimal porosity and its subsequent oxidation).
    Type: Grant
    Filed: May 5, 2010
    Date of Patent: April 7, 2015
    Assignee: Solexel, Inc.
    Inventors: George D. Kamian, Somnath Nag, Subbu Tamilmani, Mehrdad M. Moslehi, Karl-Josef Kramer, Takao Yonehara
  • Patent number: 8992746
    Abstract: An apparatus for anodizing substrates immersed in an electrolyte solution. A substrate holder mounted in a storage tank includes a first support unit having first support elements for supporting, in a liquid-tight condition, only lower circumferential portions of the substrates, and a second support unit attachable to and detachable from the first support unit and having second support elements for supporting, in a liquid-tight condition, remaining circumferential portions of the substrates. A drive mechanism separates the first support unit and the second support unit when loading and unloading the substrates, and for connecting the first support unit and the second support unit after the substrates are placed in the substrate holder.
    Type: Grant
    Filed: December 2, 2011
    Date of Patent: March 31, 2015
    Assignees: Dainippon Screen Mfg. Co., Ltd., Solexel, Inc.
    Inventors: Yasuyoshi Miyaji, Noriyuki Hayashi, Takamitsu Inahara, Takao Yonehara, Karl-Josef Kramer, Subramanian Tamilmani
  • Publication number: 20150068592
    Abstract: An interdigitated back contact solar cell is provided. The solar cell comprises a solar cell substrate having a light receiving frontside and a backside comprising base and emitter regions. A first level metal (M1) layer is positioned on the substrate backside contacting the base and emitter regions. A second level metal (M2) layer is connected to the first level metal (M1) layer and comprises a base busbar and an emitter busbar. The first level metal comprises substantially orthogonal interdigitated metallization and substantially parallel interdigitated metallization positioned under and corresponding to the base and emitter busbars on the second level metal (M2). The substantially parallel interdigitated metallization of M1 collects carriers of opposite polarity of the corresponding busbar.
    Type: Application
    Filed: April 23, 2014
    Publication date: March 12, 2015
    Applicant: Solexel, Inc.
    Inventors: Swaroop Kommera, Pawan Kapur, Yen-Sheng Su, Vivek Saraswat, Anand Deshpande, Mehrdad M. Moslehi
  • Publication number: 20150061086
    Abstract: A semiconductor template having a top surface aligned along a (100) crystallographic orientation plane and an inverted pyramidal cavity defined by a plurality of walls aligned along a (111) crystallographic orientation plane. A method for manufacturing a semiconductor template by selectively removing silicon material from a silicon template to form a top surface aligned along a (100) crystallographic plane of the silicon template and a plurality of walls defining an inverted pyramidal cavity each aligned along a (111) crystallographic plane of the silicon template.
    Type: Application
    Filed: March 3, 2014
    Publication date: March 5, 2015
    Applicant: SOLEXEL, INC.
    Inventors: David Xuan-Qi Wang, Mehrdad M. Moslehi
  • Publication number: 20150056742
    Abstract: Annealing solutions providing damage-free laser patterning utilizing auxiliary heating to anneal laser damaged ablation regions are provided herein. Ablation spots on an underlying semiconductor substrate are annealed during or after pulsed laser ablation patterning of overlying transparent passivation layers.
    Type: Application
    Filed: April 29, 2014
    Publication date: February 26, 2015
    Applicant: Solexel, Inc.
    Inventors: Virendra V. Rana, Mehrdad M. Moslehi, Pawan Kapur, Benjamin Rattle, Heather Deshazer, Solene Coutant
  • Patent number: 8962380
    Abstract: Back contact back junction solar cell and methods for manufacturing are provided. The back contact back junction solar cell comprises a substrate having a light capturing frontside surface with a passivation layer, a doped base region, and a doped backside emitter region with a polarity opposite the doped base region. A backside passivation layer and patterned reflective layer on the emitter form a light trapping backside mirror. An interdigitated metallization pattern is positioned on the backside of the solar cell and a permanent reinforcement provides support to the cell.
    Type: Grant
    Filed: December 9, 2010
    Date of Patent: February 24, 2015
    Assignee: Solexel, Inc.
    Inventors: Mehrdad M Moslehi, Pawan Kapur, Karl-Josef Kramer, David Xuan-Qi Wang, Sean Seutter, Virenda V Rana, Anthony Calcaterra, Emmanuel Van Kerschaver