Patents Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION
  • Patent number: 12272703
    Abstract: A solid-state imaging element including a semiconductor substrate having a photodiode and a floating diffusion; a capacitor that includes a PD side electrode disposed on a surface of the photodiode opposite to a surface into which the light enters, and an opposite PD side electrode facing the PD side electrode with a dielectric film therebetween; an amplification transistor; and an FD side wiring electrode. At least a part of the PD side electrode and the FD side wiring electrode are formed in the semiconductor substrate and extend in a thickness direction of the semiconductor substrate. One end of a first contact hole in which at least a part of the PD side electrode is formed and one end of a second contact hole in which the FD side wiring electrode is formed are both positioned in a surface of the semiconductor substrate on a side opposite to the photodiode side.
    Type: Grant
    Filed: May 19, 2020
    Date of Patent: April 8, 2025
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Susumu Tonegawa
  • Patent number: 12272713
    Abstract: A semiconductor apparatus and electronic equipment are provided that allow improvement of bondability between a first electrode section and a second electrode section. A semiconductor apparatus includes a first interconnect section, a first interlayer insulating film covering one surface side of the first interconnect section, a first electrode section in a first through-hole in the first interlayer insulating film and electrically connected to the first interconnect section, a second interconnect section, a second interlayer insulating film covering a surface side of the second interconnect section facing the first interconnect section, and a second electrode section in a second through-hole in the second interlayer insulating film and electrically connected to the second interconnect section. The first electrode section and the second electrode section are directly bonded to each other. The first electrode section has a larger coefficient of thermal expansion than that of the first interconnect section.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: April 8, 2025
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Hideto Hashiguchi
  • Patent number: 12272714
    Abstract: An imaging device includes a first chip. The first chip includes a first pixel and a second pixel. The first pixel includes a first anode region and a first cathode region, and the second pixel includes a second anode region and a second cathode region. The first chip includes a first wiring layer. The first wiring layer includes a first anode electrode, a first anode via coupled to the first anode electrode and the first anode region, and a second anode via coupled to the first anode electrode and the second anode region.
    Type: Grant
    Filed: April 7, 2023
    Date of Patent: April 8, 2025
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Kenji Kobayashi, Toshifumi Wakano, Yusuke Otake
  • Patent number: 12273818
    Abstract: Provided is a communication device which includes a communication section that receives, via a transceiving antenna, a reference signal to be transmitted from a base station, a measurement section that measures a reception-signal level on a basis of the reference signal received by the communication section, and a decision section that decides at least one of a transmission power or a number of times of transmission for starting random access to the base station, on a basis of the reception-signal level measured by the measurement section, and a difference between a gain in a reception frequency band of the transceiving antenna and a gain in a transmission frequency band of the transceiving antenna.
    Type: Grant
    Filed: July 15, 2020
    Date of Patent: April 8, 2025
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Masahiro Uno, Osamu Kozakai
  • Patent number: 12273641
    Abstract: In a solid-state imaging element provided with a comparator for each column, responsiveness of the comparator is improved. An input transistor outputs, from a drain, a potential within a range from one side to the other side of a pair of output potentials on the basis of whether or not an input potential input to a source and a predetermined reference potential input to a gate substantially coincide with each other. A first current source supplies a constant current. A capacitor is inserted between the source of the input transistor and a first current source. A cutoff switch disconnects a drain of the input transistor from a connection node within a predetermined period for initializing the connection node between the capacitor and the first current source to a lower one of the pair of output potentials, and connects the connection node with the drain of the input transistor outside the predetermined period.
    Type: Grant
    Filed: June 25, 2021
    Date of Patent: April 8, 2025
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Daisuke Nakagawa, Takashi Moue, Yoshio Awatani
  • Patent number: 12273634
    Abstract: Color accuracy in an imaging device is improved. An imaging element includes a plurality of pixels that acquires first information that is information of three primary colors and second information that is information of at least two colors different from the three primary colors and that includes at least one of complementary colors of the three primary colors.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: April 8, 2025
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Masashi Nakata, Hiroaki Yamajo, Yosuke Yamamoto, Yuichiro Baba, Junichi Kanai
  • Patent number: 12273638
    Abstract: An imaging device according to the present disclosure includes the plurality of normal pixels arranged in a matrix, the special pixel arranged by replacing a part of the normal pixels, the color filter corresponding to the normal pixels and arranged according to a predetermined rule, the special filter arranged corresponding to the special pixel, and the special pixel color filter arranged to surround at least a part of the periphery of the special filter.
    Type: Grant
    Filed: October 26, 2020
    Date of Patent: April 8, 2025
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Yuji Iseri, Hodaka Kira, Daisuke Hagihara, Kazuki Yoshida, Syo Yasunaga, Koji Yamaryo, Takeo Ono, Kimihiko Sato
  • Patent number: 12273636
    Abstract: A photodetection device according to the present disclosure includes: a pixel; a reference signal generation unit; a comparison circuit; and a first switch. The pixel is configured to generate a pixel signal. The reference signal generation unit is configured to generate a reference signal. The comparison circuit includes a first-stage amplifier circuit and a second-stage amplifier circuit that is coupled to the first-stage amplifier circuit through a connection node. The first-stage amplifier circuit is configured to output a first output signal corresponding to a comparison operation based on the pixel signal and the reference signal. The second-stage amplifier circuit is configured to output a second output signal corresponding to the first output signal outputted from the first-stage amplifier circuit through the connection node. The first switch has one end and another end. The one end is coupled to the connection node. The first switch allows impedance and a voltage at the connection node to change.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: April 8, 2025
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kengo Ando, Sachio Akebono
  • Patent number: 12272706
    Abstract: The present disclosure relates to an imaging element and an electronic apparatus configured to achieve higher-resolution image taking. The imaging element includes: a photoelectric conversion portion provided in a semiconductor substrate for each pixel that performs photoelectric conversion on light that enters through a filter layer; an element isolation portion configured to separate the photoelectric conversion portions of adjacent pixels; and an inter-pixel light shielding portion disposed between the pixels in a layer and provided between the semiconductor substrate and the filter layer and separated from a light receiving surface of the semiconductor substrate by a predetermined interval. Moreover, an interval between the light receiving surface of the semiconductor substrate and a tip end surface of the inter-pixel light shielding portion is smaller than a width of the tip end surface of the inter-pixel light shielding portion.
    Type: Grant
    Filed: December 5, 2023
    Date of Patent: April 8, 2025
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Hirotoshi Nomura
  • Patent number: 12270911
    Abstract: The present technology relates to a light receiving element and a ranging system to reduce power consumption. A light receiving element includes a pixel which includes an SPAD, a first transistor configured to set a cathode voltage of the SPAD at a first negative voltage, a voltage conversion circuit configured to convert the cathode voltage of the SPAD upon incidence of a photon and output the converted cathode voltage, and an output unit configured to output a detection signal indicating the incidence of the photon on the SPAD on the basis of the converted cathode voltage. The present technology is applicable to a ranging system that detects a range in a depth direction to a subject, for example.
    Type: Grant
    Filed: February 22, 2024
    Date of Patent: April 8, 2025
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Tatsuki Nishino
  • Patent number: 12270917
    Abstract: An information processing apparatus includes an acquisition unit that acquires first position information indicating a position of a target object in a target region and a generation unit that generates, on the basis of the first position information, second position information including area mesh information that indicates a target area mesh containing the target object and included in plural area meshes produced by dividing the target region in a first direction and a second direction such that a division number in the second direction varies for each position in the first direction in the target region and relative position information that indicates a position of the target object in the target area mesh. The present technology is applicable to a transmission device and a reception device.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: April 8, 2025
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Toshihiro Fujiki, Seiji Kobayashi
  • Patent number: 12270895
    Abstract: The present technology relates to an information processing apparatus, an information processing method, a program, a mobile-object control apparatus, and a mobile object that make it possible to improve the accuracy in recognizing a target object. An information processing apparatus includes a geometric transformation section that transforms at least one of a captured image or a sensor image to match coordinate systems of the captured image and the sensor image, the captured image being obtained by an image sensor, the sensor image indicating a sensing result of a sensor of which a sensing range at least partially overlaps a sensing range of the image sensor; and an object recognition section that performs processing of recognizing a target object on the basis of the captured image and sensor image of which the coordinate systems have been matched to each other. The present technology is applicable to, for example, a system used to recognize a target object around a vehicle.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: April 8, 2025
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Tatsuya Sakashita
  • Patent number: 12272156
    Abstract: Provided are an apparatus and a method for generating a two-dimensional map or a surround-view image in which an object with low position reliability is set as an enlarged display object. A data processing section configured to receive an image captured by a camera that captures the image of surroundings of a vehicle and generate a two-dimensional map including objects in the surroundings of the vehicle is included. The data processing section generates the two-dimensional map or a surround-view image including an enlarged display object having an enlarged region set thereto, the enlarged region which, in case of an object with low position reliability, extends around the object.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: April 8, 2025
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Takuya Yamaguchi
  • Patent number: 12271761
    Abstract: An information processing apparatus comprising, at least one first processor configured to carry out a first process on data input from at least one sensor to produce first processed data, a selector configured to select, according to a first predetermined condition, at least one of a plurality of second processes, and at least one second processor configured to receive the first processed data from the at least one first processor and to carry out the selected at least one of the plurality of second processes on the first processed data to produce second processed data, each of the plurality of second processes having a lower processing load than the first process.
    Type: Grant
    Filed: November 17, 2023
    Date of Patent: April 8, 2025
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Yuji Handa
  • Publication number: 20250112595
    Abstract: A PLL circuit for generating a modulated carrier signal includes a digitally controlled oscillator (DCO) to generate the modulated signal. The PLL circuit receives a desired phase change as a modulation signal at each cycle of a non-uniform clock, derived from the a DCO output and a uniform reference clock. This phase change adjusts the DCO's frequency. The circuit also receives a frequency control word, representing the ratio of the desired carrier frequency to the reference clock frequency. The phase change and frequency control word are accumulated to predict the DCO's output phase. A non-uniform clock compensation circuit calculates a compensation value for the phase change. A phase detector estimates the error between the predicted phase and the time offset between the reference clock and DCO output, generating a control signal for the DCO based on this error.
    Type: Application
    Filed: January 9, 2023
    Publication date: April 3, 2025
    Applicant: Sony Semiconductor Solutions Corporation
    Inventors: Zhong GAO, Masoud BABAIE, Martin FRITZ, Jingchu HE, Morteza ALAVI, Bogdan STASZEWSKI
  • Publication number: 20250113637
    Abstract: A solid-state imaging element includes: a photoelectric conversion unit that performs photoelectric conversion; and a color filter that is formed on a light incident side of the photoelectric conversion unit and selectively transmits light received by the photoelectric conversion unit, in which a void and a light shielding film on the light incident side of the void are formed between a plurality of the color filters.
    Type: Application
    Filed: January 5, 2023
    Publication date: April 3, 2025
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hirotaka KUTSUKAKE, Ryo TAKAHASHI, Kosuke OZAKI, Masashi OHURA, Suguru MORIYAMA
  • Publication number: 20250113117
    Abstract: The disclosure provides an imaging device that includes an array of photosensitive elements and a first counter for counting photon detection events received from a first group of photosensitive elements; wherein, in a first operation mode, the first counter is connected to a first subgroup of the first group of photosensitive elements and wherein, in a second operation mode, the first counter is connected to a second subgroup of the first group of photosensitive elements.
    Type: Application
    Filed: January 31, 2023
    Publication date: April 3, 2025
    Applicant: Sony Semiconductor Solutions Corporation
    Inventor: Hiroyasu ISHII
  • Publication number: 20250113110
    Abstract: A product-sum operation can be efficiently performed without increasing a pixel size. An imaging device includes: a pixel array unit in which a plurality of pixels that perform photoelectric conversion are arranged in directions in two dimensions; and an arithmetic operation unit configured to repeat a product-sum operation by selecting two or more of the pixels that have not been selected and are not adjacent to each other inside the pixel array unit.
    Type: Application
    Filed: March 29, 2022
    Publication date: April 3, 2025
    Applicant: Sony Semiconductor Solutions Corporation
    Inventors: Katsuhiko HANZAWA, Daisuke SAITO
  • Publication number: 20250113120
    Abstract: Pixel circuits of a solid-state imaging device are arranged in pixel columns, wherein, for each pixel column, signal outputs of the pixel circuits are connected to a data signal line. The solid-state imaging device further includes comparator circuits, wherein each comparator circuit generates an active comparator signal in response to a voltage difference between a first comparator input and a second comparator input. Each first comparator input is connected to one of the data signal lines. A ramp generator circuit includes at least one resistor network and buffer circuits. The ramp generator circuit generates a voltage ramp signal based on voltages at voltage tap nodes of the at least one resistor network. Each buffer circuit passes a buffered voltage ramp signal to the second comparator input of at least one of the comparator circuits.
    Type: Application
    Filed: January 18, 2023
    Publication date: April 3, 2025
    Applicant: Sony Semiconductor Solutions Corporation
    Inventors: Jae-Sung AN, Naoki KAWAZU
  • Patent number: 12266314
    Abstract: [Object] It is possible to further improve reliability. [Solution] There is provided a display device including: a pixel unit which is configured with a plurality of pixel circuits arranged in a matrix, each of the pixel circuits including a light emitting element and a driving circuit for driving the light emitting element; scanning lines which are interconnections connected to the respective pixel circuits and are provided to extend in a first direction and correspond to respective rows of a plurality of the pixel circuits; and signal lines which are interconnections connected to the respective pixel circuits and are provided to extend in a second direction orthogonal to the first direction and correspond to respective columns of a plurality of the pixel circuits. One of the scanning lines and the signal lines, provided for the one pixel circuit, which is larger in number is positioned in a lower-level interconnection layer.
    Type: Grant
    Filed: April 11, 2024
    Date of Patent: April 1, 2025
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Takuma Fujii, Naobumi Toyomura