Patents Assigned to SONY SEMICONDUCTOR SOLUTIONS CORPORATION
  • Publication number: 20240103134
    Abstract: A distance measuring device according to the present disclosure includes a luminescence element, a light receiving element, and a substrate. The luminescence element irradiates an object (X) with light. The light receiving element receives light from the luminescence element reflected from the object (X). The luminescence element and the light receiving element are mounted on a substrate. In addition, a bonding wire (W) electrically connecting the light receiving element and the substrate is not disposed on an edge of the light receiving element on a side of the luminescence element.
    Type: Application
    Filed: November 22, 2021
    Publication date: March 28, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Atsushi YOSHIDA
  • Publication number: 20240107157
    Abstract: The present disclosure relates to a solid-state imaging device, a method for driving the solid-state imaging device, and an electronic device capable of improving auto-focusing accuracy by using a phase difference signal obtained by using a photoelectric conversion film. The solid-state imaging device includes a pixel including a photoelectric conversion portion having a structure where a photoelectric conversion film is interposed by an upper electrode on the photoelectric conversion film and a lower electrode under the photoelectric conversion film. The upper electrode is divided into a first upper electrode and a second upper electrode. The present disclosure can be applied to, for example, a solid-state imaging device or the like.
    Type: Application
    Filed: December 6, 2023
    Publication date: March 28, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Keisuke HATANO, Fumihiko KOGA, Tetsuji YAMAGUCHI, Shinichiro IZAWA
  • Publication number: 20240105742
    Abstract: The present disclosure relates to an imaging element and an electronic apparatus configured to achieve higher-resolution image taking. The imaging element includes: a photoelectric conversion portion provided in a semiconductor substrate for each pixel that performs photoelectric conversion on light that enters through a filter layer; an element isolation portion configured to separate the photoelectric conversion portions of adjacent pixels; and an inter-pixel light shielding portion disposed between the pixels in a layer and provided between the semiconductor substrate and the filter layer and separated from a light receiving surface of the semiconductor substrate by a predetermined interval. Moreover, an interval between the light receiving surface of the semiconductor substrate and a tip end surface of the inter-pixel light shielding portion is smaller than a width of the tip end surface of the inter-pixel light shielding portion.
    Type: Application
    Filed: December 5, 2023
    Publication date: March 28, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Hirotoshi NOMURA
  • Patent number: 11943549
    Abstract: An imaging apparatus and electronic equipment configured for reduced power consumption are disclosed. In one example, an imaging apparatus includes a pixel array unit including a first pixel portion and a second pixel portion different from the first pixel portion. Each of the first pixel portion and the second pixel portion includes a first photoelectric conversion unit and a second photoelectric conversion unit adjacent to the first photoelectric conversion unit. The pixel array unit includes a first drive line connected to the first photoelectric conversion unit of the first pixel portion and the second pixel portion, a second drive line connected to the second photoelectric conversion unit of the first pixel portion, and a third drive line connected to the second photoelectric conversion unit of the second pixel portion. The t technology can, for example, be applied in a CMOS image sensor having pixels for phase difference detection.
    Type: Grant
    Filed: March 2, 2023
    Date of Patent: March 26, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Keiichiro Takahashi
  • Patent number: 11942493
    Abstract: An imaging device in which noise can be reduced, and an electronic device using this device. The imaging device includes a light receiving element, and a read circuit. A field effect transistor in the read circuit has a semiconductor layer in which a channel is formed, a gate electrode that covers the semiconductor layer, and a gate insulating film disposed between the semiconductor layer and the gate electrode. The semiconductor layer has a main surface, and a first side surface on one end side of the main surface in a gate width direction of the field effect transistor. The gate electrode has a first portion that faces the main surface via the gate insulating film, and a second portion that faces the first side surface via the gate insulating film. A crystal plane of the first side surface is a plane or a plane equivalent to the plane.
    Type: Grant
    Filed: September 17, 2020
    Date of Patent: March 26, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Shinya Yamakawa
  • Patent number: 11942502
    Abstract: The present technology relates to a solid-state imaging device compatible with miniaturization of pixels, a method for manufacturing the solid-state imaging device, and an electronic apparatus. The solid-state imaging device is formed by joining a front surface side as the wiring layer formation surface of the first semiconductor substrate to a back surface side of the second semiconductor substrate. The first semiconductor substrate includes a photodiode and a transfer transistor. The second semiconductor substrate includes a charge/voltage retention portion that retains the electric charge transferred by the transfer transistor or the voltage corresponding to the electric charge. The solid-state imaging device includes a through electrode that penetrates the second semiconductor substrate, and transmits the electric charge or the voltage to the charge/voltage retention portion. The present technology can be applied to solid-state imaging devices and the like, for example.
    Type: Grant
    Filed: January 18, 2019
    Date of Patent: March 26, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Kyohei Mizuta
  • Patent number: 11942494
    Abstract: An imaging device that includes a wiring substrate, an image sensor package mounted on the wiring substrate, a package frame attached to a light receiving surface side of the image sensor package, and a lens holder arranged to cover the package frame and holding a lens unit so that the lens unit faces the light receiving surface of the image sensor package. The package frame includes a material having a larger coefficient of linear expansion than a material of the lens holder, and includes a wall portion that extends in a direction perpendicular to the wiring substrate toward the wiring substrate. A gap is provided between the wall portion of the package frame and the image sensor package, and between an end of the wall portion of the package frame and the wiring substrate. The lens holder includes a wall portion facing the wall portion of the package frame.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: March 26, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hideo Okamoto, Makoto Murai
  • Patent number: 11940536
    Abstract: The present technology relates to a light receiving element and a ranging system to reduce power consumption. A light receiving element includes a pixel which includes an SPAD, a first transistor configured to set a cathode voltage of the SPAD at a first negative voltage, a voltage conversion circuit configured to convert the cathode voltage of the SPAD upon incidence of a photon and output the converted cathode voltage, and an output unit configured to output a detection signal indicating the incidence of the photon on the SPAD on the basis of the converted cathode voltage. The present technology is applicable to a ranging system that detects a range in a depth direction to a subject, for example.
    Type: Grant
    Filed: August 16, 2019
    Date of Patent: March 26, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Tatsuki Nishino
  • Patent number: 11942495
    Abstract: A semiconductor device includes a semiconductor chip, a circuit board, a heat releasing plate, an adhesive member, and a conductive member. The circuit board transmits a signal of the semiconductor chip. The heat releasing plate has the semiconductor chip disposed thereon, and has an opening in a region on the outer side of a semiconductor chip placement region that is a region in which the semiconductor chip is disposed. The adhesive member is disposed in a region on the outer side of the opening on a different surface of the heat releasing plate from the surface on which the semiconductor chip is disposed, and bonds the circuit board and the heat releasing plate to each other. The conductive member connects the semiconductor chip and the circuit board to each other via the opening.
    Type: Grant
    Filed: June 21, 2019
    Date of Patent: March 26, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Daisuke Chino, Hiroyuki Shigeta, Shigekazu Ishii, Koyo Hosokawa, Hirohisa Yasukawa, Mitsuhito Kanatake, Kosuke Hareyama, Yutaka Ootaki, Kiyohisa Sakai, Atsushi Tsukada, Hirotaka Kobayashi, Ninao Sato, Yuki Yamane
  • Patent number: 11940602
    Abstract: The present disclosure relates to an imaging device capable of achieving miniaturization and height reduction of a device configuration and reducing generation of a flare or a ghost. A light shielding film is formed in a region including a side surface portion of a lens formed on a solid-state imaging element. The present disclosure is applicable to an imaging device.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: March 26, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Atsushi Yamamoto
  • Publication number: 20240094400
    Abstract: A configuration control circuitry for a time-of-flight system, the time-of-flight system including an illumination source configured to emit light to a scene and an image sensor configured to generate image data representing a time-of-flight measurement of light reflected from the scene.
    Type: Application
    Filed: February 8, 2022
    Publication date: March 21, 2024
    Applicant: Sony Semiconductor Solutions Corporation
    Inventors: Jonathan DEMAEYER, Manuel AMAYA-BENITEZ, Morin DEHAN, Valerio CAMBARERI
  • Patent number: 11937002
    Abstract: Provided is a solid-state imaging device and an electronic apparatus capable of achieving both of a high dynamic range operation and an auto focus operation in a pixel configuration in which a plurality of unit pixels includes two or more subpixels. The solid-state imaging device includes a first pixel separation region that separates a plurality of unit pixels including two or more subpixels, a second pixel separation region that separates each of the plurality of unit pixels separated by the first pixel separation region and an overflow region that causes signal charges accumulated in the subpixels to overflow to at least one of adjacent subpixels, in which the overflow region is formed between a first subpixel and a second subpixel.
    Type: Grant
    Filed: November 8, 2022
    Date of Patent: March 19, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hirofumi Yamashita, Shohei Shimada, Yusuke Otake, Yusuke Tanaka, Toshifumi Wakano
  • Patent number: 11936994
    Abstract: The present technology relates to a solid-state imaging device and an electronic apparatus that enable simultaneous acquisition of a signal for generating a high dynamic range image and a signal for detecting a phase difference. The solid-state imaging device includes a plurality of pixel sets each including color filters of the same color, for a plurality of colors, each pixel set including a plurality of pixels. Each pixel includes a plurality of photodiodes PD. The present technology can be applied, for example, to a solid-state imaging device that generates a high dynamic range image and detects a phase difference, and the like.
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: March 19, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Kozo Hoshino
  • Patent number: 11936996
    Abstract: Miniaturization of pixels is facilitated in a solid-state imaging element that detects presence or absence of an address event. The solid-state imaging element includes a plurality of detection pixels and a detection circuit. In the solid-state imaging element including the plurality of detection pixels and the detection circuit, each of the plurality of detection pixels generates a voltage signal according to a logarithmic value of a photocurrent. Furthermore, in the solid-state imaging element including the plurality of detection pixels and the detection circuit, the detection circuit detects whether or not a change amount of a voltage signal of a detection pixel indicated by an input selection signal among the plurality of detection pixels exceeds a predetermined threshold value.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: March 19, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Atsumi Niwa
  • Patent number: 11935485
    Abstract: A display device that includes a plurality of scanning lines, a plurality of data lines, and a pixel unit in which a pixel is specified by the scanning line and the data line, in which image data of one line is simultaneously displayed for a plurality of adjacent scanning lines, image data to be simultaneously displayed is made different between an N frame and an (N+1) frame that are temporally consecutive, and the image data is shifted by one line, and the image data of a last scanning line of at least one of the N frame or the (N+1) frame is hidden.
    Type: Grant
    Filed: December 7, 2020
    Date of Patent: March 19, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Chiaki Kon, Noboru Tanigawa, Takafumi Nishioka, Kouichi Hashikaki, Toshinobu Sekiuchi
  • Patent number: 11936999
    Abstract: Power consumption in realizing a convolutional neural network (CNN) is reduced. A solid-state imaging element according to the present technology includes a photoelectric conversion element that photoelectrically converts received light into signal charge corresponding to the amount of received light, a floating diffusion that holds the signal charge obtained by the photoelectric conversion element, a transfer control element that controls transfer of the signal charge from the photoelectric conversion element to the floating diffusion, and a control unit that controls application of a drive voltage to the transfer control element on the basis of a convolution coefficient in a CNN.
    Type: Grant
    Filed: October 13, 2020
    Date of Patent: March 19, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Haruyuki Nakagawa
  • Patent number: 11936979
    Abstract: Provided is an imaging device capable of adaptively acquiring a captured image according to an imaging condition. An imaging device (1) according to an embodiment includes: an imaging unit (10) that includes a pixel array (110) including a plurality of pixel groups each including N×N pixels (100) (N is an integer of 2 or more), and outputs a pixel signal read from each pixel; and a switching unit (14) that switches a reading mode in which the pixel signal is read from each of the pixels by the imaging unit, in which the switching unit switches the reading mode between an addition mode in which the pixel signals read from the N×N pixels included in the pixel group are added to form one pixel signal and an individual mode in which each of the pixel signals read from the N×N pixels included in the pixel group is individually output.
    Type: Grant
    Filed: September 16, 2020
    Date of Patent: March 19, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Yasushi Sato
  • Patent number: 11936392
    Abstract: In a phase locked loop composed of digital circuits, the circuit scale of a circuit that generates phase difference information is reduced. A multi-phase clock generation circuit generates a plurality of feedback clock signals having different phases. A feedback side frequency divider divides frequencies of the plurality of feedback clock signals and outputs the feedback clock signals as frequency-divided clock signals. A reference clock latch circuit holds the frequency-divided clock signals in synchronization with a reference clock signal and outputs a held value. A control circuit controls the frequencies of the plurality of feedback clock signals on the basis of the held value.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: March 19, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Tsutomu Kurihara, Tetsuya Fujiwara
  • Patent number: 11937001
    Abstract: The present technology relates to a sensor that detects an event which is a change in electric signal of a pixel and a control method, with which it is possible to suppress a situation where an unnatural image is obtained. An event which is a change of an electric signal of a pixel that receives light and performs photoelectric conversion to generate the electric signal is detected, and the electric signal of the pixel is read according to a voltage change in a capacitance reset to a prescribed voltage, the change being based on the electric signal of the pixel. In this case, the electric signal of an event detection pixel, among the pixels, where the event has been detected and the electric signal of a peripheral pixel, among the pixels, disposed on the periphery of the event detection pixel are read. The present technology is applicable to a sensor for detecting an event which is a change of an electric signal of a pixel, for example.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: March 19, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Futa Mochizuki
  • Publication number: 20240088188
    Abstract: An imaging device comprises a first chip that includes a first semiconductor substrate including a photoelectric conversion region. The first chip includes a first insulating layer including a first multilayer wiring electrically connected to the photoelectric conversion region. The first multilayer wiring includes a first vertical signal line (VSL1) to output a first pixel signal, and a first wiring. The imaging device includes a second chip including a second semiconductor substrate including a logic circuit. The second chip includes a second insulating layer including a second multilayer wiring electrically connected to the logic circuit. The second multilayer wiring includes a second wiring. The first chip and the second chip are bonded to one another, and, in a plan view, the first wiring and the second wiring overlap with at least a portion of the first vertical signal line (VSL1).
    Type: Application
    Filed: September 20, 2023
    Publication date: March 14, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hajime YAMAGISHI, Shota HIDA, Yuusaku KOBAYASHI