Abstract: Additional logical structures are respectively interactive with either an edge-triggered dual D-type flip-flop or an edge-triggered J-K flip-flop in order that each such flip-flop may be fully scan-set testable in all the elements thereof. Two scan-set test enabling signals, as well as two scan-set clock signal, are used to conduct three tests, as well as enabling normal edge-triggered operation. The three tests enable scan-set testability of the totality of the edge-triggered flip-flop. Two of the tests characteristically cause the logical interconnection of tested logical elements as inverter strings, which inverter strings are merged into the scan-set test loops. In addition to supporting functional logical verification, the inverter strings support the evaluation of propagation time upon such strings in order to determine the operational speed and/or impedance environment of the tested flip-flops. Marginal, as well as failed, flip-flops (flip-flop environments) are identifiable.

Abstract: An air filtration system for the operator's cab on a self-propelled crop harvesting machine is disclosed wherein the service door for access to the filter cartridge is positioned above the access door into the cab enclosure. Since the open position of the service door interferes with the opening of the cab access door, the filter cartridge cannot be changed unless the cab door is closed. A movable latch engagement member is engageable with lift members affixed to the service door to lift the latch engagement member out of an engageable position with the door latch to prevent the service door from being latched unless a filter cartridge is positioned within the filtration chamber. The filter cartridge restricts the movement of the latch engagement member to permit engagement thereof with the door latch. The resultant structure provides an air filtration system that requires a filter cartridge within the filtration chamber before the service door can be latched.

Abstract: The memory system incorporates a memory element storing binary digital data in the presence, vel non, of a Y-domain cross-tie. The memory element has a planar contour that is substantially symmetrical about a longitudinal axis and that has edge portions that are nowhere perpendicular or parallel to the longitudinal axis. A stabilizing magnetic field applied perpendicular to the longitudinal axis and in the plane of the memory element forms a first Neel wall along the longitudinal axis and causes the magnetization in the memory element to be formed into first and second domains on opposite sides of the Neel wall. When a writing magnetic field oriented in the plane of the memory element and perpendicular to the longitudinal axis but opposite to the stabilizing magnetic field orientation is coupled to the memory element, there is formed in the memory element a third domain separated from the first and second domains by second and third Neel walls having a join with one end of the first Neel wall.

Abstract: A roll baler includes upper and lower bale forming devices that cooperate with each other to define a bale starting zone, and a pickup device to deliver crop material toward the bale starting zone. The upper bale forming device preferably constitutes a series of belts extending around a plurality of guide members, one of which is an indexing guide member located in a home position to dispose the upper bale forming device proximate to the lower bale forming device at the rear of the bale starting zone. The indexing guide member is connected between a pair of disks, and drive means such as sprockets are provided for engagement with the peripheral edges of the disks to rotate the disks in a direction to cause movement of the indexing guide member in a substantially circular path of travel.

Abstract: In order to avoid undesirable delays in response time for controlling feed roll directional rotation and stopping, an electric clutch-brake planetary gear device provides stop, forward and reverse control of the feed rolls. The device functions as an electric clutch for a forward mode and as an electric brake for a reverse mode. Almost instantaneous shut down is available which is desirable for use in combination with a metal detector.

Abstract: A method and apparatus for entering data in a random access memory with a fixed orientation independent of the heading vector of the carrier vehicle. The data remains positionally fixed in the memory and is addressed for readout in a manner to present a heading-up display for all vehicle heading vectors.

Abstract: A buffer comparator receives input pulses and produces buffer output signals that drive first and second output comparators arranged to operate as an amplitude-sensitive logic circuit that produces a high level output signal when and only when the internal driving signals have an amplitude between first and second threshold levels. In one embodiment, the output of the buffer comparator is applied directly to the non-inverting input terminal of the first logic circuit comparator and through a low resistance resistor to an R-C network and the inverting terminal of the second logic circuit comparator. The remaining input terminals on the logic comparators are connected to a multiple voltage divider that provides lower and upper threshold voltages to the respective comparators. An input pulse applied to the buffer comparator initiates an internal driving signal that charges the capacitor in the R-C network exponentially.

Abstract: Implemented as a monolithic integrated circuit in CMOS technology, consisting of two two-transistor inverters cross-coupled to form a four-transistor flip-flop memory cell plus an A port NMOS gating transistor connected to one side of the flip-flop and a B port NMOS transistor connected to the other side of the flip-flop. Each A port and B port gating transistor is respectively independently gated by an A port word line and a B port word line addressing signals to conduct the stored contents of the flip-flop respectively to an A port bit line or a B port bit line. The data signal upon each A port bit line and B port bit line is respectively independently gated through respective NMOS transistors by respective A port column address line and B port column address line addressing signals to next be individually compared, in a complementary sense, to a set reference voltage in a respective A port sense amplifier and B port sense amplifier.

Abstract: A circuit of 24 transistors and 16 resistors forming an interconnected constant current source, two differential current switches, and level shifter receives scan/set test data, clock, and enablement signals for, when connected to each of the set Q and clear Q output signals of a differential feedback latch, enabling scan/set testability of such latch. Both the latch and the connected circuit, forming in aggregate a scan/set testable latch, are implementable in Emitter Coupled Logic or current Mode Logic from standard cells of gate array technology using two levels of series gating and two current sources, which standard cells are otherwise useful for the generation of other logic macros. The differential feedback latch, experiencing but a small added capacitance from the connected circuit, continues to operate fast during normal operation, but is slow in operation for scan/set test wherein the connected circuit needs overcome differential feedback loops within the latch which are still active.

Abstract: An agricultural mixing and grinding machine including a plurality of bins respectively adapted to contain different feed material to be ground and/or mixed, a grinding unit mounted adjacent one end of the plurality of bins, and a receiving hopper adjacent the opposite end of the plurality of bins. Each bin having metering auger therein arranged to discharge material from the bins at a common location into a confluence and mixing auger extending longitudinally beneath the bins from the receiving hopper toward the grinding unit and communicating at one end with an elevating auger which transfers the material to an upper distributing auger that extends in one direction along the upper portions of the bins and also in an opposite direction to communicate with the grinding unit.

Abstract: A multiple microcomputer system in which each microcomputer can execute independent programs, transfer data at high speed to or from the memory of any microcomputer in the system, and signal between microcomputers that data has been transferred and the action to be taken on the transferred data.

Abstract: A first sensor for the detection of dielectric failure (by burning) within a multilayer printed circuit assembly comprises an isolated conductive layer. This first sensor is connected by a first diode to a single wire which also connects a second, temperature, sensor via a second diode (system ground is a return). A number, nominally 16, of such single wire connected sensor pairs are selectable in accordance with an externally (microprocessor) furnished address. During a first time period, an externally (microprocessor) selected interrogation of temperature causes a first, positive, voltage bias to be applied to the selected sensor pair resulting in a current linear with temperature (over the range of 0.degree. C. to 100.degree. C.) in the second sensor. This current is transformed to voltage, offset by 273.degree. Kelvin, amplified, and converted to a digital value for issuance to an external (microprocessor) requestor.

Abstract: A microwave phase shifter for use in waveguide transmission line employs a piezoelectric cantilevered bimorph member mounted on the waveguide and a thin wafer of dielectric material mounted on the free end of the cantilever above a slot in the waveguide. Voltages applied to the bimorph member cause this member to distort so as to insert the wafer into the waveguide slot and alter the phase of the microwave signal being transmitted.

Abstract: An apparatus for maintaining electronic component pin alignment includes a support member having an adjacent lead shear, a stationary nest, a printed circuit board and a component feeder. A component in the component feeder includes a chip having a plurality of leads. The leads have a first end connected to the chip and a second free end. A movable lead guide engages the first end of the leads. A robot is mounted adjacent the support member for picking up the component from the component feeder, inserting the component into the stationary nest moving the component relative to the stationary nest for moving the lead guide from the first end of the leads toward the second free end of the leads, moving the component from the stationary nest to the shear for shearing the second free end of the leads, and moving the component from the shear to the printed circuit board and urging the leads into corresponding holes formed in the printed circuit board.

Abstract: A cyclical machine forming tool utilizes positionally justified form knives so that, nominally, a selected 80 out of 120 total stripped wire ends of flat ribbon cable may be selectively simultaneously formed, for bent, into a contour such as is useful for soldered attachement to printed circuit cards. Positional justification of wire-forming hammer elements called form knives, nominally 41 in number, across a variable distance, nominally 1.676.+-.0.009 inches, is expediently repetitively accurately accomplished by wedging them apart with interspersed counterposed knife elements, nominally 40 in number, called adjuster knives.

Abstract: A novel maximum likelihood sequence detector is provided for decoding linear cyclic error correction codes. The detector comprises one cyclic correlator for each two shaft sets of the code which have weights greater than one, and a serial correlator for detecting the shift sets of all zero's and all one's. The number of cyclic correlators required to decode linear codes is reduced to less than half the number of shift sets which define all the codewords instead of half the number of codewords where the number of shift sets is always less than the number of codewords.

Abstract: A biasing network comprising two nominal type GZ 2422D transorbs, two resistors nominal 68 ohms and one resistor nominal 110 ohms replicated at each combined differential current driver of nominal type Am26L531 and differential receiver of nominal type Am26L532, as jointly form a transceiver, which are upon a two-wire differential signal communication path allows communication to transpire at a common-mode offset voltage, nominally .+-.8 volts, which is greater than the differential signal voltage that the receiver does elsewise communicate at, and which common-mode offset voltage is at a level which might but for the biasing network damage or destroy the driver.

Abstract: A skid-steer loader having transversely spaced wheel assemblies driven by individually operable drive mechanisms having spaced apart independently mounted hydrostatic motors is disclosed wherein a speed shifter linkage interconnects the hydrostatic motor cam shafts to affect a simultaneous shifting of both motors from one speed to another. A floatingly mounted cross shaft is threadably engaged with trunnions pivotally mounted in pintle arms fastened to the hydraulic motor cam plate shafts. Rotation of the cross shaft is affected through manipulation of a control lever engageable with adjustable stops to permit a quick and convenient adjustment of high and low speed operating positions. A frictional clamping of the linkage between the control lever and a sprocket for rotating the cross shaft provides an easy initial positioning of the control lever and permits a still greater range of adjustment of the nominal operating positions for maximum operator comfort.

Abstract: An apparatus for generating halos about CRT display symbols, to distinguish them from background video, reads, from an image memory, video Bit signals corresponding to a CRT picture element P.sub.I,J, and the immediately surrounding CRT picture elements. A digital signal is generated therefrom representing a first Boolean Function. The intensity of the background illumination at P.sub.I,J, is unaltered, in response to a digital signal of zero, and is diminished by one-half, in response to a digital signal of one.

Abstract: An apparatus for protecting computer memory utilizes a parity matrix to generate an n-k check bit signal of an extended linear (n,k,4) code from a k data bit signal. Exclusive-OR gates add the n-k check bit signal to an n-k tag bit signal selected from a predetermined class, to form, when concatenated with the k data bit signal, an element of a code of a certain class. The element comprising the k data bit signal is written in memory. A correction matrix or And gate cooperating with exclusive-OR gates detects an attempt to access the k data bit signal with an n-k key bit signal belonging to the same class as the n-k tag bit signal, but which does not match it.