Abstract: The present invention provides a method for despreading spread signal used in a receiver of a wireless communication system, comprising the steps of: preprocessing spread signal to derive a group of spreading chips corresponding to a data symbol; processing Hie spreading chips to extract cophase components and orthogonal components of each of the spreading chips; and converting and combining the group of cophase components and orthogonal components according to a preset selecting signal to derive a group of despreading chips. The present invention further provides an apparatus for carrying out the above-mentioned method, which significantly simplifies the design of a dispreading circuit and reduces the area of the dispreading circuit.

Abstract: In a communication device having a modem subsystem and an Application Processing Engine (APE) that share an IP address, port number conflicts are avoided by a Port Reservation Agent (PRA) running on the APE. Apps executing on the modem subsystem must request to register a port number with the PRA prior to using it. If the address is available, the PRA creates a port reservation socket and associates the port number with the requesting app. If the requested port number is not available, the PRA returns an error and the app must request a different address. To apps executing on the APE, the port reservation sockets appear as port numbers associated with other apps executing on the APE. In this manner, port number conflicts between the modem subsystem and the APE are avoided.

Abstract: A UE side Broadcast/Multicast Control (BMC) protocol layer determines those Cell Broadcast Service (CBS) messages (and their repetitions) which the UE shall read or ignore in a succeeding CBS schedule period, based on the CBS Schedule Message contents (Message Description Type and New Message Bitmap) received in a current CBS schedule period, the CBS messages already stored in the BMC, and the CBS messages to be received. In this manner, the UE may ignore CBS messages it has already received, without knowledge of the CBS message serial numbers, and thus conserve resources such as battery power.

Abstract: A process selects a Precoding Matrix Index (PMI) in a Multiple In Multiple Out (MIMO) receiver used in a wireless communications system including a base station communicating with User Equipments (UE) through a downlink and uplink channel. The base station applies a precoding on the transmit symbol vector based on a matrix selected from a set of predefined matrices and identified by a PMI index computed by the UE and forwarded to the base station via the uplink. The process includes estimating the MIMO channel matrix H of a given set of resources blocks comprising received symbol vectors, estimating the variance ?2 of the additive noise (AWGN), and computing for each particular matrix comprised within the set of predefined matrices a cost function representative of the orthogonality of the matrix MIMO channel matrix H.

Abstract: The invention relates to a switched-mode power supply delivering a first (VPOS) and a second (VNEG) voltage which are symmetrical. It comprises a power stage (30) comprising an inductor (L), and switches (A, B, C, D, E) controlled by control signals. It also comprises a control circuit (34), coupled to the power stage (30), that is able to produce error signals (Verr1, Verr2) as a function of the difference between a reference voltage (Vref) and the first (VPOS) and second (VNEG) voltages. The power supply comprises a synchronization circuit (38), coupled to the power stage (30) and to the control circuit (34), for generating the control signals in a manner that applies a control strategy adapted to minimize error signals, maintain a non-zero amount of energy in the inductor (L), and maintain the absolute value of the first (VPOS) and second (VNEG) voltages at substantially equal values.

Abstract: The invention relates to a method for regenerating the background of digital images of a video stream comprising steps consisting in: —setting an initial background image, —cutting the unit images of the video stream into blocks b (i, j, t) and of the background image into corresponding blocks Bo (i, j, t). The method is essentially characterized in that it further includes steps consisting in: —selecting one block Bo of the background image and/or b of the frame image, and •calculating the space correlation thereof, with: •at least one block Bo of the background image at a time (t), and/or at another time (t?a), and/or •at least one block b of the frame image at a time (t), and/or at another time (t?a), and/or—updating the background image according to the calculation of the space correlation.

Abstract: A single-ended to differential buffer circuit is disclosed, adapted to couple at least an input analog signal to a receiving circuit. The buffer circuit comprises an output section comprising a differential amplifier having a first and a second input, a first and a second output. The buffer circuit further comprises an input section comprising a first and a second switched capacitor, each adapted to sample said input analog signal and having a first side and a second side, the first sides of the first and second switched capacitors being controllably connectable/disconnectable to/from said first and second outputs respectively. In the buffer circuit the second sides of said first and second switched capacitors are controllably connectable/disconnectable to/from said first and second inputs of the differential amplifier respectively.

Abstract: There is described a circuit for retro-lighting a display, comprising a group of white light-emitting diodes connected in series between a first node and a second node and a circuit for driving said group of series-coupled light-emitting diodes comprising: a power supply providing a positive voltage supplied to the first node; and a charge pump converter providing a negative voltage obtained from the positive voltage, said negative voltage being supplied to the second node.

Abstract: A control circuit (115), a control method, a DC-DC converter and an electronic device are provided. The control circuit (115) is used to control the DC-DC converter to switch its operation modes. In the control circuit (115), whether mode of the DC-DC converter is to be switched is judged according to parameters of a first duration of an active duration and a second duration of an inactive duration. Comparison of analogue values is prevented, and as a result, the use of the analogue comparator is reduced, thus the influence of the semiconductor processes on designing a controller can be reduced.

Abstract: The invention concerns a device for providing a spread frequency clock signal, comprising: —an input (51) to receive a first clock signal having a first frequency; —a programmable clock divider (52) to generate the spread frequency clock signal from the first clock signal; —a first Feedback Shift Register (21), FSR, comprising at least one stage, the FSR being adapted to generate any of an odd number M of different values, the FSR being adapted to pseudo-randomly generate a first sequence of first output values, each corresponding to one of said M different values, and to provide a first output value, according to the sequence, during each clock cycle of the spread frequency clock signal; —a control unit (22) adapted to select a division factor of the programmable clock divider based on the first output value of the FSR during each clock cycle of the spread frequency clock signal; —an output (53) for providing the spread frequency clock signal.

Abstract: A group of transistors operate as a combined power amplifier, to amplify signals to be transmitted, and as a low noise amplifier, to amplify signals which are received. In a first mode, the group of transistors is configured to amplify the signals to be transmitted by turning all of the transistors in both a first subset and a second subset on. In a second mode, the group of transistors is configured to amplify the signals which have been received by turning on the first subset of transistors and turning off the second subset of transistors.

Abstract: A multiphase buck converter (10) is disclosed, comprising: —a first buck converter branch (SD1, L1) comprising a first core section (COR1), a first power section (PWR1) having a first output node (LX1), a first coil (11) having a first end connected to the first output node (LX1), the first power section (PWR1) being adapted to be controlled by the first core section (COR1) for providing to the coil (L1) a coil current (I1), the first core section (COR1) and the first power section (PWR1) being integrated in a chip (IC); -a second buck converter branch (SD2, L2) comprising a second core section (COR2), a second power section (PWR2) having a second output node (LX2), a second coil (L2) having a first end connected to the second output node (LX2), the second power section (PWR2) being adapted to be controlled by the second core section (COR2) for providing to the second coil (L2) a second coil current (I2), the second core section (COR2) and the second power section (PWR2) being integrated in said chip (IC); -a

Abstract: A radio transceiver including—an antenna (201) switch having a control lead (226); —a RF and front end circuit (202) coupled to said antenna switch and operating in at least one 2G mode and at least one 3G mode; —a RF transceiver (209) coupled to said RF front end and operating in at least a first 2G and a second 3G mode; —a baseband (210) communicating with a set of peripherals and external devices; The radio transceiver is characterized by the fact that it includes: —control means (221) for controlling said antenna switch (201) in a isolated mode; —an programmable adaptive filter controlled by said control means for the purpose of introducing at least one notch for eliminating one corresponding spur. The radio transceiver preferably includes means (215) for performing, under control of said control means (221) a FFT computation for the purpose of elaborating a representation, in the time domain, of the different spurs and/or jammers spoiling the received signal when in isolated mode.

Abstract: The invention concerns receive circuitry for demodulating an input signal received from a transmission channel, the receive circuitry having a decision feedback equalizer including an inter-carrier interference estimation block arranged to provide an estimation of inter-carrier interference (ICI) noise based on at least a channel estimation determined for a previous symbol, a channel estimation determined for the next symbol, and on a previous estimation of the symbol data for the current symbol, the previous estimation being provided by a feedback path comprising a demapping block; and correction circuitry arranged to determine the estimation of the original data signal based on the estimation of ICI noise subtracted from the input signal.

Abstract: There is described a self oscillating modulator circuit comprising at least two coupled self oscillating loop modules, that achieved a good efficiency and a good linearity.

Abstract: The embodiment of the invention discloses a method for a UE (user equipment) to select a resource, a UE and a computer program. The method for a UE to select a resource comprises: determining resources allocated by a network when the UE needs to transmit HSUPA buffer data in a current frame; selecting a resource transmitting data with a higher efficiency as the resource available to the current frame if the resources comprise a scheduled resource and a non-scheduled resource and transmitting the HSUPA service buffer data with the selected resource. According to an embodiment of the invention, a resource which may transmit more HSUPA service buffer data may be selected between the scheduled resource and the non-scheduled resource, which may improve a utilization ratio of the resources configured by the network to the UE.

Abstract: A full duplex audio communication terminal (100) comprises a noise attenuation module (4) arranged on a transmission path of the terminal. The noise attenuation module comprises two activation thresholds, which are respectively intended to be adjusted above a noise level and above an echo level of transmission signals (TC) produced by the terminal. The first or the second activation threshold is selected as a function of the detection of signals (R) received by said terminal. An improvement to the suppression in the transmission signals of echoes from received signals is thus obtained which is compatible with the principle of full duplex communication. Preferably, the noise attenuation module processes transmission signals which are produced by an echo compensator (2). Residual echo still present in the transmission signals already processed by the echo compensator is thus further reduced.

Abstract: In a mobile communication device a loopback technique is used to enable the receive chain circuitry and digital baseband block to perform self tests on the transmit chain circuitry of the same mobile communication device for 2G and 2.5G operating Bands and channels. A transmit chain circuit is set to transmit a selected receive Band channel, which is attenuated via a loopback path within the mobile communication device's front end module and, in some embodiments, via a leakage signal path between adjacent or proximate LNA inputs of separate receive chain circuits.

Abstract: Multiple subscriber identity modem (10) capable of receiving messages related to at least two subscriber identities, characterized in that it comprises a delaying module (19) configured to: —determine, from a connection request for a service associated with a first subscriber identity, whether the service belongs to a first class of communication, and, when the service has been determined as belonging to the first class of communication, —determine whether a remaining time between the connection request and a next paging occasion, associated with a second subscriber identity, is falling on a first side of a threshold, and, when the remaining time has been determined as falling on the first side of the threshold, —delay an access grant indication related to the connection request until the paging occasion has been handled.

Abstract: A current controlling circuit comprises a DC power source, an inductor, a N-channel Metal Oxide Semiconductor (NMOS), one or more LEDs connected in series, a first resistor and a switching arrangement. The positive terminal of the DC power source is connected to the inductor in series. The series of LED is connected in series with the inductor and the first resistor. According to an embodiment the switching arrangement comprises a second resistor, a first switch and a second switch. The second resistor is connected in series with the second switch and connected in parallel with the first switch. The switching arrangement is connected in series with the first resistor and the negative terminal of the DC supply.