Abstract: Method and devices are provided for processing an image in which a row of pixels with associated light intensity values successively alternates with a row of pixels to which values are to be associated. In each current row of pixels with associated values, pixels are selected which satisfy a selection rule based on the values for the pixels in the current row with associated values and on the values from the previous and/or the next row with associated values, and segments of pixels are detected. In this manner a set of segments is obtained relative to the image being processed, from which a graph of segments is created by linking the segments according to a linking rule. Then the respective values to be associated with at least some of the pixels in the rows to be assigned values are determined by interpolation from segments in the graph which form a path in the graph.

Abstract: An image sensor having a number of pixel zones delimited by isolation trenches, each pixel zone including a photodiode; a transfer gate associated with each of the pixel zones and arranged to transfer charge from the photodiode to a sensing node; and a read circuit for reading a voltage at one of the sensing nodes, the read circuitry including a number of transistors of which at least one is positioned at least partially over a pixel zone of the pixel zones.

Abstract: An inductance formed in a stack of insulating layers, the inductance comprising first and second access terminals and first and second half-loops distributed in the stack of insulating layers on a number of distinct levels greater than or equal to four. For each level, each first half-loop is at least partly symmetrical to one of the second half-loops. All the first half-loops are series-connected according to a first succession of first half-loops to form first loops between the first access terminal and a midpoint and all the second half-loops are series-connected according to a second succession of second half-loops to form second loops between the second output terminal and the midpoint.

Abstract: A cascode amplifier comprising at least two phase-shift stages controllable between an input transistor having a control terminal connected to an input terminal of the amplifier, and an output terminal of the amplifier.

Abstract: An integrated cell and method for extracting a binary value based on a value difference between two resistors values, including connection circuitry for a binary reading of the sign of the difference between the resistors, and connection circuitry for a modification of the value of one of the resistors to make the sign of the difference invariable.

Abstract: A semiconductor device includes a semiconductive channel region and a gate region. The gate region has at least one buried part extending under the channel region. The buried part of the gate region is formed by forming a cavity under the channel region. That cavity is at least partial filled with silicon and a metal. An annealing step is performed so as to form a silicide of said metal in the cavity. The result is a totally silicided buried gate for the semiconductor device.

Abstract: An inductive coupling reader includes a passive interface circuit for modulating the impedance of an antenna circuit and extracting from the antenna circuit a data signal and a RF clock signal, and circuitry for coupling the reader to a removable security module. The reader includes an emulation circuit for opening a RF transmission channel with another reader, a non-removable electrical link linking the emulation circuit to the passive interface circuit, by which the data signal and the RF clock signal are supplied to the emulation circuit, and a data bus clocked by a bus clock signal having a frequency inferior to the frequency of the RF clock signal, for linking the emulation circuit to the removable security module. The reader has low electrical consumption.

Abstract: A memory device of the irreversibly electrically programmable type is provided with a memory cell having a dielectric zone disposed between a first electrode and second electrode. An access transistor is connected in series with the second electrode, and an auxiliary transistor is connected in series with the first electrode. The auxiliary transistor is biased to have a saturation current which is lower than a saturation current of the access transistor when both the auxiliary and access transistors are actuated. A number of the memory cells are arranged in a memory plane to form the memory device.

Abstract: A method and a circuit for scrambling an RSA-CRT algorithm calculation by an electronic circuit, in which a result is obtained from two modular exponentiation calculations, each providing a partial result, and from a recombination step, and in which a first step adds a digital quantity to at least one first partial result before said recombination step; and a second step cancels the effects of this quantity after the recombination step.

Abstract: The invention concerns a method for read-addressing a site among a plurality of storage units using a coded address derived from an instruction. The method comprises the following steps: a) predicting (104) the storage unit corresponding to the site to be addressed; b) decoding (108) the address of the site to be addressed and determining (109) the storage unit to be addressed; c) managing (105) a potential read and rewrite conflict assuming that the predicted storage unit is the storage unit to be addressed; d) controlling (111) the addressing of the predicted storage unit at the end of the managing step (105); e) at the end of step b), determining (110) whether the storage unit to be addressed corresponds to the predicted storage unit; and f) if the storage unit to be addressed does not correspond to the predicted storage unit, managing (115) a possible read and rewrite conflict in the storage unit to be addressed and addressing the site of the storage unit to be addressed.

Abstract: A photodetector made in monolithic form in a lightly-doped substrate of a first conductivity type. This photodetector includes at least two photodiodes and includes a first region of the first conductivity type more heavily doped than the substrate extending at least between the two photodiodes; and a second region of the first conductivity type more heavily doped than the substrate and extending under the first region and under one of the two photodiodes, the first region or the second region, with the first region, delimiting a substrate portion at the level of said one of the two photodiodes, and the second region, with the first region, delimiting an additional substrate portion at the level of the other one of the two photodiodes.

Abstract: A process for producing a microelectronic device includes producing a first semiconductor substrate which includes a first layer and a second layer present between a first side and a second side of the substrate. First electronic components and an interconnecting part are produced on and above the second side. The substrate is then thinned by a first selective etch applied from the first side and stopping on the first layer followed by a second selective etch stopping on the second layer. A second substrate is attached over the interconnecting part. The electronic components may comprise optoelectronic devices which are illuminated through the second layer.

Abstract: The invention relates to a method for the COFDM demodulation of a signal received from a transmission channel. The inventive method includes performing the fast Fourier transform of the signal received in a window corresponding to a symbol, each symbol being associated with a guard time reproducing one part of the symbol; supplying a set of estimated values for the module impulse response; determining coefficients, each coefficient being obtained from the product of the aforementioned set and a filtering function (FE) for a determined relative position of the filtering function in relation to the set; determining the maximum coefficient and the corresponding relative position; and positioning the window as a function of the relative position, the filtering function including a central part (LMAX) which has a constant amplitude and a duration equal to the duration of the guard time and which is surrounded by non-zero decreasing edges.

Abstract: A display screen is controlled through successive scans of the display screen. Each scan of the display screen includes a successive selection of rows of the display screen. For each row selected, and in accordance with a normal selection, a first column selection mode is implemented wherein a first selection signal is generated for the column, that first selection signal going from a first state towards a second state with an intermediate plateau level therebetween. In an alternative operation, a second column selection mode is provided which replaces the first column selection mode, the second column selection mode including the generation of a second selection signal going from the first state to the second state without any intermediate plateau level. At least at the start of each scan, the first selection mode is replaced by the second selection mode and this second selection mode is maintained for a given column, at the latest, for as long as no deselection of the column has been effected.

Abstract: A dual-conversion tuner firstly upconverts so as to place itself outside the receive band and then downconverts with zero intermediate frequency. A filter of the surface acoustic wave type is disposed between the two frequency transposition stages of the tuner. After baseband filtering, the signals are digitized then processed in a digital block comprising a channel decoding module. With the exception of the surface acoustic wave filter, the components are entirely embodied in integrated fashion.

Abstract: A method and a system for transferring a digital signal through a transformer, including a circuit for coding the digital signal to be transferred, having two outputs connected to the respective ends of a primary winding of the transformer, and a circuit for decoding the current in a secondary winding of the transformer generating a rising, respectively falling edge, of an output signal according to the direction of detected current pulses.

Abstract: The invention relates to a device consisting of an electromechanical microswitch comprising mobile beam (2). According to the invention, at least part (14) of the beam forms the piezoelectric element of a piezoelectric actuator.

Abstract: A mode-switching transformer with a 1-to-4 impedance ratio having a first planar winding formed in a first conductive level from a first differential mode terminal outside of the winding; a second planar winding formed in a second conductive level from a second differential mode terminal outside of the winding; a via of interconnection of the central ends of the first and second windings intended to be connected to ground; and at least one third planar winding in one of the two conductive levels, interdigited with the first or the second winding from a first common-mode terminal outside of the winding, the internal end of the third winding being connected to the via for direct grounding.

Abstract: A resistive element having two vertical resistive portions placed in two holes formed in the upper portion of a substrate and a horizontal resistive portion placed in a buried cavity connecting the bottoms of the holes.

Abstract: A method for protecting at least one first datum to be stored in an integrated circuit, including, upon storage of the first datum, performing a combination with at least one second physical datum coming from at least one network of physical parameters, and only storing the result of this combination, and in read mode, extracting the stored result and using the second physical datum to restore the first datum.