Patents Assigned to STMicroelectronic S.r.l.
  • Publication number: 20240038604
    Abstract: A semiconductor chip has a top metal layer with a passivation over an outer surface and including a first region and a second region. The passivation is fully removed from the first region and a contact layer for electrical wafer sorting probes is formed over the first region having the passivation fully removed therefrom. The passivation is initially only partly removed from the second region to protect the top met layer. Later, a remaining portion of the passivation is fully removed at the second region. Then, top metal layer at the second region provides a growth region for growing electrically conductive material over the second region.
    Type: Application
    Filed: July 21, 2023
    Publication date: February 1, 2024
    Applicant: STMicroelectronics S.r.l.
    Inventors: Luca CECCHETTO, Alessandra Piera MERLINI, Gabriella ADDESA
  • Publication number: 20240038636
    Abstract: A semiconductor die mounting substrate, such as a pre-molded leadframe, is provided with die pads, wherein each die pad has opposed first and second surfaces as well as tie bars projecting therefrom. Semiconductor dice are mounted at the first surface of the die pads. A molding encapsulation material surrounds the semiconductor dice mounted at the first surface of the die pads to produce semiconductor devices, with the semiconductor devices being mutually coupled via the tie bars. The tie bars are then cut transverse to their longitudinal direction at an intermediate singulation location to singulate the semiconductor devices into individual semiconductor devices. The tie bars have a hollowed-out portion with a channel-shaped cross-sectional profile at the intermediate singulation location. Easier-to-cut tie bars can be provided without impairing their stiffness in comparison with tie bars having full rectangular/square cross-sectional shapes.
    Type: Application
    Filed: July 21, 2023
    Publication date: February 1, 2024
    Applicant: STMicroelectronics S.r.l.
    Inventor: Dario VITELLO
  • Patent number: 11885619
    Abstract: A microelectromechanical gyroscope includes a support structure, a driving mass movable according to a driving axis; and an oscillating microelectromechanical loop. The microelectromechanical loop has a resonance frequency and a loop gain and includes the driving mass, a sensing interface that senses a position of the driving mass, and a gain control stage that maintains a modulus of the loop gain at a unitary value at the resonance frequency. The gain control stage includes a sampler and an transconductance operational amplifier in an open-loop configuration. The sampler acquires samples of a loop signal from the sensing interface in a first operative condition and transfers them to the transconductance operational amplifier in a second operative condition. The sampler decouples the transconductance operational amplifier from the sensing interface in the first operative condition and in the second operative condition.
    Type: Grant
    Filed: June 22, 2022
    Date of Patent: January 30, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Andrea Donadel, Emanuele Lavelli, Stefano Polesel
  • Patent number: 11889594
    Abstract: A system includes lighting devices coupled to output supply pins, a microcontroller circuit, and a driver circuit, which receives data therefrom, and switches coupled in series to the lighting devices. The driver circuit includes output supply pins and selectively propagates a supply voltage to the output supply pins to provide respective pulse-width modulated supply signals at the output supply pins. The driver circuit computes duty-cycle values of the pulse-width modulated supply signals as a function of the data received from the microcontroller circuit. The lighting devices include at least one subset coupled to the same output supply pin. The microcontroller individually controls the switches via respective control signals to individually adjust a brightness of the lighting devices in the at least one subset of lighting devices.
    Type: Grant
    Filed: March 11, 2022
    Date of Patent: January 30, 2024
    Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics S.r.l., STMicroelectronics Application GMBH
    Inventors: Manuel Gaertner, Philippe Sirito-Olivier, Giovanni Luca Torrisi, Thomas Urbitsch, Christophe Roussel, Fritz Burkhardt
  • Patent number: 11888304
    Abstract: An integrated circuit with a hot-plug protection circuit includes input pins and an output pin. The input pins are electrically coupled to a common node in the hot-plug protection circuit via respective electrical connections. The integrated circuit includes clamping circuitry coupled between the common node and the output pin, the clamping circuitry activatable as a result of a voltage spike applied across the clamping circuitry. The plurality of electrical connections and the clamping circuitry provide respective current discharge paths between the input pins in the input pins and the output pin, the respective current discharge paths configured to become conductive as a result of a voltage spike applied to any of the input pins in the plurality of input pins being transferred to the common node via the respective electrical connection in the plurality of electrical connections electrically coupling said any of said input pins to the common node.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: January 30, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Vittorio D'Angelo, Salvatore Cannavacciuolo, Sergio Lecce, Valerio Bendotti, Orazio Pennisi
  • Patent number: 11887921
    Abstract: A warped semiconductor die is attached onto a substrate such as a leadframe by dispensing a first mass of die attach material onto an area of the substrate followed by dispensing a second mass of die attach material so that the second mass of die attach material provides a raised formation of die attach material. For instance, the second mass may be deposited centrally of the first mass. The semiconductor die is placed onto the first and second mass of die attach material with its concave/convex shape matching the distribution of the die attach material thus effectively countering undesired entrapment of air.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: January 30, 2024
    Assignees: STMicroelectronics S.r.l., STMicroelectronics SDN BHD
    Inventors: Andrea Albertinetti, Marifi Corregidor Cagud
  • Patent number: 11887948
    Abstract: A back end of line (BEOL) structure for an integrated circuit chip includes a last metal structure providing a bonding pad. A passivation structure over the bonding pad includes a first opening extending exposing an upper surface of the bonding pad. A conformal nitride layer extends over the passivation structure and is placed in contact with the upper surface of the bonding pad. An insulator material layer covers the conformal nitride layer and includes a second opening that extends through both the insulator material layer and the conformal nitride layer. A foot portion of the conformal nitride layer on the upper surface of the bonding pad is self-aligned with the second opening.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: January 30, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Simone Dario Mariani, Elisabetta Pizzi, Daria Doria
  • Patent number: 11888397
    Abstract: A DC-DC switching converter includes power switches selectively coupling an output terminal with a first voltage or with a second voltage. A driver stage is coupled with the power switches for driving the power switches. A driver control stage is coupled with the driver stage for controlling the operation of the driver stage. An output current sensing circuit is coupled with the output terminal and with the driver control stage, and is configured to sense a sign of an output current delivered by the DC-DC switching converter at the output terminal and to generate control signals for the driver control stage. The driver control stage controls the operation of the driver stage according to states of the control signals received from the output current sensing circuit, for selectively delaying the activation of the power switches depending on the sensed sign of the output current.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: January 30, 2024
    Assignee: STMicroelectron S.r.l.
    Inventors: Niccolo' Brambilla, Sandro Rossi, Valeria Bottarel
  • Patent number: 11887959
    Abstract: A semiconductor device includes a support substrate with leads arranged therearound, a semiconductor die on the support substrate, and a layer of laser-activatable material molded onto the die and the leads. The leads include proximal portions facing towards the support substrate and distal portions facing away from the support substrate. The semiconductor die includes bonding pads at a front surface thereof which is opposed to the support substrate, and is arranged onto the proximal portions of the leads. The semiconductor device has electrically-conductive formations laser-structured at selected locations of the laser-activatable material.
    Type: Grant
    Filed: December 13, 2021
    Date of Patent: January 30, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Michele Derai, Guendalina Catalano
  • Patent number: 11888431
    Abstract: A method includes driving a selected motor winding to be in a tri-state during a time interval having a finite time length value of a time window, sensing a zero-crossing (ZC) of an oscillating back electromotive force induced in the motor winding during the time window in which the motor winding is in the tri-state, and producing a ZC sensing signal, which has a first edge at a first time instant at the sensed ZC and a second edge at a second time instant separated from the first time instant by a half oscillation of the oscillating back electromotive force, detecting a phase of a current flowing in the motor winding at a time instant time-shifted with respect to the second time instant of the second edge of the ZC sensing signal, and adjusting the finite time length value based on the detected phase of the current.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: January 30, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventor: Ezio Galbiati
  • Patent number: 11887584
    Abstract: A method to detect a vocal command, the method including: analyzing audio data received from a transducer configured to convert audio into an electric signal and analyzing the data using a first neural network. The method also includes detecting a keyword from the audio data using the first neural network on the edge device, the first neural network being trained to recognize the keyword. The method further includes activating a second neural network after the keyword is identified by the first neural network and analyzing the audio data using the second neural network, the second neural network being trained to recognize a set of vocal commands. The method to detect a vocal command may also include detecting the vocal command word using the second neural network.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: January 30, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Nunziata Ivana Guarneri, Viviana D'Alto
  • Publication number: 20240030807
    Abstract: Uncompensated upper and lower reference-currents are generated for first and second branches of a high-frequency half-bridge within an interleaved-totem-pole PFC.
    Type: Application
    Filed: July 25, 2022
    Publication date: January 25, 2024
    Applicant: STMicroelectronics S.r.l.
    Inventors: Sebastiano MESSINA, Marco TORRISI
  • Patent number: 11879963
    Abstract: Disclosed herein is a tunable resonant circuit including an inductance directly electrically connected in series between first and second nodes, a variable capacitance directly electrically connected between the first and second nodes, and a set of switched capacitances coupled between the first and second nodes. The set of switched capacitances includes a plurality of capacitance units, each capacitance unit comprising a first capacitance for that capacitance unit directly electrically connected between the first node and a switch and a second capacitance for the capacitance unit directly electrically connected between the switch and the second node. Control circuitry is configured to receive an input control signal and connected to control the switches of the set of switched capacitances. A biasing circuit is directly electrically connected to the tunable resonance circuit at the first and second nodes.
    Type: Grant
    Filed: February 13, 2023
    Date of Patent: January 23, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alessandro Parisi, Andrea Cavarra, Alessandro Finocchiaro, Giuseppe Papotto, Giuseppe Palmisano
  • Patent number: 11881768
    Abstract: A direct current (DC) to DC (DC-DC) converter includes a comparator configured to set a pulse width of a signal pulse, the pulse width corresponding to a voltage level of an output voltage of the DC-DC converter; a digital delay line (DDL) operatively coupled to the comparator, the DDL configured increase the pulse width of the signal pulse by linearly introducing delays to the signal pulse; a multiplexer operatively coupled to the DDL, the multiplexer configured to selectively output a delayed version of the signal pulse; and a logic control circuit operatively coupled to the multiplexer and the DDL, the logic control circuit configured to adaptively adjust a precision of the DC-DC converter in accordance with a duty cycle of the DC-DC converter and a setpoint of the DC-DC converter.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: January 23, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Juri Giovannone, Valeria Bottarel, Stefano Corona
  • Patent number: 11880427
    Abstract: An embodiment method of processing at least one sensing signal comprising a time-series of signal samples comprises high-pass filtering the time series of signal samples to produce a filtered time series; applying delay embedding processing to the filtered time series; producing a first matrix by storing the set of time-shifted time series as an ordered list of entries in the first matrix; applying a first truncation to produce a second matrix by truncating the entries in the ordered list of entries at one end of the first matrix to remove a number of items equal to the product of the first delay embedding parameter decreased by one times the second delay embedding parameter; applying entry-wise processing to the second matrix, and forwarding a set of estimated kernel densities and/or a set of images generated as a function of the set of estimated kernel densities to a user circuit.
    Type: Grant
    Filed: August 20, 2020
    Date of Patent: January 23, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventor: Angelo Bosco
  • Patent number: 11881875
    Abstract: A memory includes a sequence of memory locations storing a corresponding sequence of state codes that specifying the shape of a waveform. The sequence of state codes is read from the memory and decoded by a long and toggle decoder circuit. The decoding operation generates a sequence of signal codes. When the state code is a long code, the sequence of signal codes includes same signal codes corresponding to a signal level of the waveform. When the state code is a toggle code, the sequence of signal codes includes a first signal code corresponding to one signal level of the waveform and a second signal code corresponding to another signal level of the waveform. A signal decode circuit then decodes the signal codes in the sequence of signal codes to generate the waveform for output which includes the signal levels corresponding to the decoded signal codes.
    Type: Grant
    Filed: August 25, 2022
    Date of Patent: January 23, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Stefano Passi, Roberto Giorgio Bardelli
  • Patent number: 11881779
    Abstract: In an embodiment a DC-DC switching power converter includes a switching circuitry including switches, the switching circuitry configured to receive a DC input voltage and generate a DC output voltage via switching the switches, a switching control circuitry configured to control switching of the switches with a switching signal having a corresponding switching frequency with a corresponding duty cycle, the DC output voltage generated by the switching circuitry depending on the duty cycle, wherein the switching control circuitry is configured to set the duty cycle based on a difference between the DC output voltage and a reference voltage in a closed loop configuration and a compensation network configured to provide stability to an operation of the DC-DC switching power converter, wherein the compensation network has a capacitance having a value depending on the switching frequency.
    Type: Grant
    Filed: November 22, 2021
    Date of Patent: January 23, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Alessandro Nicolosi, Valeria Bottarel
  • Publication number: 20240019688
    Abstract: Disclosed herein is a micro-electro-mechanical mirror device having a fixed structure defining an external frame delimiting a cavity, a tiltable structure extending into the cavity, a reflecting surface carried by the tiltable structure and having a main extension in a horizontal plane, and an actuation structure coupled between the tiltable structure and the fixed structure. The actuation structure is formed by a first pair of actuation arms causing rotation of the tiltable structure around a first axis parallel to the horizontal plane. The actuation arms are elastically coupled to the tiltable structure through elastic coupling elements and are each formed by a bearing structure and a piezoelectric structure. The bearing structure of each actuation arm is formed by a soft region of a first material and the elastic coupling elements are formed by a bearing layer of a second material, the second material having greater stiffness than the first material.
    Type: Application
    Filed: July 11, 2023
    Publication date: January 18, 2024
    Applicant: STMicroelectronics S.r.l.
    Inventors: Massimiliano MERLI, Roberto CARMINATI, Nicolo' BONI, Sonia COSTANTINI, Carlo Luigi PRELINI
  • Publication number: 20240019885
    Abstract: Disclosed herein is a system including a power transistor having a first conduction terminal coupled to a supply node, a second conduction terminal coupled to an output node, and a control terminal controlled by a drive signal. The system further includes a driver configured to receive an input voltage from an external component and generate the drive signal based thereupon, and a sense circuit. The sense circuit is configured to, when the power transistor is powering a load coupled to the output node: detect whether the power transistor has entered an overload condition, and if so, determine a duration of time that the power transistor is in the overload condition; and assert a diagnostic signal in response to the duration of time being outside of a time window.
    Type: Application
    Filed: July 18, 2022
    Publication date: January 18, 2024
    Applicant: STMicroelectronics S.r.l.
    Inventors: Domenico RAGONESE, Vincenzo MARANO, Giuseppe Antonio DI GENOVA, Marco MINIERI
  • Publication number: 20240012029
    Abstract: Cantilever probes are produced for use in a test apparatus of integrated electronic circuits. The probes are configured to contact corresponding terminals of the electronic circuits to be tested during a test operation. The probe bodies are formed of electrically conductive materials. On a lower portion of each probe body that, in use, is directed to the respective terminal to be contacted, an electrically conductive contact region is formed having a first hardness value equal to or greater than 300 HV; each contact region and the respective probe body form the corresponding probe.
    Type: Application
    Filed: September 22, 2023
    Publication date: January 11, 2024
    Applicant: STMicroelectronics S.r.l.
    Inventor: Alberto PAGANI