Patents Assigned to STMicroelectronic S.r.l.
  • Publication number: 20230353053
    Abstract: A multiphase DC-DC converter has two converter arrangements, each with a switching stage that has a switching node, an inductor, a converter output node, a high-side switch, and a low-side switch. Current sensing circuits detect the instantaneous current flowing through either the high-side or low-side switches, and signal time-averaging circuits produce time-averaged signals indicating the average current during a switch conduction interval. The time-averaged signals are added up and re-scaled based on the time period of the switching nodes' electrical coupling to the converter output nodes to generate an output signal for the average output current.
    Type: Application
    Filed: May 1, 2023
    Publication date: November 2, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Stefano RAMORINI, Giuseppe CALDERONI
  • Patent number: 11805223
    Abstract: Current signals indicative of sensed physical quantities are collected from sensing transistors in an array of sensing transistors. The sensing transistors have respective control nodes and current channel paths therethrough between respective first nodes and a second node common to the sensing transistors. A bias voltage level is applied to the respective first nodes of the sensing transistors in the array and one sensing transistor in the array of sensing transistors is selected. The selected sensing transistor is decoupled from the bias voltage level, while the remaining sensing transistors in the array of sensing transistors maintain coupling to the bias voltage level. The respective first node of the selected sensing transistor in the array of sensing transistors is coupled to an output node, and an output current signal is collected from the output node.
    Type: Grant
    Filed: May 16, 2022
    Date of Patent: October 31, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Pierpaolo Lombardo, Michele Vaiana
  • Patent number: 11804814
    Abstract: A digital audio playback circuit includes a noise shaping circuit configured to receive an input digital audio signal, and a digital to analog converter (DAC) configured to convert the input digital audio signal to a pre-amplified output analog audio signal according to a gain ramp defined by a gain control signal. A muting circuit is configured to compare input digital audio signal to a threshold and assert a mute control signal when the input digital audio signal is below the threshold. An analog gain control ramp circuit is configured to generate the gain control signal in response to the mute control signal to cause the gain ramp to ramp down. An amplifier is configured to amplify the pre-amplified output analog audio signal for playback by an audio playback device.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: October 31, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Francesco Stilgenbauer, Paolo Cacciagrano, Giovanni Gonano
  • Patent number: 11803226
    Abstract: A power-saving system includes a retention memory element for a retained peripheral that is set to a logic state during an operational-power mode and maintains the logic state during an enhanced power-saving mode. The power-saving system also includes a non-retention memory element for a non-retained peripheral that is set to a logic state during the operational-power mode of the power-saving system; and a controller that instructs the retention memory element to maintain its logic state while in an enhanced power-saving mode.
    Type: Grant
    Filed: May 14, 2020
    Date of Patent: October 31, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Daniele Mangano, Michele Alessandro Carrano, Pasquale Butta′, Sergio Abenda
  • Patent number: 11802042
    Abstract: A method of operating a MEMS device includes generating a MEMS drive signal, and generating and modifying the MEMS drive signal based upon a control signal to produce a modified drive signal. The method further includes generating the control signal by determining when a feedback signal from the MEMS device is at its peak value, comparing the peak value to a desired value when the feedback signal is as its peak, and generating the control signal depending upon whether the peak value is at least equal to a desired value. The modification of the MEMS drive signal based upon the control signal to produce the modified drive signal includes skipping generation of a next pulse of the modified drive signal when the control signal indicates the peak value is at least equal to the desired value.
    Type: Grant
    Filed: December 10, 2020
    Date of Patent: October 31, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventor: Davide Terzi
  • Patent number: 11796568
    Abstract: Cantilever probes are produced for use in a test apparatus of integrated electronic circuits. The probes are configured to contact corresponding terminals of the electronic circuits to be tested during a test operation. The probe bodies are formed of electrically conductive materials. On a lower portion of each probe body that, in use, is directed to the respective terminal to be contacted, an electrically conductive contact region is formed having a first hardness value equal to or greater than 300 HV; each contact region and the respective probe body form the corresponding probe.
    Type: Grant
    Filed: October 7, 2021
    Date of Patent: October 24, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventor: Alberto Pagani
  • Patent number: 11798630
    Abstract: A memory device includes programmable memory cells and a programming circuit for programming a selected memory cell to a target logic state by applying one or more programming current pulses. A temperature sensor operates to sense a temperature of the memory device. A reading circuit reads a current logic state of the selected memory cell after a predetermined programming current pulse of the programming current pulses. The reading circuit includes a sensing circuit that senses a current logic state of the selected memory cell according to a comparison between a reading electric current depending on the current logic state of the selected memory cell and a reference current. An adjusting circuit adjusts one or the other of the reading electric current and the reference electric current to be provided to the sensing circuit according to the temperature of the memory device.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: October 24, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marcella Carissimi, Fabio Enrico Carlo Disegni, Chantal Auricchio, Cesare Torti, Davide Manfre', Laura Capecchi, Emanuela Calvetti, Stefano Zanchi
  • Patent number: 11798981
    Abstract: An electronic device includes a semiconductor body of silicon carbide, and a body region at a first surface of the semiconductor body. A source region is disposed in the body region. A drain region is disposed at a second surface of the semiconductor body. A doped region extends seamlessly at the entire first surface of the semiconductor body and includes one or more first sub-regions having a first doping concentration and one or more second sub-regions having a second doping concentration lower than the first doping concentration. Thus, the device has zones alternated to each other having different conduction threshold voltage and different saturation current.
    Type: Grant
    Filed: June 14, 2021
    Date of Patent: October 24, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Mario Giuseppe Saggio, Angelo Magri', Edoardo Zanetti, Alfio Guarnera
  • Patent number: 11793406
    Abstract: A method includes receiving a video signal that comprises a time series of images of a face of a human, wherein the images in the time series of images comprise a set of landmark points in the face, applying tracking processing to the video signal to reveal variations over time of at least one image parameter at the set of landmark points in the human face, generating a set of variation signals indicative of variations revealed at respective landmark points in the set of landmark points, applying processing to the set of variation signals, the processing comprising artificial neural network processing to produce a reconstructed PhotoPletysmoGraphy (PPG) signal, and estimating a heart rate variability of a variable heart rate of the human as a function of the reconstructed PPG signal.
    Type: Grant
    Filed: September 20, 2022
    Date of Patent: October 24, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Francesco Rundo, Francesca Trenta, Sabrina Conoci, Sebastiano Battiato
  • Publication number: 20230336078
    Abstract: In a multi-level hybrid DC-DC converter with a flying capacitor, a feedback circuit includes a first oscillator and produces a first clock signal with a frequency dependent on an output voltage. A second oscillator produces a second clock signal having a frequency dependent on a reference voltage. A logic circuit switches, as a function of the first and second clock signals, connection of the flying capacitor between one state where the flying capacitor is connected between an input node and a switching node, and another state where the capacitor is connected between the switching node and a ground node. The duty cycle of the first/second clock signal varies so that when the flying capacitor voltage is lower than a target voltage a duration of the one state is increased, and when the flying capacitor voltage is higher than the target voltage a duration of the another state is increased.
    Type: Application
    Filed: April 10, 2023
    Publication date: October 19, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Alessandro BERTOLINI, Alessandro GASPARINI, Paolo MELILLO, Salvatore LEVANTINO, Massimo GHIONI
  • Publication number: 20230335524
    Abstract: An electronic device has a plurality of integrated circuits fixed to a support between transmitting and receiving antennas. An integrated circuit generates a synchronization signal supplied to the other integrated circuits. Each integrated circuit is formed in a die integrating electronic components and overlaid by a connection region according to the Flip-Chip Ball-Grid-array or embedded Wafer Level BGA. A plurality of solder balls for each integrated circuit is electrically coupled to the electronic components and bonded between the respective integrated circuit and the support. The solder balls are arranged in an array, aligned along a plurality of lines parallel to a direction, wherein the plurality of lines comprises an empty line along which no solder balls are present. A conductive synchronization path is formed on the support and extends along the empty line of at least one integrated circuit, between the solder balls of the latter.
    Type: Application
    Filed: June 13, 2023
    Publication date: October 19, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Angelo SCUDERI, Nicola MARINELLI
  • Publication number: 20230336136
    Abstract: A digital audio playback circuit includes a noise shaping circuit configured to receive an input digital audio signal, and a digital to analog converter (DAC) configured to convert the input digital audio signal to a pre-amplified output analog audio signal according to a gain ramp defined by a gain control signal. A muting circuit is configured to compare input digital audio signal to a threshold and assert a mute control signal when the input digital audio signal is below the threshold. An analog gain control ramp circuit is configured to generate the gain control signal in response to the mute control signal to cause the gain ramp to ramp down. An amplifier is configured to amplify the pre-amplified output analog audio signal for playback by an audio playback device.
    Type: Application
    Filed: April 13, 2022
    Publication date: October 19, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventors: Francesco STILGENBAUER, Paolo CACCIAGRANO, Giovanni GONANO
  • Patent number: 11788980
    Abstract: A sensor is driven at a first heating power value. The sensor generates a sensing signal that is indicative of a sensed entity. A possible onset of a sensor contamination condition is detected as a function of the sensing signal generated by the sensor. If such detecting fails to indicate onset of a sensor contamination condition, the sensor continues to be driven at the first heating power value. However, if such detecting indicates onset of a sensor contamination condition, a protection mode is activated. In the protection mode, the sensor is driven at a second heating power value for a protection interval, where the second heating power value is lower than the first heating power value. Furthermore, the operation may refrain from supplying power to the sensor for a further protection interval, wherein the further protection interval is longer than the protection interval.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: October 17, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Fabio Passaniti, Enrico Rosario Alessi
  • Patent number: 11789048
    Abstract: An embodiment circuit comprises high-side and low-side switches arranged between supply and reference nodes, and having an intermediate node. A switching control signal is applied with opposite polarities to the high-side and low-side switches. An inductive load is coupled between the intermediate node and one of the supply and reference nodes. Current sensing circuitry is configured to sample a first value of the load current flowing in one of the high-side and low-side switches before a commutation of the switching control signal, sample a second value of the load current flowing in the other of the high-side and low-side switches after the commutation of the switching control signal, sample a third value of the load current flowing in the other of the high-side and low-side switches after the second sampling, and generate a failure signal as a function of the first, second and third sampled values of the load current.
    Type: Grant
    Filed: June 7, 2021
    Date of Patent: October 17, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Vanni Poletto, Nicola Errico, Paolo Vilmercati, Marco Cignoli, Vincenzo Salvatore Genna, Diego Alagna
  • Patent number: 11792166
    Abstract: A method can be used for generating personalized profile package data for integrated circuit cards. The method includes encrypting data records corresponding to profile data with a respective data protection key thereby obtaining encrypted data records. Each record includes a number of personalization fields to store different types of personalization values. The method also includes encrypting a file for a profile package with a master encryption key thereby obtaining an encrypted file for the profile package. The file includes fields to be personalized corresponding to one or more of the personalization fields to store different types of personalization values. The encrypted file for the profile package and encrypted data records are transmitted to a data preparation entity where the encrypted data records and the encrypted file can be decrypted and combined to obtain personalized profile packages.
    Type: Grant
    Filed: October 18, 2019
    Date of Patent: October 17, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marco Alfarano, Sofia Massascusa
  • Patent number: 11791728
    Abstract: A circuit includes an electronic switch configured to be coupled intermediate a high-voltage node and low-voltage circuitry and configured to couple the low-voltage circuitry to the high-voltage node. A voltage-sensing node is configured to be coupled to the high-voltage node via a pull-up resistor. A further electronic switch can be switched to a conductive state to couple the voltage-sensing node and the control node of the electronic switch. A comparator compares a threshold with a voltage at the voltage-sensing node and causes the further electronic switch to switch on in response to the voltage at said voltage-sensing node reaching said threshold. A charge pump coupled to the current flow-path of the electronic switch is activated to the conductive state to pump electric charge from the current flow-path of the electronic switch to the control node of the electronic switch via the further electronic switch switched to the conductive state.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: October 17, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Salvatore Tumminaro, Alfio Pasqua, Marco Sammartano
  • Patent number: 11789078
    Abstract: An electronic device includes a processing unit with a memory, a JTAG interface with test-data-input and test-mode-select lines coupled to the processing unit, a bridge circuit, and a multiplexer circuit. The bridge circuit includes a serial communication interface receiving a serial data input signal which conveys an input serial data frame. The bridge circuit includes a serial-to-parallel converter circuit block receiving the input serial data frame, processing the input serial data frame to read first and second subsets of input binary values therefrom, and transmitting the first subset via a first output signal and the second subset via a second output signal. The multiplexer circuit selectively propagates a received test-data-input signal or the first output signal to the test data input line, and selectively propagates a test-mode-select signal or the second output signal to the test mode select line of the JTAG interface.
    Type: Grant
    Filed: April 6, 2022
    Date of Patent: October 17, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventor: Filippo Minnella
  • Patent number: 11791720
    Abstract: A direct current (DC) to DC (DC-DC) converter includes a comparator setting a pulse width of a signal pulse, the pulse width corresponding to a voltage level of an output voltage of the DC-DC converter; a digital delay line (DDL) operatively coupled to the comparator, the DDL adjusting the pulse width of the signal pulse by linearly introducing delays to the signal pulse; a multiplexer operatively coupled to the DDL, the multiplexer selectively outputting a delayed version of the signal pulse; a phase detector operatively coupled to a system clock and the multiplexer, the phase detector generating a phase error between an output of the multiplexer and the system clock; and a logic control circuit operatively coupled to the multiplexer and the DDL, the logic control circuit adjusting the delay introduced to the signal pulse in accordance with the phase error.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: October 17, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Juri Giovannone, Valeria Bottarel, Stefano Corona
  • Patent number: 11789046
    Abstract: A system and method is provided for measuring a voltage drop at a node. In embodiments, a circuit includes an analog-to-digital converter, a current sink, and a controller. The input of the analog-to-digital converter and the input of the current sink is coupled to the node to be measured. A set point for the current sink is determined. The output of the analog-to-digital converter during the voltage drop is sampled. And a relative voltage drop value is computed by subtracting the sampled output of the analog-to-digital converter during the voltage drop from a sampled output of the analog-to-digital converter during a steady-state condition. The current sink operating at the set point during the steady-state condition and during the voltage drop.
    Type: Grant
    Filed: August 20, 2021
    Date of Patent: October 17, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Davide Argento, Orazio Pennisi, Stefano Castorina, Vanni Poletto, Matteo Landini, Andrea Maino
  • Patent number: 11787685
    Abstract: For manufacturing an optical microelectromechanical device, a first wafer of semiconductor material having a first surface and a second surface is machined to form a suspended mirror structure, a fixed structure surrounding the suspended mirror structure, elastic supporting elements which extend between the fixed structure and the suspended mirror structure, and an actuation structure coupled to the suspended mirror structure. A second wafer is machined separately to form a chamber delimited by a bottom wall having a through opening. The second wafer is bonded to the first surface of the first wafer in such a way that the chamber overlies the actuation structure and the through opening is aligned to the suspended mirror structure. Furthermore, a third wafer is bonded to the second surface of the first wafer to form a composite wafer device. The composite wafer device is then diced to form an optical microelectromechanical device.
    Type: Grant
    Filed: December 18, 2020
    Date of Patent: October 17, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Luca Seghizzi, Nicolo′ Boni, Laura Oggioni, Roberto Carminati, Marta Carminati