Abstract: A semi-conductor device includes at least one deep buried layer with an electrical connection made thereto by an electrical contact. The electrical contact to the deep buried layer is made by formed an opening through the use of a first chemical attack and a second chemical attack after the first chemical attack. By making an opening, the electrical contact can be made with the deep buried layer without at the same time occupying excessively wide portions of the device. For example, it is possible to make electrical contacts having a width of less than 1.5 ?m with deep layers having a depth of more than 5 ?m.

Abstract: Described herein are techniques for forming, during wafer processing, a conductive shielding layer for a chip formed from a wafer. The conductive shielding layer can be formed on multiple sides of a chip prior to dicing the wafer to separate the chip from the wafer. A wafer may be processed to form trenches that extend substantially through the wafer. The trenches may be formed opposite scribe lines that identify boundaries between chips of the wafer and may extend through the wafer toward the scribe lines. A shielding layer may be formed along the trenches.

Abstract: An electronic device, includes sigma-delta modulation circuit to operate with a clock signal and having output circuitry to deliver a digital data signal. First circuitry delivers a radiofrequency transposition signal. A notch filter includes radiofrequency digital-to-analog conversion blocks, having first input circuitry coupled to the output circuitry. Second input circuitry receives the radiofrequency transposition signal. Second output circuitry delivers a radiofrequency analog signal. Digital delay circuitry is controlled by the clock signal and includes a delay block between the two first input circuits. The frequency of a notch of the notch filter is related to the value of the delay from the delay block. Summation circuitry sums the radiofrequency signals.

Abstract: A frequency shift of a carrier frequency of an input signal is estimated with a frequency estimator in order to obtain an estimate value. Then, the estimate of the frequency shift is refined, and the carrier frequency is corrected in consequence, with a phase-locked loop that is initialized with the estimate value. The phase-locked loop has a locking frequency range that is narrower than a locking frequency range of the frequency estimator.

Abstract: A pump having: a cavity formed inside an insulating substrate, the upper part of the substrate being situated near the cavity having an edge; a conductive layer covering the inside of the cavity up to the edge and optionally covering the edge itself; a flexible membrane made of a conductive material placed above the cavity and resting against the edge; a dielectric layer covering the conductive layer or the membrane whereby insulating the portions of the conductive layer and of the membrane that are near one another; at least one aeration line formed in the insulating substrate that opens into the cavity via an opening in the conductive layer, and; terminals for applying a voltage between the conductive layer and the membrane.

Abstract: A coprocessor executing one among a set of candidate kernel loops within an application operates at the minimal clock frequency satisfying schedule constraints imposed by the compiler and data bandwidth constraints. The optimal clock frequency is statically determined by the compiler and enforced at runtime by software-controlled clock circuitry. Power dissipation savings and optimal resource usage are therefore achieved by the adaptation at runtime of the coprocessor clock rate for each of the various kernel loop implementations.

Abstract: The present invention provides an audio streaming system and method for transmitting audio signals with high quality. The advantages of the present invention include easy implementation, computational efficiency, and provision of better audio quality. More particularly, the present invention provides a Multi-band Time Expansion algorithm for lost packet concealment. The Multi-band Time Expansion algorithm detects the number of continuously lost packets in an audio input signal and the correctly received packets on either side of the lost packets. Then the Multi-band Time Expansion algorithm time-expands the correctly received packets that may be from either one side or both sides of the lost packets, wherein the correctly received packets are stretched to cover the length of the lost packets. Finally the Multi-band Time Expansion algorithm overlap-adds the stretched packets so that the lost packets are concealed.

Abstract: A method of protection from noise of a digital signal generated by a comparator, including the steps of generating an output signal that switches from a first logic state to a second logic state at a first switching of logic state of the digital signal; detecting a change from the first logic state to the second logic state of the output signal; and inhibiting further switchings of the output signal for a first time interval after the change from the first logic state to the second logic state.

Abstract: This method for transferring data through a network on chip (NoC) between a first electronic device and a second electronic device, comprising: retrieving from the first device request packets comprising request control data for controlling data transfer and actual request data to be transferred; storing said request control and data to be transferred in memory means provided in an network interface (NI); and elaborating data packets to be transferred to the second device through said network, said data packets comprising a header and a payload elaborated from said control data and said actual data, respectively; The control data and the actual data to be transferred are stored in separate first and second memory means.

Abstract: The bottom mold portion for a transfer molding system is covered with a deformable material. During mold clamping, the deformable material contacts the bottom surface of the packaging substrate on which the integrated circuit die is mounted. Deformation of this relatively soft covering on the bottom mold portion accommodates thickness variations in the packaging substrate, as well as non-planarity of the adhesive layer between the integrated circuit die and packaging substrate in exposed active area integrated circuits.

Abstract: A chip scale package (CSP) device includes a CSP having a semiconductor die electrically coupled to a plurality of solder balls. A can having an inside top surface and one or more side walls defines a chamber. The CSP is housed in the chamber and is attached to the inside top surface of the can. A printed circuit board is attached to the solder balls and to the one or more side walls to provide support to the CSP and to the can. The CSP may be a Wafer-Level CSP. The can may be built from a metallic substance or from a non-metallic substance. The can provides stress relief to the CSP during a drop test and during a thermal cycle test.

Abstract: A system and method is disclosed for providing a redistribution metal layer in an integrated circuit. The redistribution metal layer is formed from the last metal layer in the integrated circuit during manufacture of the integrated circuit before final passivation is applied. The last metal layer provides sites for solder bump pads used in flip chip interconnection. The redistribution metal layer can be (1) a flat layer deposited over the next to last metal layer through an opening in a dielectric layer, or (2) deposited over an array of vias connected to the next to last metal layer. Space between the solder bump pads is deposited with narrower traces for connecting active circuit areas below. A final passivation layer is deposited to ensure product reliability.

Abstract: A generator of a signal including a memory in which instructions are stored, each instruction including a code portion and an argument portion; circuitry for successively reading instructions stored in the memory; decoding circuitry capable of receiving, for each read instruction, the code portion of the instruction and of providing an activation signal which depends on the code portion; and circuitry for providing the signal capable of receiving, for each read instruction, the argument portion of the instruction and capable, according to the activation signal, of storing the argument portion and of providing the signal equal to the argument portion or of providing the signal equal to the previously-stored argument portion.

Abstract: The integrated circuit may include at least one electronic protection circuit for protecting against at least one electrostatic discharge and being able to discharge the overvoltage current generated by the electrostatic discharge. The electronic protection circuit includes a controlled short-circuiting switch embodied in CMOS technology including a CMOS technology TRIAC or a CMOS technology thyristor arranged in anti-parallel with a CMOS technology diode, and a triggering circuit for controlling the short-circuiting switch.

Abstract: An integrated circuit includes active circuitry disposed at a surface of a semiconductor body and an interconnect region disposed above the semiconductor body. A thermoelectric material is disposed in an upper portion of the interconnect region away from the semiconductor body. The thermoelectric material is configured to deliver electrical energy when exposed to a temperature gradient. This material can be used, for example, in a method for detecting the repackaging of the integrated circuit after it has been originally packaged.

Abstract: A solar energy plant may include a DC bus, photovoltaic panels coupled in parallel to the DC bus, each photovoltaic panel having a DC/DC converter, and a first controller controlling the DC/DC converter depending on whether a voltage on the DC bus is equal to or greater than a first threshold and lower than or equal to a second threshold. The solar energy plant may include a DC/AC inverter coupled to the DC bus and outputting an output AC voltage, an auxiliary start-up power supply charging a parasitic capacitance on the DC bus up to the first threshold, and a second controller turning on the auxiliary start-up power supply based upon a start command, and turning off the auxiliary start-up power supply and simultaneously turning on the DC/AC inverter.

Abstract: A display system for a portable device is switchable by electrical addressing. The display system can absorb ambient light and reflect at least a portion of the absorbed light to render an image on a surface of the display. The display includes a plurality of pixel electrodes. Each of the plurality of pixel electrodes includes linkers with acceptor molecules and donor molecules that form groups having respective color properties. In an off-state, a respective pixel is configured to reflect white light. In an on-state, a respective pixel is configured to reflect light according to the molecular grouping of the acceptor-donor group.

Abstract: An output stage of a class-AB amplifier, including: a first transistor of a first channel type between a first terminal of application of a first voltage and an output terminal of the stage, having its gate connected to a first input terminal of the stage; a first transistor of a second channel type between this output terminal and a second terminal of application of the first voltage, having its gate connected to a second input terminal of the stage; and second and third transistors of the second channel type between the output terminal and the first transistor of the second channel type, the gate of the second transistor being connected to the midpoint of a resistive dividing bridge between said output terminal and the gate of the third transistor of the second channel type, and the gate of the third transistor being biased to a fixed voltage.

Abstract: A system for implementing a cyclic digital to analog converter (c-DAC) is capable of supporting a large size liquid crystal display. The system includes an upper DAC stage configured to output a first voltage between a lower voltage supply (HVDD) and an upper voltage supply (AVDD). The system also includes a lower DAC stage configured to output a second voltage between the lower voltage supply (HVDD) and a ground. The upper DAC stage includes a single PMOS switch and the lower DAC stage includes a single NMOS switch.

Abstract: A method for managing the power in an electromagnetic transponder in the field of a terminal, including the steps of: evaluating the power consumption of the transponder circuits; and if this power consumption is below a threshold, evaluating the current coupling factor between the transponder and the terminal and, according to the current coupling: causing an increase of the transponder power consumption or causing a detuning of an oscillating circuit of the transponder.