Abstract: An image sensor may have a power supply voltage regulator controlled by a feedback loop. The feedback signal may be derived by applying the supply voltage at a point distant from the voltage regulator to an analog-to-digital converter (ADC) which may be a spare channel of an ADC provided for the output of the pixel array. The digital feedback loop may be controlled via a chip I2C bus.
Abstract: Data is encoded on an image sensor that has a plurality of pixels including one or more bio-sensing pixels and one or more data encoding pixels. The method includes applying a covering material selectively to the data encoding pixels depending on the data to be encoded, the covering material having a detectable difference in opacity relative to having no covering material present. The method includes reading the data encoding pixels, in the presence of light, and decoding data according to a pre-determined scheme depending on the presence of the covering material on the data encoding pixel. As bio-reagents are typically applied after manufacture of the image sensor, the image sensor can have information encoded for electronic detection subsequent to manufacture.
Abstract: Fan-out wafer level packaging includes an integrated circuit having a top surface, a bottom surface and a bond pad defined on the top surface, and a substrate having a cavity. An adhesive layer is positioned between a top surface of the cavity and the bottom surface of the integrated circuit, and a bump is positioned proximate a top surface of the fan-out wafer level packaging, the bump spaced apart from the integrated circuit. A redistribution layer is configured to electrically couple the bond pad of the integrated circuit to the bump.
Type:
Grant
Filed:
December 8, 2008
Date of Patent:
February 21, 2012
Assignee:
STMicroelectronics Asia Pacific Pte Ltd.
Abstract: An embodiment of a circuit is described for the generation of a temperature-compensated voltage reference of the type comprising at least one generator circuit of a band-gap voltage, inserted between a first and a second voltage reference and including an operational amplifier, having in turn a first and a second input terminal connected to an input stage connected to these first and second input terminal and comprising at least one pair of a first and a second bipolar transistor for the generation of a first voltage component proportional to the temperature.
Type:
Grant
Filed:
May 12, 2009
Date of Patent:
February 21, 2012
Assignee:
STMicroelectronics S.r.l.
Inventors:
Antonino Conte, Mario Micciche′, Rosario Roberto Grasso
Abstract: A method for correcting mismatches between a digital signal in phase and a digital signal in quadrature originating from a signal broadcast by terrestrial channel, comprising a phase correction method. A set of first error values is measured during a first period. A current value of a second error is determined based on a sum of the first error values. The current value is compared with a previous second error value stored in memory. The value of a current phase shift correction is chosen from two phase shift correction values, based on the result of the comparison and the value of a previous phase shift correction. The value of the chosen current phase shift correction is added to the previous phase shift to obtain a current phase shift. This current phase shift is introduced between the digital signal in phase and the digital signal in quadrature.
Abstract: According to an embodiment of the present disclosure, a method of pre-migrating metal ions is disclosed. A metal in a semiconductor configuration is exposed to water and oxygen to yield metal ions. The metal couples a conductor to another material. The metal and the conductor are exposed to an electrical field in such a manner that one or both of the metal and the conductor becomes an anode to a corresponding cathode. The metal ions are then allowed to migrate from the anode to the cathode to form a migrated metal. Finally, a migration inhibitor is applied on top of the migrated metal to prevent further migration.
Abstract: A method for detecting the presence of liquids includes detecting an initial temperature in a channel accommodating a liquid; heating the channel for a pre-determined test time; detecting a test temperature; determining a temperature variation on the basis of the initial temperature, the test temperature, and the test time; and comparing the temperature variation with at least one threshold. Before detecting an initial temperature, an ambient temperature is read, the channel is heated to the initial temperature, and is kept at the initial temperature for a time period.
Type:
Application
Filed:
June 23, 2011
Publication date:
February 16, 2012
Applicant:
STMICROELECTRONICS S.R.L.
Inventors:
Enrico Alessi, Giovanni Di Trapani, Antonella Licciardello
Abstract: A method of synthesis of at least one logic device coupled between first and second supply voltages and having a plurality of inputs and an output, the logic device including a plurality of transistors having a standard gate length, the method including: identifying, in the at least one logic device, one or more transistors connected between the first or second supply voltage and the output node; and increasing the gate length of each of the identified one or more transistors.
Type:
Application
Filed:
August 10, 2010
Publication date:
February 16, 2012
Applicants:
STMicroelectronics S.A., Centre National de la Recherche Scientifique, STMicroelectronics (Crolles 2) SAS
Abstract: A method for forming interconnection levels of an integrated circuit, including the steps of: (a) forming an interconnection level including conductive tracks and vias separated by a porous dielectric material; (b) forming, on the interconnection level, a layer of a non-porous insulating material, said layer comprising openings above portions of porous dielectric material; (c) repeating steps (a) and (b) to obtain the adequate number of interconnection levels; and (d) annealing the structure.
Abstract: Fan-out wafer level packaging includes an integrated circuit having a top surface, a bottom surface and a bond pad defined on the top surface, and a substrate having a cavity. An adhesive layer is positioned between a top surface of the cavity and the bottom surface of the integrated circuit, and a bump is positioned proximate a top surface of the fan-out wafer level packaging, the bump spaced apart from the integrated circuit. A redistribution layer is configured to electrically couple the bond pad of the integrated circuit to the bump.
Abstract: A system and method for generating an image on a display. The display includes a plurality of pixels from a vector description of a scene. The data is sampled from the vector description to provide data samples at locations defined in relation to the pixels. For example, the locations may include a first and second locations at the edges of the pixels, a third location at the corner of the pixels and a fourth location at the center of the pixels. The data samples are stored in a buffer and processed for each of the pixels to give an averaged data value. The image is then generated the image on the display by applying the averaged data value to each of the pixels. The calculation of the weighted averaged color value is repeated for each of the fragments in the buffer until all of the samples have been averaged.
Abstract: A parallel deblocking filtering method, and deblocking filter processor performing such deblocking, for removing edge artifacts created during video compression. The method includes loading luma samples for a macroblock. Filtering is performed on a set of vertical edges of the macroblock using information in the luma samples, with vertical edge filtering occurring concurrently with the loading of the luma samples. The method also includes filtering a set of horizontal edges of the macroblock using information in the luma samples. The horizontal edge filtering occurs in parallel with vertical edge sampling and with loading operations. The use of parallel and concurrent operations significantly enhances the efficiency of the deblocking method. Storing of filtered samples is also performed in the method, and this storing is performed concurrently with some loading operations as well as filtering operations. Edge filtering includes performing filtering to the H.264 standard and its deblocking filtering algorithm.
Abstract: An embodiment of an integrated circuit includes first and second semiconductor layers and a contact region disposed in the second layer. The first semiconductor layer is of a first conductivity, and the second semiconductor layer is disposed over the first layer and has a surface. The contact region is contiguous with the surface, contacts the first layer, includes a first inner conductive portion, and includes an outer conductive portion of the first conductivity. The contact region may extend deeper than conventional contact regions, because where the inner conductive portion is formed from a trench, doping the outer conductive portion via the trench may allow one to implant the dopants more deeply than conventional techniques allow.
Type:
Grant
Filed:
December 15, 2008
Date of Patent:
February 14, 2012
Assignee:
STMicroelectronics S.r.l.
Inventors:
Pietro Montanini, Marta Mottura, Giuseppe Croce
Abstract: A power line communications PLC transmitter and receiver device includes a physical communications protocol layer that provides for dynamic selection of a communications signal transmission operating mode from a plurality of such modes, where each has a corresponding transmission data structure that is based on characteristics of the electric power distribution network to which the PLC device is to be coupled and also the communications protocol profile requirements for the network.
Type:
Grant
Filed:
December 22, 2004
Date of Patent:
February 14, 2012
Assignee:
STMicroelectronics, Inc.
Inventors:
Michael J. Macaluso, Bo Zhang, Oleg Logvinov
Abstract: A reconfigurable power amplifier includes at least one amplification circuit (E1, E2), and a circuit (6) for controlling the amplification circuit so as to adapt its operation according to an applied input signal (RFin). The circuit for controlling includes a circuit (4, 5) for modifying the compression point of the amplification circuit and for adapting the gain of the amplification circuit in such a manner as to increase the power added efficiency of the circuit for the modified compression point.
Type:
Grant
Filed:
January 14, 2008
Date of Patent:
February 14, 2012
Assignees:
STMicroelectronics S.A., Centre National de la Recherche Scientifique
Inventors:
Didier Belot, Yann Deval, Eric Kerherve, Nathalie Deltimple, Pierre Jarry
Abstract: A computing method and circuit for computing a modular operation with at least one operand having a binary representation. Iteratively for each bit of this operand, doubling the value of an intermediate result stored in a first memory element by shifting the bits of the intermediate result towards the most significant bit and, while the most significant bit of the intermediate result is one, updating this intermediate result by subtracting a modulus stored in a second memory element.
Type:
Grant
Filed:
April 11, 2007
Date of Patent:
February 14, 2012
Assignee:
STMicroelectronics S.r.l.
Inventors:
Guido Marco Bertoni, Pasqualina Fragneto, Andrew Richard Marsh, Gerardo Pelosi, Moris Ravasio
Abstract: A method for forming a nanotube/nanofiber growth catalyst on the sides of portions of a layer of a first material, comprising the steps of depositing a thin layer of a second material; opening this layer at given locations; depositing a very thin catalyst layer; depositing a layer of the first material over a thickness greater than that of the layer of the second material; eliminating by chem./mech. polishing the upper portion of the structure up to the high level of the layer of the second material; and eliminating the second material facing selected sides of the layer portions of the first material.
Type:
Grant
Filed:
December 19, 2008
Date of Patent:
February 14, 2012
Assignees:
STMicroelectronics, Commissariat a l'energie Atomique
Abstract: A stand-alone device comprising a silicon wafer having its front surface including a first layer of a first conductivity type and a second layer of a second conductivity type forming a photovoltaic cell; first vias crossing the wafer from the rear surface of the first layer and second vias crossing the wafer from the rear surface of the second layer; metallization levels on the rear surface of the wafer, the external level of these metallization levels defining contact pads; an antenna formed in one of the metallization levels; and one or several chips assembled on said pads; the metallization levels being shaped to provide selected interconnects between the different elements of the device.
Type:
Application
Filed:
August 4, 2011
Publication date:
February 9, 2012
Applicants:
STMicroelectronics SA, STMicroelectronics (Crolles 2) SAS
Inventors:
Christophe Regnier, Olivier Hinsinger, Daniel Gloria, Pascal Urard
Abstract: An embodiment of a data read path includes recovery and decoder circuits. The recovery circuit is operable to recover coded data from a storage medium, and the decoder circuit is operable to detect, in the recovered data, a write error that occurred during a writing of the coded data to the storage medium. For example, such an embodiment may allow detection of a write error that occurred while writing data to a bit-patterned storage medium.
Type:
Application
Filed:
August 6, 2010
Publication date:
February 9, 2012
Applicant:
STMICROELECTRONICS, INC
Inventors:
Mustafa N. KAYNAK, Alessandro RISSO, Patrick R. KHAYAT
Abstract: The disclosure relates to a method of detecting an object using a detection signal supplied by a proximity sensor. The method comprises the steps of generating a reference signal by filtering the value of the detection signal, defining a first detection threshold, and going from an object non-detecting state to an object detecting state when the value of the detection signal becomes greater than the first detection threshold. When the value of the detection signal becomes greater than the first detection threshold, the value of the reference signal is readjusted in a manner such that the value of the detection signal again becomes less than or respectively greater than, the first detection threshold.