Abstract: An embodiment of a data write path includes encoder and write circuits. The encoder circuit is operable to code data so as to render detectable a write error that occurs during a writing of the coded data to a storage medium, and the write circuit is operable to write the coded data to the storage medium. For example, such an embodiment may allow rendering detectable a write error that occurs while writing data to a bit-patterned storage medium.

Abstract: The disclosure relates to a method of encrypting or of decrypting a binary data stream by generating a binary encryption stream and combining by a reversible logic operation each bit of the binary data stream with a bit of the binary encryption stream, the generation of the binary encryption stream including generating an input block by applying a cryptographic function using a secret key to a data block, and generating the binary encryption stream from the input block by combining the bits of the input block with each other by logic operations in a manner so as to prevent the input block from being determined from the binary encryption stream.

Abstract: An electronic device includes a substrate provided with a passing opening and a MEMS device including an active surface wherein a portion of the MEMS device is integrated sensitive to chemical/physical variations of a fluid. The active surface of the MEMS device faces the substrate and is spaced therefrom, the sensitive portion being aligned to the opening. A protective package incorporates at least partially the MEMS device and the substrate, leaving at least the sensitive portion of the MEMS device, and the opening of the substrate exposed. A barrier element is positioned in an area which surrounds the sensitive portion to realize a protection structure for the MEMS device, so that the sensitive portion is free.

Abstract: A system and method of reusing information in low power scalable hybrid audio encoders. The system and method provides a transform coder and parameterization of high frequency spectrum (SBR).

Abstract: A driving circuit of an OLED diode is inserted between a first and a second voltage reference and having at least one input terminal receiving an input voltage signal and an output terminal for the generation of a driving current of the OLED diode, the driving circuit having at least one driver transistor having a first conduction terminal connected to the first voltage reference, a second conduction terminal connected to the output terminal and a control terminal connected to at least one first capacitor and one second capacitor.

Abstract: Properties of a hard mask liner are used against the diffusion of a removal agent to prevent air cavity formation in specific areas of an interconnect stack. According to one embodiment, there is provided a method in which there is defined a portion on a surface of an IC interconnect stack as being specific to air cavity introduction, with the defined portion being smaller than the surface of the substrate. At least one metal track is produced within the interconnect stack, and there is deposited at least one interconnect layer having a sacrificial material and a permeable material within the interconnect stack. There is defined at least one trench area surrounding the defined portion and forming at least one trench, and a hard mask layer is deposited to coat the trench. At least one air cavity is formed below the defined portion of the surface by using a removal agent for removing the sacrificial material to which the permanent material is resistant.

Abstract: A method includes forming a recess in a first surface of a substrate, the recess having a width, depth, and height selected to correspond to a width, depth, and height of a fluid chamber, forming a sacrificial material in the recess, forming a first heater element, forming a metal layer overlying the first heater element, and forming a nozzle opening in the metal layer to expose the sacrificial material. The method also includes forming a path from a second surface of the substrate to expose the sacrificial material and removing the sacrificial material from the recess to expose the chamber with the selected width, depth, and height, the chamber in fluid communication with the path, the nozzle opening, and a surrounding environment.

Abstract: An electromagnetic transponder and a method for controlling by pulse trains a switch for modulating the load of this transponder in an electromagnetic field from which it extracts its power supply, the duty ratio of the pulses being controlled according to the transponder supply voltage.

Abstract: Embodiments of the invention relate to methods and systems for simulating a multi-core hardware platform the devices of which are modeled by functional or cycle-based models. In order to improve the simulation speed, a computer implemented method utilizes functional models that include an execution time in the reply to a transaction while maintaining the simulation accuracy relative to a cycle-based simulation of the same hardware platform. The execution time indicates an estimated number of cycles of a main clock which the represented device would have required for executing the operation. The simulation system initiates a transaction by a master model to request the execution of an operation by a slave model. The slave model executes the requested operation, and replies to the transaction returning a result of the executed operation to the master model, and where the slave model is a functional model, the execution time.

Abstract: An SRAM memory device including a plurality of memory cells arranged in a plurality of rows and a plurality of columns; each row of memory cells is adapted to store a RAM word; the RAM word includes a corresponding data word, a corresponding ECC word to be used for error detection and correction purposes and a corresponding applicative word to be used during debugging operations. The SRAM memory device further includes a configurable port adapted to receive a RAM word and to program corresponding memory cells of a selected row based on the received RAM word during a writing access of the SRAM memory device. The SRAM memory device further includes a memory controller unit including circuitry for selectively configuring the configurable port in one among a plurality of modes.

Abstract: An integrated electromagnetic actuator comprising: a first structural layer; a flexible membrane, extending over the first structural layer and comprising regions of ferromagnetic material; a chamber, delimited between the first structural layer and the flexible membrane; a winding, comprising a plurality of turns of conductive material and extending within the first structural layer; and a core element made of ferromagnetic material, extending within the first structural layer, inside the winding.

Abstract: An embodiment of a method for producing traceable integrated circuits includes forming on a wafer of semiconductor material functional regions for implementing specific functionalities of corresponding integrated circuits, forming at least one seal ring around each functional region of the corresponding integrated circuit, and forming on each integrated circuit at least one marker indicative of information of the integrated circuit. Forming on each integrated circuit at least one marker may include forming the at least one marker on at least a portion of the respective seal ring that is visible.

Abstract: Fair usage of working channels in a wireless network is disclosed. A base station associated with a cell within a wireless community monitors the congestion of the working channel of neighboring communities. Upon determining that the congestion of the working channel of a neighboring community is less than that of its existing working channel, the base station initiates a switch to the neighboring community's working channel. Upon joining the new community, the frame structure and other networking parameters and attributes are adjusted.

Abstract: A control device controls a switching converter having an input alternating supply voltage and a regulated direct voltage at the output terminal. The converter comprises a switch and the control device is adapted to control the on time period and the off time period of said switch for each cycle. The control device has a first input signal representative of the current flowing through at least one element of the converter and comprises a zero crossing detector adapted to detect at least one pair of first and second zero crossings of said first signal for each switching cycle, said second zero crossing immediately following the first zero crossing and occurring in opposite direction with respect to the first zero crossing. The control device comprises a synchronizer adapted to synchronize the start of the on period with each second zero crossing of said first signal.

Abstract: A method of conversion by at least one interface circuit connected between a first bus including at least one data wire and one clock wire, and at least one second single-wire bus, of a transmission between a master circuit connected to the first bus and at least one slave circuit connected to the second bus, wherein a speculative read command is sent to the slave circuit before interpreting the state of a bit for controlling a reading or a writing, originating from the master circuit.

Abstract: A method for transmitting data over a single-wire bus wherein a first communication channel is defined by pulses of different durations according to the state of the transmitted bit and depending on a reference duration, and a second communication channel is defined by the reference duration.

Abstract: A rooftop tiling system may include multi-functional roof tiles integrating photovoltaic and thermal converters for solar energy. The tiles allow a heat transfer fluid to circulate through inner flow channels of the tiles, and light concentration photovoltaic modules may be present atop the tiles together with a transmission or light reflection focusing device.

Abstract: An ultra-thin Quad Flat No-Lead (QFN) semiconductor chip package having a leadframe with lead terminals formed by recesses from both the top and bottom surfaces and substantially aligned contact areas formed on either the top or bottom surfaces. A die is electrically connected to the plurality of lead terminals and a molding compound encapsulates the leadframe and die together so as to form the ultra-thin QFN package. Accordingly, the substantially aligned contact areas are exposed on both the top and bottom surfaces of the package. The present disclosure also provides an ultra-thin Optical Quad Flat No-Lead (OQFN) semiconductor chip package, a stacked semiconductor module comprising at least two QFN semiconductor chip packages, and a method for manufacturing an ultra-thin Quad Flat No-Lead (QFN) semiconductor packages.

Abstract: A control device controls a switching converter that converts an alternating supply voltage to a regulated voltage and comprises a switch connected to an inductor. The control device is adapted to control the on period and the off period of said switch for each cycle. The control device comprises a ramp generator adapted to generate a ramp voltage, a comparator adapted to determine the final instant of the on period of the switch by crossing the ramp voltage with a first voltage. The control device has a first signal representing a current through the inductor and a second signal representative of the current flowing through at least one element of the converter. The control device is adapted to control the closing of said switch according to said first signal and comprises a synchronizer adapted to synchronize the start of the ramp voltage with the zero crossing of said second signal.

Abstract: A semiconductor device includes a wafer having a frontside and a backside. The wafer is formed from at least one integrated circuit chip having an electrical connection frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. A passive component including at least one conductive plate and a dielectric plate is positioned adjacent the integrated circuit chip. An encapsulation block embeds the integrated circuit chip and the passive component, the block having a frontside co-planar with the wafer frontside and a backside co-planar with the wafer backside. An electrical connection is made between the electrical connection frontside and the passive component. That electrical connection includes connection lines placed on the wafer frontside and wafer backside. The electrical connection further includes at least one via passing through the encapsulation block.