Abstract: A method for protecting at least first data of a non-volatile memory from which the extraction of this first data is triggered by the reading or the writing, by a processor from or into the memory, of second data independent from the first data, said first data being provided to a circuit which the processor cannot access.
Abstract: A method for authenticating a transmission between a first and a second circuit transiting through at least one third circuit, wherein: data are transmitted from the first to the third circuit, and from the third to the second circuit; a first signature of the data is calculated by the first circuit; at least a second signature of the data is calculated by the third circuit; at least one first portion of the first signature is transmitted by the first circuit to the third one; and the second signature is transmitted by the third circuit to the second one, a portion of this signature being distorted in case of a failure of authentication of the first portion of the first signature by the third circuit.
Type:
Application
Filed:
July 25, 2011
Publication date:
February 2, 2012
Applicant:
STMicroelectronics (Rousset) SAS
Inventors:
Gilles Bas, Hervé Chalopin, François Tailliet
Abstract: A control circuit controls an electric motor and includes: a measuring device configured to measure a first phase current of the motor and provide a corresponding first analog signal; an analog-to-digital converter structured to convert the first analog signal into a first digital signal; a conversion module for generating a first converted digital signal representative of the first digital signal expressed in a rotating reference system; a node structured to compare the first converted digital signal into a first reference signal and generate a first error signal; and a measure control circuit structured to provide a timing signal of the analog-to-digital converter depending on the first error signal and a time delay introduced by the measuring device.
Type:
Application
Filed:
July 26, 2011
Publication date:
February 2, 2012
Applicant:
STMICROELECTRONICS S.R.L.
Inventors:
Giuseppe D'Angelo, Giovanni Moselli, Virginia Clemente, Vincenzo Buccino, Carolina Verde
Abstract: Nanosized filamentary carbon structures (CNTs) nucleating over a catalyzed surface may be grown in an up-right direction reaching a second surface, spaced from the first surface, without the need of applying any external voltage source bias. The growth process may be inherently self-stopping, upon reaching a significant population of grown CNTs on the second surface. A gap between the two surfaces may be defined for CNT devices being simultaneously fabricated by common integrated circuit integration techniques. The process includes finding that for separation gaps of up to a hundred or more nanometers, a difference between the respective work functions of the materials delimiting the gap space, for example, different metallic materials or a doped semiconductor of different dopant concentration or type, may produce an electric field intensity orienting the growth of nucleated CNTs from the surface of one of the materials toward the surface of the other material.
Type:
Application
Filed:
October 10, 2011
Publication date:
February 2, 2012
Applicant:
STMICROELECTRONICS S.R.L.
Inventors:
Danilo Mascolo, Maria Fortuna Bevilacqua
Abstract: A system includes a plurality of stations capable of communicating with each other. A station of the system may comprise multiple antenna subassemblies and a receiver coupled to the subassemblies. The station is operable to activate one or more of the subassemblies to determine a direction of a first incoming signal, and to then activate another one or more of the subassemblies to receive a second incoming signal from substantially the same direction. Alternatively, the station may comprise multiple antenna subassemblies and a receiver coupled to the subassemblies and operable to activate each of the subassemblies for a respective interval to service at least one respective transmitting station covered by the activated subassembly during the interval.
Abstract: An antenna for circularly polarized radiation having a lamina of electrically conductive material with a generally square shape and a first chamfer on a first vertex of the generally square shape. The chamfer determines an asymmetrical shape of the lamina.
Abstract: A system and method of sharing testing components for multiple embedded memories and the memory system incorporating the same. The memory system includes multiple test controllers, multiple interface devices, a main controller, and a serial interface. The main controller is used for initializing testing of each of the dissimilar memory groups using a serial interface and local test controllers. The memory system results in reduced routing congestion and faster testing of plurality of dissimilar memories. The present disclosure further provides a programmable shared built in self testing (BIST) architecture utilizing globally asynchronous and locally synchronous (GALS) methodology for testing multiple memories. The built in self test (BIST) architecture includes a programmable master controller, multiple memory wrappers, and an interface. The interface can be a globally asynchronous and locally synchronous (GALS) interface.
Abstract: A digital image processing system and method for removing motion effects from images of a video sequence, and generating corresponding motion compensated images.
Type:
Grant
Filed:
December 31, 2008
Date of Patent:
January 31, 2012
Assignee:
STMicroelectronics S.r.l.
Inventors:
Giuseppe Spampinato, Arcangelo Ranieri Bruna, Alfio Castorina, Alessandro Capra
Abstract: A method of rendering video frames starting from source frames of a scene acquired using a multi-viewpoint camera system including a Free Viewpoint Video (FVV) synthesizing process.
Type:
Grant
Filed:
July 31, 2008
Date of Patent:
January 31, 2012
Assignee:
STMicroelectronics S.r.l.
Inventors:
Davide Aliprandi, Emiliano Mario Piccinelli
Abstract: A module is configured to control an electronic device equipped with an optical receiver for wireless remote control. The module includes a face detection circuit that detects the presence of a face within an area proximate to the electronic device. An optical transmission circuit operates to transmit an optical control signal to the electronic device in response a detected change in face detection status made by the face detection circuit. To assist operation of the face detection circuit, the optical transmission circuit is further configured to illuminate an area proximate to the electronic device.
Abstract: A method for identifying a corrupted received signal at a receiver is described. A received signal may include symbols. Each symbol may have a value of a Galois field associated therewith. The receiver may be configured to store a logarithm of normalized probability mass functions and corresponding Galois field values for each of the plurality of symbols. The normalized probability mass functions may be normalized with respect to a greatest probability mass function of a given symbol of the plurality of symbols. The method may include comparing, for each of the plurality of symbols, a logarithm of normalized probability of an n-th best probability value with a respective threshold, counting a number of the logarithms that exceed the respective threshold and generating, for each of the plurality of symbols, a score corresponding to the number.
Abstract: A method for protecting a thin-layer battery connected to an intermittent load including the steps of periodically operating the battery at its maximum discharge current, and disconnecting the battery as soon as the voltage across it reaches a threshold value greater than its critical voltage for the maximum discharge current.
Abstract: Electrical energy is generated in a device that includes an integrated circuit which produces thermal flux when operated. A substrate supports the integrated circuit. A structure is formed in the substrate, that structure having a semiconductor p-n junction thermally coupled to the integrated circuit. Responsive to the thermal flux produced by the integrated circuit, the structure generates electrical energy. The generated electrical energy may be stored for use by the integrated circuit.
Abstract: A surface-mounted shielded multicomponent assembly, comprising a wafer on which several electronic components are assembled; an insulating layer conformally deposited on the structure with a thickness smaller than the height of the electronic components, comprising at least one opening emerging on a contact of said wafer; a conductive shielding layer covering the insulating layer and said at least one opening; and a resin layer covering the conductive layer.
Abstract: The method for detecting an attack by fault injection into memory positions includes a generation of an initial value of a reference indication including an application of a reversible mathematical operator to the values of the information stored in the memory positions. An updating of the value of this reference indication is performed on each write in at least one memory position by using the operator, the reverse operator and the values of the stored information before and after each write in the at least one memory position. And, in the presence of a request, a check is performed as to whether a criterion involving the values of the information stored in the memory positions at the time of the request and the operator or its reverse is or is not satisfied by the value of the reference indication at the time of the request.
Abstract: Imaging device comprising at least one photosite comprising a charge storage semiconductor zone, a charge collection semiconductor zone and transfer means designed to permit charge transfer between the charge storage zone and the charge collection zone, characterized in that the charge storage semiconductor zone comprises a lower semiconductor zone and a conduction channel buried beneath the upper surface of the photosite and connecting said lower semiconductor zone to the charge collection zone.
Abstract: A process for manufacturing a micromechanical structure envisages: forming a buried cavity within a body of semiconductor material, separated from a top surface of the body by a first surface layer; and forming an access duct for fluid communication between the buried cavity and an external environment. The method envisages: forming an etching mask on the top surface at a first access area; forming a second surface layer on the top surface and on the etching mask; carrying out an etch such as to remove, in a position corresponding to the first access area, a portion of the second surface layer, and an underlying portion of the first surface layer not covered by the etching mask until the buried cavity is reached, thus forming both the first access duct and a filter element, set between the first access duct and the same buried cavity.
Type:
Application
Filed:
July 25, 2011
Publication date:
January 26, 2012
Applicant:
STMICROELECTRONICS S.R.L.
Inventors:
Marco Ferrera, Matteo Perletti, Igor Varisco, Luca Zanotti
Abstract: In automatically focusing on a subject in the field of view of a camera device, the camera device sets a focal length successively at one or more focal positions with an angle of the focus plane tilted so as not to be orthogonal to a normal optical path through the camera device. An image is taken at each of the focal positions. A comparison of data from each image is made so as to determine best focus. This comparison includes comparing data from at least two different locations along the tilted focus plane of at least one of the images.
Abstract: A process for producing two interleaved patterns on a substrate uses photolithography and etching to produce, on the substrate, a first pattern of first material protruding regions separated by recessed regions. A non-conformal deposition of a second material on the first pattern forms cavities in the recessed regions of the first pattern. These cavities are opened and filled with a third material. The second material is then removed, and the remaining third material forms a second pattern of third material protruding regions, wherein the second pattern is interleaved with the first pattern.
Type:
Application
Filed:
July 21, 2011
Publication date:
January 26, 2012
Applicants:
Commissariat a L'Energie Atomique et aux Energies Alternatives, STMicroelectronics (Grenoble 2) SAS
Abstract: A process for producing an upper metallization level and a via level connecting this upper metallization level to a lower metallization level includes: producing an insulating region on the lower metallization level; producing a hard mask on the insulating region (4, 5) defining the position of the via and metallic line of the upper metallization level; etching the insulating region through the hard mask so as to form a cavity; cleaning the cavity (which forms an undercut at the interface between the hard mask and the insulating region); and completely filling the cavity. The step of completely filling includes at least partially filling the cavity with copper and plugging the undercut. The undercut is plugged by sputtering a plugging material and forming an overlying doped copper layer.