Patents Assigned to STMicroelectronics (Alps) SAS
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Publication number: 20230336176Abstract: A level-shifter circuit receives one or more input signals in an input level domain and includes provides at an output node an output signal in an output level domain shifted with respect to the input level domain. The circuit includes output circuitry including a first drive node and a second drive node that receive first and second logical signals so that the output signal has a first output level or a second output level in the output level domain as a function of at least one of the first and second logical signals. The circuit includes first and second shift capacitors coupled to the first and second drive nodes as well as capacitor refresh circuitry.Type: ApplicationFiled: April 5, 2023Publication date: October 19, 2023Applicants: STMICROELECTRONICS S.r.l., STMICROELECTRONICS (ALPS) SASInventors: Antonino CONTE, Marco RUTA, Michelangelo PISASALE, Thomas JOUANNEAU
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Publication number: 20230317748Abstract: An imaging device includes an array of photosensors. A film of semiconductor nanoparticles is common to the photosensors of the array. The nanoparticles are configured to be excited by light with wavelengths in a range from 280 to 1500 nanometers. Each photosensor includes a top electrode and a bottom electrode positioned on opposite sides of the film of semiconductor nanoparticles. At least some of the photosensors further include a filter configured to transmit light with wavelengths in a range from 280 to 400 nanometers, and to at least partially filter out light with wavelengths greater than 400 nanometers from reaching the photosensor. A transistor level is electrically coupled to the top and bottom electrodes of the photosensors.Type: ApplicationFiled: April 3, 2023Publication date: October 5, 2023Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Alps) SASInventors: Jonathan STECKEL, Emmanuel JOSSE, Eric MAZALEYRAT, Youness RADID
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Publication number: 20230297126Abstract: An electronic device includes a near-field communication module and a powering circuit for delivering a power supply voltage to the near-field communication module. When the near-field communication module is in a low power mode, the powering circuit is configured for an operational mode where it is periodically started to provide the power supply voltage.Type: ApplicationFiled: March 9, 2023Publication date: September 21, 2023Applicants: STMicroelectronics (Rousset) SAS, STMicroelectronics SA, STMicroelectronics (Alps) SASInventors: Alexandre TRAMONI, Florent SIBILLE, Patrick ARNOULD
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Patent number: 11764731Abstract: The present disclosure relates to an electronic device comprising a first capacitor and a quartz crystal coupled in series between a first node and a second node; an inverter coupled between the first and second nodes; a first variable capacitor coupled between the first node and a third node; and a second variable capacitor coupled between the second node and the third node.Type: GrantFiled: November 29, 2022Date of Patent: September 19, 2023Assignees: STMicroelectronics (Alps) SAS, STMicroelectronics (Rousset) SAS, STMicroelectronics S.r.l., STMicroelectronics (Grenoble 2) SASInventors: Benoit Marchand, Hamilton Emmanuel Querino De Carvalho, Achraf Dhayni, Daniele Mangano
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Publication number: 20230291216Abstract: A circuit monitors a first voltage delivered by a battery. The monitored first voltage is compared with a second voltage. When the comparator detects that the first voltage is smaller than the second voltage, a counter starts counting. If the value of the counter during said counting exceeds a limiting value, an interruption signal is generated to control an operating mode of an electronic device power by said battery.Type: ApplicationFiled: March 6, 2023Publication date: September 14, 2023Applicants: STMicroelectronics (Rousset) SAS, STMicroelectronics (Alps) SASInventors: Alexandre TRAMONI, Nicolas LAFARGUE
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Patent number: 11754684Abstract: The present disclosure relates to a driver circuit for an optical light emitter of a ranging device, the driver circuit comprising: an inductor having a first of its nodes coupled to a current driver; a first branch comprising a first switch coupled between the second node of the inductor and a first supply voltage rail; a second branch for conducting a current through the optical light emitter, the second branch being coupled between the second node of the inductor and the first supply voltage rail; and a current sensor configured to detect the current passing through the inductor and to provide a feedback signal to the current driver.Type: GrantFiled: May 29, 2020Date of Patent: September 12, 2023Assignee: STMICROELECTRONICS (ALPS) SASInventors: Romain David, Xavier Branca
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Patent number: 11757477Abstract: An embodiment integrated electronic device comprises a mixer module including a voltage/current transconductor stage including first transistors and connected to a mixing stage including second transistors, wherein the mixing stage includes a resistive degeneration circuit connected to the sources of the second transistors and a calibration input connected to the gates of the second transistors and intended to receive an adjustable calibration voltage, and the sources of the first transistors are directly connected to a cold power supply point.Type: GrantFiled: February 26, 2021Date of Patent: September 12, 2023Assignee: STMICROELECTRONICS (ALPS) SASInventors: Frederic Rivoirard, Felix Gauthier
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Patent number: 11756874Abstract: An electronic device includes a carrier substrate with an electronic IC chip mounted on top of the carrier substrate. An encapsulation block on top of the front face of the carrier substrate embeds the IC chip. The encapsulation block has a through-void for positioning and confinement that extends through the encapsulation block to the top of the carrier substrate. At least one electronic component is positioned within the through-void and mounted to the top of the carrier substrate. Solder bumps or pads are located within the through-void to electrically connect the at least one electronic component to the carrier substrate.Type: GrantFiled: September 15, 2022Date of Patent: September 12, 2023Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: David Auchere, Claire Laporte, Deborah Cogoni, Laurent Schwartz
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Publication number: 20230283252Abstract: An internal voltage offset between a positive input and a negative input of a first operational amplifier is compensated. The negative input and the positive input of the first operational amplifier are coupled at the same voltage level. A comparison current generated at an output of the first operational amplifier has a sign that is representative of a sign of the internal voltage offset. The output of the first operational amplifier is biased to a threshold voltage using a current-to-voltage converter. A control voltage is generated from a sum of the threshold voltage and a voltage conversion of the comparison current. Compensation for the internal voltage offset between the positive and negative inputs of the first operational amplifier is made dependent on the control voltage.Type: ApplicationFiled: March 1, 2023Publication date: September 7, 2023Applicant: STMicroelectronics (Alps) SASInventor: Kuno LENZ
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Patent number: 11742757Abstract: A power supply system includes a voltage application source, and a switched mode power supply having an output coupled to the voltage application source through a first path and through a second path different from the first path. A first node is coupled to the output of the switched mode power supply, the switched mode power supply being configured to couple the first node to the voltage application source through the first path in a first operating mode and through the second path in a different second operating mode. A digital regulator is coupled to the first node. A digital circuit is coupled to an output of the digital regulator. An analog regulator is coupled to the first node and an analog circuit coupled to an output of the analog regulator.Type: GrantFiled: February 9, 2022Date of Patent: August 29, 2023Assignees: STMicroelectronics (Alps) SAS, STMicroelectronics S.r.l.Inventors: Francois Druilhe, Patrik Arno, Alessandro Inglese, Michele Alessandro Carrano
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Publication number: 20230268928Abstract: An ambient light sensor includes pixels arranged in an array. Each pixel includes a doped insulated well of a first type, a pinned photodiode in the well, a doped region of a second type arranged in the well, a transfer gate coupling the photodiode to said region, and a first circuit applying a first or second potential to the well. A successive approximation analog-to-digital converter of the sensor has a node connected to the doped regions of the pixels, a switch applying a third potential to the node, a comparator coupled to the node, and a second circuit receiving an output of the comparator and controlling the first circuits to selectively apply the first and second potentials. A sensor control circuit controls the gates and the first switch.Type: ApplicationFiled: February 21, 2023Publication date: August 24, 2023Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: Nicolas MOENECLAEY, Laurent VACCARIELLO
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Publication number: 20230239057Abstract: The present disclosure is directed to a light-signal communication receiver device including a photo-receiving diode configured to generate a current signal on a first node from a received light signal, a preamplifier configured to convert the current signal on the first node into a voltage signal on a second node, and a differential amplifier including a first input connected to the first node and a second input connected to a third node coupled to the second node via an adjustment circuit. The adjustment circuit is configured to offset the level of the voltage signal of the second node, on the third node, in a controlled manner by a control signal.Type: ApplicationFiled: January 4, 2023Publication date: July 27, 2023Applicants: STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS (ALPS) SASInventors: Nicolas MOENECLAEY, Vratislav MICHAL, Jean-Luc PATRY
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Patent number: 11710976Abstract: An embodiment of the present disclosure relates to a power supply interface comprising: a converter delivering a first DC voltage; a resistor connected between the converter and an output terminal of the interface delivering a second DC voltage; a first circuit delivering a second signal representative of a difference between the second DC voltage and a voltage threshold when a first signal is in a first state, and at a default value otherwise; a second circuit delivering a third signal representative of a value of a current in first resistor multiplied by a gain of the third circuit, and modifying the gain based on the second signal; and a third circuit configured to deliver a signal for controlling the converter based at least on the third signal.Type: GrantFiled: February 26, 2021Date of Patent: July 25, 2023Assignees: STMICROELECTRONICS (ALPS) SAS, STMICROELECTRONICS (GRENOBLE 2) SASInventors: Alexandre Pons, Jean Camiolo, Meriem Mersel
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Patent number: 11703901Abstract: A first terminal receives a first DC voltage. A switch selectively couples the first terminal to a second terminal providing an output. A control circuit selectively actuates the switch in response to a comparison of the first DC voltage to a second DC voltage. A low-dropout (LDO) linear voltage regulator, connected between the first and third terminals, operates to provide the second DC voltage from the first DC voltage.Type: GrantFiled: May 5, 2022Date of Patent: July 18, 2023Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: Jean Camiolo, Alexandre Pons
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Publication number: 20230221420Abstract: A light sensor includes an integrated circuit chip and a boost DC/DC converter. The integrated circuit chip supports an array of pixels, each pixel including a SPAD. The boost DC/DC converter delivers to the SPADs a bias potential capable of placing the SPADs in Geiger mode. The boost DC/DC converter includes an inductive element, a first switch, a second switch, and a circuit for controlling on/off switching of the first switch. The inductive element and the first and second switches are arranged outside of the integrated circuit chip while the control circuit forms part of the integrated circuit chip.Type: ApplicationFiled: January 4, 2023Publication date: July 13, 2023Applicant: STMicroelectronics (Alps) SASInventor: Xavier BRANCA
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Patent number: 11698993Abstract: A unique hardware key is recorded a secure hardware environment. A first logic circuit of the secure hardware environment is configured to generate a unique derived key from said unique hardware key and at least one piece of information. The at least one piece of information relates to one or more of an execution context and a use of a secret key. The secure hardware environment further includes a first encryption device that performs a symmetric encryption of the secret key using the unique derived key. This symmetric encryption generates an encrypted secret key for use outside of the secure hardware environment.Type: GrantFiled: January 28, 2021Date of Patent: July 11, 2023Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: Gilles Pelissier, Nicolas Anquet, Delphine Le-Goascoz
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Patent number: 11700174Abstract: System on a chip, comprising several master pieces of equipment, several slave resources, an interconnection circuit capable of routing transactions between master pieces of equipment and slave resources, and a processing unit at least configured to allow a user of the system on a chip to implement within the system on a chip at least one configuration diagram of this system defined by a set of configuration pieces of information including at least one piece of identification information assigned to each master piece of equipment, The identification pieces of information are intended to be attached to all the transactions emitted by the corresponding master pieces of equipment, the set of configuration pieces of information not being used for addressing the slave resources receiving the transactions and being used to define an assignment of at least one piece of master equipment to at least some of the slave resources.Type: GrantFiled: November 18, 2020Date of Patent: July 11, 2023Assignees: STMICROELECTRONICS (GRAND OUEST) SAS, STMICROELECTRONICS (ALPS) SASInventors: Nicolas Anquet, Loic Pallardy
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Publication number: 20230184938Abstract: The present disclosure relates to an assembly for an electronic device, the assembly comprising: a display screen comprising a plurality of pixels arranged in a matrix scheme comprising rows orientated in a first direction and columns orientated in a second direction; and a proximity sensor comprising at least one optical light emitter, each adapted to emit a light beam through one or more first pixels of the display screen, and an optical detector adapted to receive through one or more second pixels of the display screen the light beam emitted by the at least one optical light emitter and reflected on an object; wherein none of the one or more second pixels is in the same row as any of the one or more first pixels, and none of the one or more second pixels is in the same column as any of the one or more first pixels.Type: ApplicationFiled: December 6, 2022Publication date: June 15, 2023Applicants: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED, STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS (ALPS) SASInventors: Joseph HANNAN, Adam CALEY, Megane Estelle GUILLON, Charlotte MILANETTO, Christophe PREMONT
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Patent number: 11676928Abstract: An integrated circuit chip includes a front face having an electrical connection pad. An overmolded encapsulation block encapsulates the integrated circuit chip and includes a front layer at least partially covering a front face of the integrated circuit chip. A through-hole the encapsulation block is located above the electrical connection pad of the integrated circuit chip. A wall of the through-hole is covered with an inner metal layer that is joined to the front pad of the integrated circuit chip. A front metal layer covers a local zone of the front face of the front layer, with the front metal layer being joined to the inner metal layer to form an electrical connection. The inner metal layer and the front metal layer are attached or anchored to activated additive particles that are included in the material of the encapsulation block.Type: GrantFiled: August 6, 2021Date of Patent: June 13, 2023Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SASInventors: Romain Coffy, Patrick Laurent, Laurent Schwartz
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Patent number: 11663365Abstract: Authenticating a device using processing circuitry that generates fingerprints based on states of a plurality of nodes that are coupled to a plurality of circuits. A first fingerprint is generated at a first time based on first states of the plurality of nodes. A second fingerprint is generated at a second time based on second states of the plurality of nodes, the first fingerprint influencing the second states. Electronic data is obtained from the device to be authenticated. The electronic data is compared with a fingerprint generated and a determination whether to authorize operation of the device is made based on a result of the comparison.Type: GrantFiled: July 14, 2020Date of Patent: May 30, 2023Assignees: STMICROELECTRONICS (ROUSSET) SAS, STMICROELECTRONICS (ALPS) SASInventors: Marc Benveniste, Fabien Journet, Fabrice Marinet