Patents Assigned to STMicroelectronics (Alps) SAS
  • Patent number: 10331530
    Abstract: Embodiments of the circuits described include a method wherein at least one command signal is activated. The activation of the at least one command signal causes a request to a testing circuit of a memory array to enter a memory test mode. The requested memory test mode permits at least part of the memory array to be read. In response to activation of the at least one command signal, a test control circuit initiates an overwrite sequence to overwrite the data stored in the memory array. The test control circuit enables the memory test mode once the overwrite sequence has been completed.
    Type: Grant
    Filed: August 31, 2016
    Date of Patent: June 25, 2019
    Assignee: STMICROELECTRONICS (ALPS) SAS
    Inventors: Mickael Broutin, Benoit Lelievre, Nicolas Anquet
  • Publication number: 20190191536
    Abstract: The power supply device comprises a supply transistor commanded by a command signal and providing electric power to a lighting module, and a driving means configured to selectively generate, depending on an instruction signal representative of the structure of said at least one lighting module, a first command signal able to command the supply transistor into an ohmic regime, a second command signal able to command the supply transistor into a pulse width modulation regime involving an alternation of ohmic regimes and blocked regimes, and a third command signal able to command the supply transistor into a saturated regime.
    Type: Application
    Filed: February 26, 2019
    Publication date: June 20, 2019
    Applicants: STMicroelectronics (Alps) SAS, STMicroelectronics Application GmbH, STMicroelectronics S.r.l.
    Inventors: Philippe SIRITO-OLIVIER, Giovanni Luca TORRISI, Manuel GAERTNER, Fritz BURKHARDT
  • Patent number: 10326482
    Abstract: A transmission chain receives an incident signal to be transmitted having a first power and a first bandwidth. A first modulator frequency shifts a first signal derived from the incident signal to generate a first shifted signal at a modulation output. A power amplifier coupled to the modulation output amplifies an intermediate signal to generate an amplified output signal. A predistortion-signal-generating circuit generates, from the incident signal and from the amplified output signal in a second bandwidth that is larger than the first bandwidth, a predistortion signal having a second power lower than the first power. A second modulator frequency shifts a second signal derived from the predistortion signal to generate a second shifted signal for combination with the first shifted signal at said modulation output to produce the intermediate signal.
    Type: Grant
    Filed: June 8, 2018
    Date of Patent: June 18, 2019
    Assignee: STMicroelectronics (Alps) SAS
    Inventor: Herve Jacob
  • Publication number: 20190173426
    Abstract: A quartz crystal resonator is connected to an array of switchable capacitors or resistors. The switched actuation of elements of the array is controlled by bits of a control word. At least one of the bits of the control word is controlled by pulse width modulation to effectuate a tuning of the oscillation frequency of the quartz crystal resonator.
    Type: Application
    Filed: December 3, 2018
    Publication date: June 6, 2019
    Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SAS
    Inventors: Benoit MARCHAND, Francois DRUILHE
  • Publication number: 20190173427
    Abstract: A quartz crystal resonator is coupled to an electronic circuit. A capacitive or resistive element is provided for adjusting a frequency of the quartz crystal resonator on activation or deactivation of a function of a circuit. Control is made according to a model of an expected variation of a temperature of the quartz crystal resonator.
    Type: Application
    Filed: December 3, 2018
    Publication date: June 6, 2019
    Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SAS
    Inventors: Benoit MARCHAND, Francois DRUILHE
  • Patent number: 10303192
    Abstract: A low dropout voltage regulator unit includes an error amplifier and a power stage having an output terminal that is looped back onto the error amplifier and is capable of delivering an output current to a load. The unit includes multiple main supply inputs that are intended to potentially receive, respectively, multiple different supply voltages. The power stage includes multiple power paths that are connected, respectively, between the main supply inputs and the output terminal, are individually selectable and each comprise an output transistor. The unit also includes a selector circuit connected to the main supply inputs and configured to select one of the power paths according to a selection criterion. The error amplifier includes an output stage configured to selectively control the output transistor of the selected power path.
    Type: Grant
    Filed: November 30, 2016
    Date of Patent: May 28, 2019
    Assignee: STMicroelectronics (Alps) SAS
    Inventor: Alexandre Pons
  • Patent number: 10264353
    Abstract: Several first digital streams of first digital samples at a first sampling frequency are processed to issue corresponding stream that are converted into second digital streams sampled at a second sampling frequency lower than said first sampling frequency. At least one delay to be applied to at least one first digital stream to satisfy a condition on the second digital streams is determined and applied to at least one first digital stream before converting. The converting operation performed is decimation filtering of the first digital streams. The application of the at least one delay to at least one first steam involves skipping a number of first digital samples in the at least one first digital stream. The number skipped depends on the value of the at least one delay. Samples that are skipped are not delivered for decimation filtering.
    Type: Grant
    Filed: March 30, 2017
    Date of Patent: April 16, 2019
    Assignees: STMicroelectronics (Rousset) SAS, STMicroelectronics Design and Application S.R.O., STMicroelectronics (Alps) SAS
    Inventors: Jean Claude Bini, Dragos Davidescu, Igor Cesko, Jonathan Cottinet
  • Patent number: 10254781
    Abstract: A voltage source wherein at least one first switch couples a first node of the voltage source to a node of application of at least one potential of a power supply voltage, and at least one first capacitive element couples the first node or a second node of the voltage source to a control node of the first switch.
    Type: Grant
    Filed: October 2, 2017
    Date of Patent: April 9, 2019
    Assignee: STMicroelectronics (Alps) SAS
    Inventor: Kuno Lenz
  • Patent number: 10257917
    Abstract: The power supply device comprises a supply transistor commanded by a command signal and providing electric power to a lighting module, and a driving means configured to selectively generate, depending on an instruction signal representative of the structure of said at least one lighting module, a first command signal able to command the supply transistor into an ohmic regime, a second command signal able to command the supply transistor into a pulse width modulation regime involving an alternation of ohmic regimes and blocked regimes, and a third command signal able to command the supply transistor into a saturated regime.
    Type: Grant
    Filed: April 19, 2018
    Date of Patent: April 9, 2019
    Assignees: STMicroelectronics (Alps) SAS, STMicroelectronics S.r.l., STMicroelectronics Application GmbH
    Inventors: Philippe Sirito-Olivier, Giovanni Luca Torrisi, Manuel Gaertner, Fritz Burkhardt
  • Patent number: 10236842
    Abstract: A circuit includes an amplifier having a first power terminal configured to be coupled to a supply voltage and a second power terminal configured to be coupled to a reference potential. The circuit further includes a first impedance element coupled between a first input terminal of the amplifier and a first output terminal of the amplifier. The circuit additionally includes a second impedance element coupled between the first input terminal and the reference potential. The amplifier is configured to output a first voltage at a second output terminal of the amplifier in response to the supply voltage being greater than an output voltage at the first output terminal of the amplifier. The amplifier is further configured to output a second voltage at the second output terminal of the amplifier in response to the supply voltage being less than the output voltage at the first output terminal of the amplifier.
    Type: Grant
    Filed: December 29, 2016
    Date of Patent: March 19, 2019
    Assignees: STMICROELECTRONICS (ALPS) SAS, STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Vratislav Michal, Michel Ayraud
  • Publication number: 20190067180
    Abstract: An electronic device includes a support wafer, an electronic chip and an encapsulating block for the electronic chip above the support wafer. The support wafer is provided with a first network of electrical connections and a second network of electrical connections formed solely by tracks. First electrical connection elements are interposed between first front electrical contacts of the electronic chip and rear electrical contacts of the first network. Second electrical connection elements are interposed between second front electrical contacts of the electronic chip and internal electrical contact zones of the tracks of the second network. The first network includes front external electrical contacts and the tracks exhibiting external electrical contact zones.
    Type: Application
    Filed: August 23, 2018
    Publication date: February 28, 2019
    Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SAS
    Inventors: David AUCHERE, Laurent SCHWARZ, Deborah COGONI, Eric SAUGIER
  • Patent number: 10205464
    Abstract: An analog video signal supply circuit includes a processing circuit that supplies first and second digital video signals. First and second digital-to-analog converters convert digital signals to analog signals. A control circuit controls operation in a first configuration where the first digital video signal is applied to an input of the first digital-to-analog converter and the second digital video signal to an input of the second digital-to-analog converter. The control circuit further controls operation in a second configuration where the first digital video signal is simultaneously applied to the inputs of the first and second digital-to-analog converters.
    Type: Grant
    Filed: August 12, 2016
    Date of Patent: February 12, 2019
    Assignee: STMicroelectronics (Alps) SAS
    Inventor: Serge Hembert
  • Publication number: 20180367171
    Abstract: A transmission chain receives an incident signal to be transmitted having a first power and a first bandwidth. A first modulator frequency shifts a first signal derived from the incident signal to generate a first shifted signal at a modulation output. A power amplifier coupled to the modulation output amplifies an intermediate signal to generate an amplified output signal. A predistortion-signal-generating circuit generates, from the incident signal and from the amplified output signal in a second bandwidth that is larger than the first bandwidth, a predistortion signal having a second power lower than the first power. A second modulator frequency shifts a second signal derived from the predistortion signal to generate a second shifted signal for combination with the first shifted signal at said modulation output to produce the intermediate signal.
    Type: Application
    Filed: June 8, 2018
    Publication date: December 20, 2018
    Applicant: STMicroelectronics (Alps) SAS
    Inventor: Herve JACOB
  • Publication number: 20180351353
    Abstract: Electrostatic discharge (ESD) protection is provided by a circuit including a resistor having a first terminal and a second terminal, a zener diode having a cathode terminal directly connected to said first terminal and an anode terminal directly connected to a third terminal, and a clamp diode having a cathode terminal directly connected to said second terminal and an anode terminal directly connected to said third terminal.
    Type: Application
    Filed: May 30, 2017
    Publication date: December 6, 2018
    Applicants: STMicroelectronics (Alps) SAS, STMicroelectronics SA
    Inventors: Yves Mazoyer, Philippe Galy, Philippe Sirito-Olivier
  • Patent number: 10116037
    Abstract: An electronic device includes a support plate having a mounting face and an electrical connection network. An integrated circuit chip is mounted on the mounting face and linked to the electrical connection network. An en encapsulation block embeds the integrated circuit chip. An additional element made of an electrically conductive material is at least partly embedded within the encapsulation block. The additional conductive element has a main portion extending parallel to the support plate and has a secondary portion that is linked electrically to the integrated circuit chip. An opening is formed in the encapsulation block, and the secondary portion extends into that opening to make the electrical link. The additional conductive element may be an antenna.
    Type: Grant
    Filed: August 4, 2017
    Date of Patent: October 30, 2018
    Assignees: STMicroelectronics (Alps) SAS, STMicroelectronics (Grenoble 2) SAS
    Inventors: David Auchere, Laurent Marechal, Yvon Imbs, Laurent Schwarz
  • Publication number: 20180310390
    Abstract: The power supply device comprises a supply transistor commanded by a command signal and providing electric power to a lighting module, and a driving means configured to selectively generate, depending on an instruction signal representative of the structure of said at least one lighting module, a first command signal able to command the supply transistor into an ohmic regime, a second command signal able to command the supply transistor into a pulse width modulation regime involving an alternation of ohmic regimes and blocked regimes, and a third command signal able to command the supply transistor into a saturated regime.
    Type: Application
    Filed: April 19, 2018
    Publication date: October 25, 2018
    Applicants: STMicroelectronics (Alps) SAS, STMicroelectronics S.r.l., STMicroelectronics Application GmbH
    Inventors: Philippe SIRITO-OLIVIER, Giovanni Luca TORRISI, Manuel GAERTNER, Fritz BURKHARDT
  • Publication number: 20180309187
    Abstract: An electronic device includes a support plate having a mounting face and an electrical connection network. An integrated circuit chip is mounted on the mounting face and linked to the electrical connection network. An encapsulation block embeds the integrated circuit chip. An additional element made of an electrically conductive material is at least partly embedded within the encapsulation block. The additional conductive element has a main portion extending parallel to the support plate and has a secondary portion that is linked electrically to the integrated circuit chip. An opening is formed in the encapsulation block, and the secondary portion extends into that opening to make the electrical link. The additional conductive element may be an antenna.
    Type: Application
    Filed: June 25, 2018
    Publication date: October 25, 2018
    Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SAS
    Inventors: David Auchere, Laurent Marechal, Yvon Imbs, Laurent Schwarz
  • Patent number: 10103079
    Abstract: An electronic device includes a supporting substrate having a front mounting face and an electrical connection network. An integrated circuit chip is mounted to the mounting face and is electrically connected to the electrical connection network. A primary encapsulation block embeds the integrated circuit chip and extends above and around the integrated circuit chip on the mounting face of the supporting substrate. An opening is provided in the primary encapsulation block to at least partially uncover an electrical contact. An additional wire made from an electrically conductive material has an end that is electrically connected to the electrical contact. An additional encapsulation block above the primary encapsulation block embeds the additional wire.
    Type: Grant
    Filed: July 25, 2017
    Date of Patent: October 16, 2018
    Assignees: STMicroelectronics (Alps) SAS, STMicroelectronics (Grenoble 2) SAS
    Inventors: Yvon Imbs, Laurent Schwarz, David Auchere, Laurent Marechal
  • Patent number: 10073474
    Abstract: A method of controlling a current flowing through a load including the steps of: applying a first transfer function representative of the load to a first voltage to obtain a second voltage; applying the second voltage to a first terminal of a circuit for generating the current; sampling a third voltage between first and second terminals of the load; comparing the third voltage with the second voltage; and determining the current to be supplied to the load according to the result of the comparison.
    Type: Grant
    Filed: August 30, 2016
    Date of Patent: September 11, 2018
    Assignee: STMicroelectronics (Alps) SAS
    Inventors: Patrik Arno, Alexandre Balmefrezol
  • Patent number: 10067200
    Abstract: A circuit includes, in series between a first terminal and a second terminal of application of a power supply voltage, and first and second branches. The first branch includes a first transistor and a first current source coupled to the first transistor. The second branch includes a resistive element, a second transistor coupled to the resistive element and forming a current mirror with the first transistor and a second current source coupled to the second transistor. The resistive element conditions a threshold of detection of a variation of the power supply voltage.
    Type: Grant
    Filed: March 22, 2016
    Date of Patent: September 4, 2018
    Assignee: STMICROELECTRONICS (ALPS) SAS
    Inventors: Bruno Leduc, Pascal Bernon, Stephane Clin