Abstract: A method for making a semiconductor device may include forming first and second spaced apart semiconductor active regions with an insulating region therebetween, forming at least one sacrificial gate line extending between the first and second spaced apart semiconductor active regions and over the insulating region, and forming sidewall spacers on opposing sides of the at least one sacrificial gate line. The method may further include removing portions of the at least one sacrificial gate line within the sidewall spacers and above the insulating region defining at least one gate line end recess, filling the at least one gate line end recess with a dielectric material, and forming respective replacement gates in place of portions of the at least one sacrificial gate line above the first and second spaced apart semiconductor active regions.

Abstract: A linear regulator includes a drive circuit having an input and an output, with the output configured to drive a control terminal of a power transistor for the delivery of a load current. An error amplifier functions to amplify a difference between a reference signal and a feedback signal to generate an error signal at the input of the drive circuit. A compensation circuit includes a series circuit formed by a compensation capacitor and a variable resistance circuit, where the series circuit is coupled to the input of the drive circuit. A current sensing circuit operates to sense the load current. The resistance of the variable resistance circuit is varied in response to the sensed load current.

Abstract: An embodiment of a consumer electronics product having a thumbnail display feature includes a system for generating and storing thumbnails having a given size from images, such as JPEG images, for which a spatial frequency domain representation is available. The system includes a zooming processor to reduce the size of the images by zooming. The zooming processor is configured to perform both spatial frequency domain zooming to approximate the desired thumbnail size and then image pixel domain zooming to fit the desired thumbnail size. The product includes cache storage configured to store a plurality of thumbnails in a file system as free blocks in the file system, so that file system data structures are left unchanged.

Abstract: A method is used to control an electronic device that includes a switching unit having a main MOS transistor having a substrate, a first conducting electrode and a second conducting electrode coupled to an output terminal. The method includes controlling the main transistor in such a way as to put it into an on state or an off state such that, when the main transistor is in the on state, the substrate and the first conducting electrode of the main transistor are connected to an input terminal and, when the main transistor is in the off state, the first conducting electrode of the main transistor is isolated from the input terminal and a first bias voltage is applied to the first conducting electrode and a second bias voltage is applied to the substrate of the main transistor.

Abstract: The present disclosure relates to a non-volatile memory on a semiconductor substrate, comprising: a first memory cell comprising a floating-gate transistor and a select transistor having an embedded vertical control gate, a second memory cell comprising a floating-gate transistor and a select transistor having the same control gate as the select transistor of the first memory cell, a first bit line coupled to the floating-gate transistor of the first memory cell, and a second bit line coupled to the floating-gate transistor of the second memory cell.

Abstract: A charge pump circuit is coupled between a positive supply node and a ground node. The charge pump circuit operates in response to clock signals output from a clock generator to produce a negative voltage at a negative voltage output node. A soft-start circuit for the charge pump circuit includes a comparison circuit configured to compare a varying intermediate voltage sensed between a rising supply voltage and the negative voltage to a ramp voltage during a start-up period of the charge pump circuit. The clock generator is selectively enabled to generate the clock signals in response to the comparison to provide for pulse-skipping.

Abstract: An electronic device includes a power supply, a ground, and an intermediate ground having a voltage less than a voltage of the power supply and greater than a voltage of the ground. The electronic device also includes an error amplifier having an input stage coupled between the power supply and the ground, and an output stage coupled between the power supply and the intermediate ground. A ballast transistor is coupled to receive an output from the error amplifier. A feedback circuit is coupled to an output of the ballast transistor to generate feedback signals, and the error amplifier operates in response to the feedback signals.

Abstract: A device is provided for monitoring the total current discharged from a battery. The device includes a bridge circuit of resistors in which one of the resistors has a resistance which varies according to the current which has passed through it. Whenever the battery passes a current to a load, a small portion of the current is passed through the bridge circuit.

Abstract: Described herein is a preamplifier circuit for a capacitive acoustic transducer provided with a MEMS detection structure that generates a capacitive variation as a function of an acoustic signal to be detected, starting from a capacitance at rest; the preamplifier circuit is provided with an amplification stage that generates a differential output signal correlated to the capacitive variation. In particular, the amplification stage is an input stage of the preamplifier circuit and has a fully differential amplifier having a first differential input (INP) directly connected to the MEMS detection structure and a second differential input (INN) connected to a reference capacitive element, which has a value of capacitance equal to the capacitance at rest of the MEMS detection structure and fixed with respect to the acoustic signal to be detected; the fully differential amplifier amplifies the capacitive variation and generates the differential output signal.

Abstract: A voltage regulator includes two input pairs of opposite type transistors, p-type and n-type, to provide a soft-start functionality for gradually increasing the voltage regulator's output voltage from zero, or a voltage below the thresholds of the n-type transistors, to an operational voltage. The voltage regulator operates in a soft-start mode during which a variable input voltage signal is ramped up to allow the output voltage to reach the operational voltage, and a normal-operation mode during which the operational voltage is maintained.

Abstract: A substrate of the silicon on insulator type includes a semi-conducting film disposed on a buried insulating layer which is disposed on an unstressed silicon support substrate. The semi-conducting film includes a first film zone of tensile-stressed silicon and a second film zone of tensile-relaxed silicon. Openings through the buried insulating layer permit access to the unstressed silicon support substrate under the first and second film zones. An N channel transistor is formed from the first film zone and a P channel transistor is formed from the second film zone. The second film zone may comprise germanium enriched silicon forming a compressive-stressed region.

Abstract: A vertical tunneling FET (TFET) provides low-power, high-speed switching performance for transistors having critical dimensions below 7 nm. The vertical TFET uses a gate-all-around (GAA) device architecture having a cylindrical structure that extends above the surface of a doped well formed in a silicon substrate. The cylindrical structure includes a lower drain region, a channel, and an upper source region, which are grown epitaxially from the doped well. The channel is made of intrinsic silicon, while the source and drain regions are doped in-situ. An annular gate surrounds the channel, capacitively controlling current flow through the channel from all sides. The source is electrically accessible via a front side contact, while the drain is accessed via a backside contact that provides low contact resistance and also serves as a heat sink. Reliability of vertical TFET integrated circuits is enhanced by coupling the vertical TFETs to electrostatic discharge (ESD) diodes.

Abstract: In order, for example, to improve the ohmic contact between two metal pieces located at a metallization level, these two metal pieces are equipped with two offset vias located at the metallization level and at least partially at the via level immediately above. Each offset via comprises, for example, a nonoxidizable or substantially nonoxidizable compound, such as a barrier layer of Ti/TiN.

Abstract: A receiver estimates a vector of emitted symbols over a MIMO transmission channel which is emitted by emitting antennas. The receiver receives a vector of received symbols on receiving antennas. Estimation of the vector of emitted symbols is made by calculating a metric associated with a criterion for each vector of a subset of all possible vectors of emitted symbols and selecting an estimation for said vector of emitted symbols as the vector of emitted symbols among said subset which minimizes said metric.

Abstract: An image includes at least first and second digital samples corresponding to first and second different color components. The image is compressed by detecting level changes of a first signal formed of the sequence of the first samples and by detecting level changes of a second signal formed of the sequence of the second samples. A determination is made as to whether the detected changes coincide with each other. The first signal is decimated. The compressed image that is output includes the decimated first signal, the second signal and a further signal indicative of coinciding detected changes.

Abstract: A linear regulator circuit includes a power transistor coupled between an input voltage node and an output voltage node. A control circuit of the linear regulator includes a feedback network having an input coupled to the output voltage node and an output configured to generate a feedback voltage. An error amplifier receives a reference voltage and the feedback voltage to generate an error signal. A driver circuit receives the error signal and has an output coupled to drive a control terminal of the power transistor. A first power supply terminal of the driver circuit is coupled to a first power supply node and a second power supply terminal of the driver circuit is coupled to the output voltage node. The bias current for operation of the driver circuit is accordingly directly sourced to the output voltage node to support low quiescent current operation of the regulator circuit.

Abstract: An integrated circuit includes a transistor, an UTBOX buried insulating layer disposed under it and a ground plane disposed under the layer. A well is disposed under the plane and a first trench is at the periphery of the transistor and extends through the layer into the well. There is a substrate under the well and a p-n diode on a side of the transistor. The diode comprises first and second zones of opposite doping and the first zone is configured for electrical connection to a first electrode of the transistor. The first and second zones are coplanar with the plane and a second trench for separating the first and second zones. The second trench extends through the layer into the plane to a depth less than an interface between the plane and the well. There is a third zone under the second trench forming a junction between the zones.

Abstract: A method for fabricating an electronic device includes fixing a rear face of an integrated-circuit chip to a front face of a support wafer. An infused adhesive is applied in the form of drops or segments that are separated from each other. A protective wafer is applied to the infused adhesive, and the infused adhesive is cured. The infused adhesive includes a curable adhesive and solid spacer elements infused in the curable adhesive. A closed intermediate peripheral ring is deposited on the integrated-circuit chip outside the cured infused adhesive, and an encapsulation block is formed such that it surrounds the chip, the protective wafer and the closed intermediate peripheral ring.

Abstract: A substrate for mounting a semiconductor device includes an insulating layer having first and second opposed surfaces defining a thickness. First and second electrically conductive lands are included in the insulating layer. The first electrically conductive lands extend through the whole thickness of the insulating layer and are exposed on both the first and second opposed surfaces. The second electrically conductive lands have a thickness less than the thickness of the insulating layer and are exposed only at the first surface. Electrically conductive lines at the first surface of the insulating layer couple certain ones of the first electrically conductive lands with certain ones of the second electrically conductive lands. The semiconductor device is mounted to the first surface of the insulating layer. Wire bonding may be used to electrically coupling the semiconductor device to certain ones of the first and second lands.

Abstract: An energy harvester circuit operates to harvest energy in battery-less electrical apparatus. The circuit includes a string of capacitors coupled to a circuit input to receive energy to be harvested. A string of transistors are coupled as pumping transistors to respective ones of the capacitors in the string of capacitors. A compensation coupling circuit is coupled between each transistor in the string of pumping transistors and one of a subsequent or a preceding transistor in the string of pumping transistors.