Patents Assigned to STMICROELECTRONICS (GRENOVLE 2) SAS
  • Patent number: 12155386
    Abstract: A multi-level pulser circuit comprises a set of first input pins for receiving respective positive voltage signals at different voltage levels, a set of second input pins for receiving respective negative voltage signals at different voltage levels, and a reference input pin configured to receive a reference voltage signal intermediate the positive voltage signals and the negative voltage signals. The circuit comprises an output pin configured to supply a pulsed output signal. The circuit further comprises control circuitry configured to selectively couple the output pin to one of the first input pins, the second input pins and the reference input pin to generate the pulsed output signal at the output pin.
    Type: Grant
    Filed: September 13, 2023
    Date of Patent: November 26, 2024
    Assignee: STMICROELECTRONICS S.R.L.
    Inventor: Marco Viti
  • Patent number: 12154967
    Abstract: A method for manufacturing an ohmic contact for a HEMT device, comprising the steps of: forming a photoresist layer, on a semiconductor body comprising a heterostructure; forming, in the photoresist layer, an opening, through which a surface region of the semiconductor body is exposed at said heterostructure; etching the surface region of the semiconductor body using the photoresist layer as etching mask to form a trench in the heterostructure; depositing one or more metal layers in said trench and on the photoresist layer; and carrying out a process of lift-off of the photoresist layer.
    Type: Grant
    Filed: November 26, 2019
    Date of Patent: November 26, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Ferdinando Iucolano, Cristina Tringali
  • Patent number: 12146894
    Abstract: The present disclosure is directed to a device and method for lid angle detection that is accurate even if the device is activated in an upright position. While the device is in a sleep state, first and second sensor units measure acceleration and angular velocity, and calculate orientations of respective lid components based on the acceleration and angular velocity measurements. Upon the device exiting the sleep state, a processor estimates the lid angle using the calculated orientations, sets the estimated lid angle as an initial lid angle, and updates the initial lid angle using, for example, two accelerometers; two accelerometers and two gyroscopes; two accelerometers and two magnetometers; or two accelerometers, two gyroscopes, and two magnetometers.
    Type: Grant
    Filed: May 27, 2022
    Date of Patent: November 19, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Federico Rizzardini, Lorenzo Bracco
  • Patent number: 12148503
    Abstract: In an embodiment an integrated circuit includes a non-volatile memory having a plurality of memory cells, wherein each memory cell is configured to store information, and wherein each memory cell is configured to provide a reading current having an intensity dependent on a value stored in the memory cell when the memory cell is selected for reading; and a sense amplifier including a first amplifier configured to amplify the reading current of each memory cell selected for reading, an oscillation generator configured to generate on basis of the amplified signal a signal having oscillations according to a frequency dependent on the intensity of the current of the amplified signal, a counter configured to count the oscillations of the signal generated by the oscillation generator over at least one given period of time and a digital processing circuit configured to determine a value represented by the amplified signal on basis of the value counted during the at least one given period of time using a lookup table
    Type: Grant
    Filed: September 16, 2022
    Date of Patent: November 19, 2024
    Assignee: STMICROELECTRONICS (GRAND OUEST) SAS
    Inventor: Xavier Lecoq
  • Patent number: 12148778
    Abstract: A method of forming a device, the method including: depositing a first photoresist layer over a substrate, forming an array of seed lenses by patterning and reflowing the first photoresist layer, a dimension of the array of seed lenses varying across the substrate, forming a second photoresist layer over the array of seed lenses, and forming a microlens array by patterning and reflowing the second photoresist layer.
    Type: Grant
    Filed: April 28, 2021
    Date of Patent: November 19, 2024
    Assignee: STMICROELECTRONICS LTD.
    Inventor: Yu-Tsung Lin
  • Patent number: 12148823
    Abstract: An HEMT device, comprising: a semiconductor body including a heterojunction structure; a dielectric layer on the semiconductor body; a gate electrode; a drain electrode, facing a first side of the gate electrode; and a source electrode, facing a second side opposite to the first side of the gate electrode; an auxiliary channel layer, which extends over the heterojunction structure between the gate electrode and the drain electrode, in electrical contact with the drain electrode and at a distance from the gate electrode, and forming an additional conductive path for charge carriers that flow between the source electrode and the drain electrode.
    Type: Grant
    Filed: October 31, 2022
    Date of Patent: November 19, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Ferdinando Iucolano, Alessandro Chini
  • Patent number: 12143764
    Abstract: The present disclosure is directed to input detection for electronic devices using electrostatic charge sensors. The devices and methods disclosed herein utilize electrostatic charge sensors to detect various touch gestures, such as long and short touches, single/double/triple taps, and swipes; and perform in-ear detection.
    Type: Grant
    Filed: March 3, 2022
    Date of Patent: November 12, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Federico Rizzardini, Lorenzo Bracco, Andrea Labombarda, Mauro Bardone, Stefano Paolo Rivolta, Federico Iaccarino
  • Patent number: 12143015
    Abstract: In an embodiment a switching power supply includes a voltage ramp generator comprising at least one output capacitor, wherein the generator is configured such that the output capacitor has a first value during a first operating cycle of a first operating mode and a second value during subsequent operating cycles of the first operating mode.
    Type: Grant
    Filed: April 27, 2022
    Date of Patent: November 12, 2024
    Assignee: STMICROELECTRONICS (ROUSSET) SAS
    Inventor: Sebastien Ortet
  • Patent number: 12139396
    Abstract: A microelectromechanical sensor device has a detection structure including: a substrate having a first surface; a mobile structure having an inertial mass suspended above the substrate at a first area of the first surface so as to perform at least one inertial movement with respect to the substrate; and a fixed structure having fixed electrodes suspended above the substrate at the first area and defining with the mobile structure a capacitive coupling to form at least one sensing capacitor. The device further includes a single monolithic mechanical-anchorage structure positioned at a second area of the first surface separate from the first area and coupled to the mobile structure, the fixed structure, and the substrate and connection elements that couple the mobile structure and the fixed structure mechanically to the single mechanical-anchorage structure.
    Type: Grant
    Filed: July 23, 2021
    Date of Patent: November 12, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Francesco Rizzini, Carlo Valzasina, Gabriele Gattere
  • Patent number: 12134556
    Abstract: A semiconductor device includes: a substrate; a transduction microstructure integrated in the substrate; a cap joined to the substrate and having a first face adjacent to the substrate and a second, outer, face; and a channel extending through the cap from the second face to the first face and communicating with the transduction microstructure. A protective membrane made of porous polycrystalline silicon permeable to aeriform substances is set across the channel.
    Type: Grant
    Filed: November 23, 2021
    Date of Patent: November 5, 2024
    Assignees: STMICROELECTRONICS S.R.L., STMicroelectronics International N.V.
    Inventors: Enri Duqi, Lorenzo Baldo, Paolo Ferrari, Benedetto Vigna, Flavio Francesco Villa, Laura Maria Castoldi, Ilaria Gelmi
  • Patent number: 12136883
    Abstract: An active flyback converter is transitioned between a plurality of operational states based on a comparison of a control voltage signal to voltage thresholds and a count of a number of consecutive switching cycles during which a clamp switch is kept off. The plurality of operational states includes a run state, an idle state, a first burst state, and a second burst state. Each set of consecutive switching cycles of the first burst state includes a determined number of switching cycles during which signals are generated to turn the power switch on and off and to maintain an off state of the clamp switch, and a switching cycle in a determined position in the set of switching cycles during which signals are sequentially generated to turn the power switch on, turn the power switch off, turn the clamp switch on and turn the clamp switch off.
    Type: Grant
    Filed: September 23, 2022
    Date of Patent: November 5, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Claudio Adragna, Massimiliano Gobbi, Giuseppe Bosisio
  • Patent number: 12136608
    Abstract: A multi-chip package including a first integrated circuit and a second integrated circuit. The first integrated circuit includes a first side having a first conductive layer, a second side having a second conductive layer, and an edge, the first conductive layer coupled to the second conductive layer at a location adjacent to the edge. The second integrated circuit is coupled to the second conductive layer of the first integrated circuit.
    Type: Grant
    Filed: February 9, 2023
    Date of Patent: November 5, 2024
    Assignee: STMICROELECTRONICS PTE LTD
    Inventors: Yong Chen, David Gani
  • Patent number: 12135374
    Abstract: A differential correlator filter includes: a pre-pulse region, where first filter coefficients in the pre-pulse region have negative values; and a pulse region including: a rising edge region adjacent to the pre-pulse region, where second filter coefficients in the rising edge region have positive values; an accumulation region adjacent to the rising edge region, where third filter coefficients of the accumulation region have positive values; and a falling edge region adjacent to the accumulation region, where fourth filter coefficients of the falling edge region have positive values, where the accumulation region is between the rising edge region and the falling edge region. The differential correlator filter further includes a post-pulse region adjacent to the pulse region, where the pulse region is between the pre-pulse region and the post-pulse region, where fifth filter coefficients of the post-pulse region have negative values.
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: November 5, 2024
    Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
    Inventor: Andreas Aßmann
  • Patent number: 12135572
    Abstract: In an embodiment, a method includes: providing a voltage setpoint to a voltage converter; generating an output voltage at a voltage rail with the voltage converter based on the voltage setpoint; when the voltage setpoint is transitioning from a first voltage setpoint to a second voltage setpoint that has a lower magnitude than the first voltage setpoint, providing a first constant current to a first node coupled to a control terminal of an output transistor to turn on the output transistor, where the output transistor includes a source terminal coupled to a first terminal of a first resistor, and where a current path of the output transistor is coupled to the voltage rail; and turning off the output transistor after the output voltage reaches the target output voltage corresponding to the second voltage setpoint.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: November 5, 2024
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Alberto Cattani, Alessandro Gasparini, Stefano Ramorini
  • Patent number: 12134361
    Abstract: The present disclosure is directed to a device and method for detection of motion events including towing of the vehicle, jacking of the vehicle, and the vehicle being hit by another object. Processing is split between an MCU and a sensor unit. After the vehicle is turned off and before the MCU enters a sleep mode, the MCU calculates a gravity vector of the vehicle using accelerometer data, calculates threshold values based on the gravity vector, and saves the threshold values. After the MCU enters the sleep mode, the sensor unit subsequently monitors and detects motion events with the saved threshold values.
    Type: Grant
    Filed: April 11, 2022
    Date of Patent: November 5, 2024
    Assignee: STMICROELECTRONICS, INC.
    Inventors: Mahaveer Jain, Mahesh Chowdhary
  • Patent number: 12130319
    Abstract: A device that provides high impedance contact pads for an electrostatic charge sensor. The contact pads are shared between the electrostatic charge sensor and drivers. The contact pads are set to a high impedance state by reducing current leakage through the drivers. Compared to electrostatic charge sensor with low impedance contact pads, the electrostatic charge sensor disclosed herein has high sensitivity, and is able to detect weak electrostatic fields.
    Type: Grant
    Filed: May 19, 2023
    Date of Patent: October 29, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventor: Massimo Orio
  • Patent number: 12123975
    Abstract: An apparatus comprises an array of vertical-cavity surface-emitting lasers. Each of the vertical-cavity surface-emitting lasers is configured to be a source of light. The apparatus also comprises an optical arrangement configured to receive light from a plurality of the vertical-cavity surface-emitting lasers and to output a plurality of light beams.
    Type: Grant
    Filed: October 26, 2023
    Date of Patent: October 22, 2024
    Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
    Inventors: Christopher Townsend, Thineshwaran Gopal Krishnan, James Peter Drummond Downing, Kevin Channon
  • Patent number: 12125899
    Abstract: A method of manufacturing a MOS transistor includes forming a conductive first gate and forming insulating spacers along opposite sides of the gate, wherein the spacers are formed before the gate.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: October 22, 2024
    Assignee: STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Arnaud Regnier, Dann Morillon, Franck Julien, Marjorie Hesse
  • Patent number: 12125933
    Abstract: A device for detecting UV radiation, comprising: a SiC substrate having an N doping; a SiC drift layer having an N doping, which extends over the substrate; a cathode terminal; and an anode terminal. The anode terminal comprises: a doped anode region having a P doping, which extends in the drift layer; and an ohmic-contact region including one or more carbon-rich layers, in particular graphene and/or graphite layers, which extends in the doped anode region. The ohmic-contact region is transparent to the UV radiation to be detected.
    Type: Grant
    Filed: March 9, 2023
    Date of Patent: October 22, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Simone Rascuná, Gabriele Bellocchi, Paolo Badalá, Isodiana Crupi
  • Patent number: 12124713
    Abstract: A system-on-chip includes a processor, a memory and a memory interface coupled to the processor and to the memory. The processor, in operation, generates memory access requests. The memory includes one or more physical banks divided into a succession of sectors, each sector having a size equal to a smallest erasable size of the memory. The memory interface, in operation, responds to receiving memory configuration information by storing logical memory bank configuration information in the one or more configuration registers, the logical memory bank configuration information assigning each sector of the one or more physical banks of the memory to a respective logical memory bank of one or more logical memory banks. The memory interface, in operation, controls access to the memory by the processor based on the logical memory bank configuration information stored in the one or more configuration registers.
    Type: Grant
    Filed: November 21, 2022
    Date of Patent: October 22, 2024
    Assignees: STMICROELECTRONICS S.r.l., STMICROELECTRONICS (ROUSSET) SAS
    Inventors: Francesco Bombaci, Andrea Tosoni