Patents Assigned to STMICROELECTRONICS (GRENOVLE 2) SAS
  • Patent number: 12057474
    Abstract: A semiconductor MOS device having an epitaxial layer with a first conductivity type formed by a drain region and by a drift region. The drift region accommodates a plurality of first columns with a second conductivity type and a plurality of second columns with the first conductivity type, the first and second columns alternating with each other and extending on the drain region. Insulated gate regions are each arranged on top of a respective second column; body regions having the second conductivity type extend above and at a distance from a respective first column, thus improving the output capacitance Cds of the device, for use in high efficiency RF applications.
    Type: Grant
    Filed: May 20, 2021
    Date of Patent: August 6, 2024
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Antonino Schillaci, Paola Maria Ponzio, Roberto Cammarata
  • Patent number: 12055441
    Abstract: A thermographic sensor is proposed. The thermographic sensor includes a plurality of sensing elements each comprising at least one thermo-couple. The thermographic sensor is integrated on a semiconductor on insulator body that is patterned to define a grid suspended from a substrate; for each sensing element, the grid has a frame with the cold joint of the thermo-couple, a plate with the hot joint of the thermo-couple and one or more arms sustaining the plate from the frame. The frames include one or more conductive layers of thermally conductive material for thermally equalizing the cold joints with the substrate. Moreover, each sensing element may also include a processing circuit for the thermo-couple that is integrated on the corresponding frame. A thermographic device including the thermographic sensor and a corresponding signal processing circuit, and a system including one or more thermographic devices are also proposed.
    Type: Grant
    Filed: June 14, 2023
    Date of Patent: August 6, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Maria Eloisa Castagna, Giuseppe Bruno
  • Patent number: 12056080
    Abstract: A battery management system includes: a controller; a master battery management integrated circuit (BMIC) device coupled to the controller and configured to communicate with the controller through a standard Serial Peripheral Interface (SPI) protocol; and a first slave BMIC device and a second slave BMIC device that are connected in a daisy chain configuration and communicating through Isolated SPI interfaces, where the first slave BMIC device is coupled to the master BMIC through an Isolated SPI interface, where the Isolated SPI interface uses a differential signal comprising a positive signal and a complementary negative signal, where a bit frame of the positive signal includes a bit period followed by an idle period having a same duration as the bit period, where the first slave BMIC device and the second slave BMIC device are configured to be coupled to a first battery pack and a second battery pack, respectively.
    Type: Grant
    Filed: April 28, 2022
    Date of Patent: August 6, 2024
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Daniele Oreggia, Alessandro Cannone, Diego Alagna, Marcello Raimondi
  • Patent number: 12057773
    Abstract: An embodiment voltage converter includes a first transistor connected between a first node of the converter and a second node configured to receive a power supply voltage, a second transistor connected between the first node and a third node configured to receive a reference potential, a first circuit configured to control the first and second transistors, and a comparator configured to compare a first voltage with a threshold, the first voltage being equal, during a first period, to a first increasing ramp and, during a second period, to a second decreasing ramp, the threshold having a first value during the first period and a second value during the second period, the first and second values being variable.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: August 6, 2024
    Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventor: David Chesneau
  • Publication number: 20240259734
    Abstract: Capacitive, MEMS-type acoustic transducer, having a sound collection part and a transduction part. A substrate region surrounds a first chamber arranged in the sound collection part and open towards the outside; a fixed structure is coupled to the substrate region; a cap region is coupled to the fixed structure. A sensitive membrane is arranged in the sound collection part, is coupled to the fixed structure and faces the first chamber. A transduction chamber is arranged in the transduction part, hermetically closed with respect to the outside and accommodates a detection membrane. An articulated structure extends between the sensitive membrane and the detection membrane, through the walls of the transduction chamber. A fixed electrode faces and is capacitively coupled to the detection membrane. Conducive electrical connection regions extend above the substrate region, into the transduction chamber.
    Type: Application
    Filed: January 18, 2024
    Publication date: August 1, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Federico VERCESI, Fabrizio CERINI, Silvia ADORNO
  • Patent number: 12051681
    Abstract: A device for regulating a voltage of an electric current supplying an integrated circuit resting on a substrate. The integrated circuit comprises a ground terminal and a power supply terminal able to receive the electric current. The regulation device comprises a first cover covering the integrated circuit, a second cover covering the integrated circuit. The first cover is electrically connected to the power supply terminal of the integrated circuit. The second cover is electrically connected to the ground terminal of the integrated circuit. The first cover and the second cover are connected together by a capacitive connection.
    Type: Grant
    Filed: July 13, 2021
    Date of Patent: July 30, 2024
    Assignees: STMICROELECTRONICS (GRENOBLE 2) SAS, STMICROELECTRONICS (ALPS) SAS
    Inventors: Deborah Cogoni, David Auchere, Laurent Schwartz, Claire Laporte
  • Patent number: 12051705
    Abstract: The present disclosure relates to a pixel comprising: a photodiode comprising a portion of a substrate of a semiconductor material, extending vertically from a first face of the substrate to a second face of the substrate configured to receive light; a layer of a first material covering each of the lateral surfaces of the portion; a layer of a second material covering the portion on the side of the first face, first and second material having refractive indexes lower than that of the semiconductor material; and a diffractive structure disposed on a face of the photodiode on the side of the second face.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: July 30, 2024
    Assignees: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED, STMicroelectronics (Crolles 2) SAS
    Inventors: Raul Andres Bianchi, Marios Barlas, Alexandre Lopez, Bastien Mamdy, Bruce Rae, Isobel Nicholson
  • Patent number: 12051731
    Abstract: An electronic device comprising: a semiconductor body of silicon carbide, SiC, having a first and a second face, opposite to one another along a first direction, which presents positive-charge carriers at said first face that form a positive interface charge; a first conduction terminal, which extends at the first face of the semiconductor body; a second conduction terminal, which extends on the second face of the semiconductor body; a channel region in the semiconductor body, configured to house, in use, a flow of electrons between the first conduction terminal and the second conduction terminal; and a trapping layer, of insulating material, which extends in electrical contact with the semiconductor body at said channel region and is designed so as to present electron-trapping states that generate a negative charge such as to balance, at least in part, said positive interface charge.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: July 30, 2024
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Patrick Fiorenza, Fabrizio Roccaforte, Mario Giuseppe Saggio
  • Patent number: 12052029
    Abstract: A method to drive a digital to analog converter (DAC), the method including setting a reference current for the DAC with a reference current source, a base voltage being responsive to changes in a reference voltage at a reference node coupled with the reference current source; sensing a change in the reference voltage; and adaptively steadying the base voltage based on the change in the reference voltage to maintain proportionality between an output current of the DAC and the reference current.
    Type: Grant
    Filed: March 9, 2022
    Date of Patent: July 30, 2024
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Nicola Lupo, Enrico Mammei, Michele Bartolini, Stefano Colli
  • Patent number: 12051725
    Abstract: A method for manufacturing a SiC-based electronic device, that includes implanting, at a front side of a solid body of SiC having a conductivity of N type, dopant species of P type, thus forming an implanted region that extends in depth in the solid body starting from the front side and has a top surface co-planar with said front side; and generating a laser beam directed towards the implanted region in order to generate heating of the implanted region at temperatures comprised between 1500° C. and 2600° C. so as to form an ohmic contact region including one or more carbon-rich layers, for example graphene and/or graphite layers, in the implanted region and, simultaneously, activation of the dopant species of P type.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: July 30, 2024
    Assignee: STMICROELECTRONICS S.r.L.
    Inventors: Simone Rascuna′, Paolo Badala′, Anna Bassi, Gabriele Bellocchi
  • Publication number: 20240250691
    Abstract: A circuit includes at least one coupling node configured to be coupled, via a cable, to a load to transmit a supply voltage thereto. The circuit includes test circuitry configured to sense at least one sensing signal indicative of a value of the cable impedance and/or of the cable voltage across the cable, to perform a comparison between the at least one sensing signal and at least one threshold indicative either of a threshold resistance value for the cable impedance or indicative of a threshold voltage value for the cable voltage, produce a comparison signal as a result of the comparison.
    Type: Application
    Filed: January 17, 2024
    Publication date: July 25, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Alberto BIANCO, Francesco CIAPPA, Donato BONDETTI
  • Publication number: 20240250407
    Abstract: A near field communication (NFC) reader includes an NFC antenna and a wireless charging antenna. The NFC antenna substantially surrounds the wireless charging antenna laterally, except at an inward bend of the NFC antenna. The NFC antenna overlaps the wireless charging antenna at the bend.
    Type: Application
    Filed: May 13, 2021
    Publication date: July 25, 2024
    Applicant: STMICROELECTRONICS (CHINA) INVESTMENT CO., LTD.
    Inventors: Tianhao XIONG, Chaolian LIANG
  • Patent number: 12044423
    Abstract: The present disclosure is directed to an air filter sensor system that can monitor a status of a filter and provide information to a remote system regarding the filter's status. The system can receive, by a computing server via one or more computer networks and from each of a plurality of sensor assemblies coupled to a corresponding plurality of air filters, information indicative of filter contamination levels respectively associated with each corresponding air filter of the plurality of air filters. Each of the respective filter contamination levels being provided by one sensor assembly of the plurality of sensor assemblies based at least in part on a difference in detected air pressure between first and second sides of the corresponding air filter.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: July 23, 2024
    Assignees: STMICROELECTRONICS S.r.l., STMICROELECTRONICS, INC.
    Inventors: Matteo Dameno, Mario Tesi, Marco Bianco, Mahesh Chowdhary, Michele Ferraina
  • Patent number: 12047198
    Abstract: A device has a plurality of CAN XL communication systems, a bus, and a switching circuit. The bus has a transmission node and reception node, and receives from each CAN XL communication system a respective second transmission signal and drives the logic level at the transmission node as a function of the logic levels of the second transmission signals, and provides to each CAN XL communication system a respective second reception signal having a logic level determined as a function of the logic level at the reception node. The switching circuit supports a plurality of modes. In a first mode, the switching circuit is configured to provide the NRZ encoded transmission signals of the CAN XL communication systems as the second transmission signals to the bus system, and provide the respective second reception signal received from the bus to the CAN XL protocol controllers of the CAN XL communication system.
    Type: Grant
    Filed: May 19, 2023
    Date of Patent: July 23, 2024
    Assignee: STMICROELECTRONICS APPLICATION GMBH
    Inventors: Fred Rennig, Rolf Nandlinger
  • Patent number: 12046655
    Abstract: A vertical conduction electronic power device includes a body delimited by a first and a second surface and having an epitaxial layer of semiconductor material, and a substrate. The epitaxial layer is delimited by the first surface of the body and the substrate is delimited by the second surface of the body. The epitaxial layer houses at least a first and a second conduction region having a first type of doping and a plurality of insulated-gate regions, which extend within the epitaxial layer. The substrate has at least one silicide region, which extends starting from the second surface of the body towards the epitaxial layer.
    Type: Grant
    Filed: January 28, 2021
    Date of Patent: July 23, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Davide Giuseppe Patti, Mario Giovanni Scurati, Marco Morelli
  • Patent number: 12045339
    Abstract: In an embodiment a system on chip includes a persistent power supply and anti-replay mechanism comprising a monotonic counter including a volatile counter register powered by the persistent power supply.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: July 23, 2024
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Antonino Mondello, Alessandro Inglese
  • Publication number: 20240243122
    Abstract: An integrated MOSFET device is formed in a body of silicon carbide and with a first type of conductivity. The body accommodates a first body region, with a second type of conductivity; a JFET region adjacent to the first body region; a first source region, with the first type of conductivity, extending into the interior of the first body region; an implanted structure, with the second type of conductivity, extending into the interior of the JFET region. An isolated gate structure lies partially over the first body region, the first source region and the JFET region. A first metallization layer extends over the first surface and forms, in direct contact with the implanted structure and with the JFET region, a JBS diode.
    Type: Application
    Filed: January 18, 2024
    Publication date: July 18, 2024
    Applicant: STMICROELECTRONICS S.R.L.
    Inventors: Mario Giuseppe SAGGIO, Simone RASCUNÁ
  • Publication number: 20240244406
    Abstract: In an embodiment, a device comprises a memory, which, in operation, stores data samples associated with a plurality of data sensors, and circuitry, coupled to the memory, wherein the circuitry, in operation, generates synchronized output data sets associated with the plurality of data sensors. Generating a synchronized output data set includes: determining a reference sample associated with a sensor of the plurality of sensors; verifying a timing validity of a data sample associated with another sensor of the plurality of sensors; identifying a closest-in-time data sample associated with the another sensor of the plurality of sensors with respect to the reference sample; and generating the synchronized output data set based on interpolation.
    Type: Application
    Filed: March 26, 2024
    Publication date: July 18, 2024
    Applicants: STMICROELECTRONICS S.r.l., STMICROELECTRONICS, INC.
    Inventors: Karimuddin SAYED, Chandandeep Singh PABLA, Lorenzo BRACCO, Federico RIZZARDINI
  • Publication number: 20240243739
    Abstract: A half-bridge driver circuit is provided. The circuit includes a detector circuit that generates a signal indicating whether a floating reference voltage is greater than a second supply voltage. The detector circuit includes a first circuit, a second circuit and combinational logic circuit. A first comparator circuit of the first circuit monitors a voltage drop at a resistance and sets a first control signal to a first logic level when the monitored voltage drop is smaller than a first threshold. A second comparator circuit of the second circuit monitors a current provided by an output transistor of a current mirror and sets a second control signal to a first logic level when the monitored current is greater than a second threshold. The combinational logic circuit asserts the signal when the first control signal has the respective first logic level or the second control signal has the respective first logic level.
    Type: Application
    Filed: January 9, 2024
    Publication date: July 18, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventor: Marco Giovanni FONTANA
  • Publication number: 20240240945
    Abstract: A driving circuit is implemented for a driving resonator stage of a MEMS gyroscope including at least a first and a second electrode and a movable mass The driving circuit includes a synchronization stage which receives an electrical position signal indicative of the position of the movable mass and generates a reference signal phase- and frequency-locked with the electrical position signal; a driving stage which generates, on the basis of the reference signal, a first and a second driving signal, which are applied to the first and, respectively, the second electrodes, so that the movable mass is subject to a first and a second electrostatic force which cause the movable mass to oscillate.
    Type: Application
    Filed: January 3, 2024
    Publication date: July 18, 2024
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Gabriele GATTERE, Marco GARBARINO