Abstract: A method for providing a priority-based, low-collision distributed coordination function (DCF) in a wireless network is provided. The network includes an access point and a plurality of stations. The method includes receiving at a first station a super-frame from the access point. The super-frame is operable to define a service period for each of the stations. A priority for the first station is determined based on the super-frame. A back-off time is selected for the first station based on the priority.

Abstract: A fuel cell device includes a housing containing a fuel processor that generates fuel gas and a fuel cell having electrodes forming an anode and cathode, and an ion exchange electrolyte positioned between the electrodes. The housing can be formed as first and second cylindrically configured outer shell sections that form a battery cell that is configured similar to a commercially available battery cell. A thermal-capillary pump can be operative with the electrodes and an ion exchange electrolyte, and operatively connected to the fuel processor. The electrodes are configured such that heat generated between the electrodes forces water to any cooler edges of the electrodes and is pumped by capillary action back to the fuel processor to supply water for producing hydrogen gas. The electrodes can be formed on a silicon substrate that includes a flow divider with at least one fuel gas input channel that can be controlled by a MEMS valve.

Abstract: The present disclosure provides a system and method for detecting motion vectors in an image frame using a recursive hierarchical process with a non-rasterized vector-scanning motion to reduce erroneous motion vectors in an image frame of a digital video sequence. In general, a resolution hierarchy is generated for an image frame, wherein the resolution hierarchy comprises the original image frame and one or more copy image frames each having a different, lower resolution than the original image frame. Each image frame in the hierarchy is partitioned into image patches disposed in columns and rows, and the image patches are scanned in a non-rasterized motion to detect motion vectors in each image patch. The disclosed system and method provides faster convergence and improved accuracy by converging motion vectors in multiple directions and minimizing erroneous motion vectors in the image sequence.

Abstract: The present disclosure provides a system and method for relieving stress and providing improved heat management in a 3D chip stack of a multichip package. A stress relief apparatus is provided to allow the chip stack to adjust in response to pressure, thereby relieving stress applied to the chip stack. Additionally, improved heat management is provided such that the chip stack adjusts in response to thermal energy generated within the chip stack to remove heat from between chips of the stack, thereby allowing the chips to operate as desired without compromising the performance of the chip stack. The chip stack also includes an array of flexible conductors disposed between two chips, thereby providing an electrical connection between the two chips.

Abstract: In an embodiment, a transmitter includes first and second transmission paths. The first transmission path is configurable to generate first pilot clusters each including a respective first pilot subsymbol in a first cluster position, and the second transmission path is configurable to generate second pilot clusters each including a respective second pilot subsymbol in a second cluster position such that a vector formed by the first pilot subsymbols is orthogonal to a vector formed by the second pilot subsymbols. For example, where such a transmitter transmits simultaneous orthogonal-frequency-division-multiplexed (OFDM) signals (e.g., MIMO-OFDM signals) over respective channels that may impart inter-carrier interference (ICI) to the signals due to Doppler spread, the pattern of the pilot symbols that compose the pilot clusters may allow a receiver of these signals to use a recursive algorithm, such as a Vector State Scalar Observation (VSSO) Kalman algorithm, to estimate the responses of these channels.

Abstract: A forward converter circuit includes a transformer having a primary winding and a secondary winding. A first transistor is coupled in series with the primary winding and a second transistor is coupled in series with the secondary winding. A control circuit generating control signals for controlling operation of the first and second transistors. The control signals are generated responsive to the values in certain triggered counting circuits satisfying programmable thresholds.

Abstract: The present disclosure provides a system and method for relieving stress and providing improved heat management in a 3D chip stack of a multichip package. A stress relief apparatus is provided to allow the chip stack to adjust in response to pressure, thereby relieving stress applied to the chip stack. Additionally, improved heat management is provided such that the chip stack adjusts in response to thermal energy generated within the chip stack to remove heat from between chips of the stack, thereby allowing the chips to operate as desired without compromising the performance of the chip stack.

Abstract: In an embodiment, a channel estimator includes first and second stages. The first stage is configurable to generate an observation scalar for a communication path of a communication channel, and the second stage is configurable to generate channel-estimation coefficients in response to the first observation scalar. For example, such a channel estimator may use a recursive algorithm, such as a VSSO Kalman algorithm, to estimate the response of a channel over which propagates an OFDM signal that suffers from ICI due to Doppler spread. Such a channel estimator may estimate the channel response more accurately, more efficiently, with a less-complex algorithm, and with less-complex software or circuitry, than conventional channel estimators. Furthermore, such a channel estimator may be able to dynamically account for changes in the number of communication paths that compose the channel, changes in the delays of these paths, and changes in the signal-energy levels of these paths.

Abstract: In an embodiment, a channel estimator includes first, second, and third stages. The first stage is configurable to generate a first observation scalar for a first communication path of a first communication channel, and the second stage is configurable to generate a second observation scalar for a first communication path of a second communication channel. And the third stage is configurable to generate channel-estimation coefficients in response to the first and second observation scalars. For example, such a channel estimator may use a recursive algorithm, such as a Vector State Scalar Observation (VSSO) Kalman algorithm, to estimate the responses of channels over which propagate simultaneous orthogonal-frequency-division-multiplexed (OFDM) signals (e.g., MIMO-OFDM signals) that suffer from inter-carrier interference (ICI) due to Doppler spread.

Abstract: A processing system includes a plurality of processing resources capable of executing a plurality of objects. The objects include a client object and one or more server objects. The client object is capable of requesting a service provided by at least one of the one or more server objects. The processing system also includes at least one hardware engine capable of receiving a request for the service from the processing resource executing the client object, formatting one or more messages associated with the requested service, and communicating the one or more messages to the processing resource executing at least one of the one or more server objects that provides the requested service.

Abstract: Systems and methods are disclosed that include reading passive engine status, detecting vibration, caused by the transfer of kinetic energy from at least one machine into the engine, and inhibiting active operation of the engine.

Abstract: The invention provides a method and apparatus for branch prediction in a processor. A fetch-block branch target buffer is used in an early stage of pipeline processing before the instruction is decoded, which stores information about a control transfer instruction for a “block” of instruction memory. The block of instruction memory is represented by a block entry in the fetch-block branch target buffer. The block entry represents one recorded control-transfer instruction (such as a branch instruction) and a set of sequentially preceding instructions, up to a fixed maximum length N. Indexing into the fetch-block branch target buffer yields an answer whether the block entry represents memory that contains a previously executed a control-transfer instruction, a length value representing the amount of memory that contains the instructions represented by the block, and an indicator for the type of control-transfer instruction that terminates the block, its target and outcome.

Abstract: A line-powered LED driver is operable to provide primary-side regulation of output current supplied to LED circuitry. The circuit includes a feedback loop coupled to a power converter, wherein the feedback loop adds scaled input current to scaled input voltage to produce a control signal. The power converter is responsive to the control signal to adjust input current drawn by the power converter in response to changes in line voltage to provide constant input power. The power converter produces output power for supplying constant output current at the LEDs. The feedback loop may use a reference voltage derived from the LED circuitry so that the output power may be regulated to provide constant LED current for varying LED voltages. When compared to secondary-side current feedback schemes, the LED driver provides increased efficiency and reliability at a reduced cost by implementing primary-side regulation of the output current.

Abstract: A coprocessor executing one among a set of candidate kernel loops within an application operates at the minimal clock frequency satisfying schedule constraints imposed by the compiler and data bandwidth constraints. The optimal clock frequency is statically determined by the compiler and enforced at runtime by software-controlled clock circuitry. Power dissipation savings and optimal resource usage are therefore achieved by the adaptation at runtime of the coprocessor clock rate for each of the various kernel loop implementations.

Abstract: The bottom mold portion for a transfer molding system is covered with a deformable material. During mold clamping, the deformable material contacts the bottom surface of the packaging substrate on which the integrated circuit die is mounted. Deformation of this relatively soft covering on the bottom mold portion accommodates thickness variations in the packaging substrate, as well as non-planarity of the adhesive layer between the integrated circuit die and packaging substrate in exposed active area integrated circuits.

Abstract: A system and method is disclosed for providing a redistribution metal layer in an integrated circuit. The redistribution metal layer is formed from the last metal layer in the integrated circuit during manufacture of the integrated circuit before final passivation is applied. The last metal layer provides sites for solder bump pads used in flip chip interconnection. The redistribution metal layer can be (1) a flat layer deposited over the next to last metal layer through an opening in a dielectric layer, or (2) deposited over an array of vias connected to the next to last metal layer. Space between the solder bump pads is deposited with narrower traces for connecting active circuit areas below. A final passivation layer is deposited to ensure product reliability.

Abstract: A display system for a portable device is switchable by electrical addressing. The display system can absorb ambient light and reflect at least a portion of the absorbed light to render an image on a surface of the display. The display includes a plurality of pixel electrodes. Each of the plurality of pixel electrodes includes linkers with acceptor molecules and donor molecules that form groups having respective color properties. In an off-state, a respective pixel is configured to reflect white light. In an on-state, a respective pixel is configured to reflect light according to the molecular grouping of the acceptor-donor group.

Abstract: A micro device includes a substrate and a structure configured to bind to an object or a material, or not to bind to an object or material. The structure has a roughness based on a roughness of the object or material. For example, a microarray includes a substrate and a well positioned in the substrate and configured to bind to a type of bead. The well has a roughness based on a roughness of the type of bead to which the well is configured to bind. The roughness of the well is controlled by controlling a position and number of striations in the side of the well. In another example, a moveable component of a micro device may have a roughness different from a roughness of an adjacent component, to reduce the likelihood of the moveable component sticking to the adjacent component.

Abstract: An improved superscalar processor. The processor includes multiple lanes, allowing multiple instructions in a bundle to be executed in parallel. In vector mode, the parallel lanes may be used to execute multiple instances of a bundle, representing multiple iterations of the bundle in a vector run. Scheduling logic determines whether, for each bundle, multiple instances can be executed in parallel. If multiple instances can be executed in parallel, coupling circuitry couples an instance of the bundle from one lane into one or more other lanes. In each lane, register addresses are renamed to ensure proper execution of the bundles in the vector run. Additionally, the processor may include a register bank separate from the architectural register file. Renaming logic can generate addresses to this separate register bank that are longer than used to address architectural registers, allowing longer vectors and more efficient processor operation.

Abstract: An integrated circuit is provided having an active circuit. A heating element is adjacent to the active circuit and configured to heat the active circuit. A temperature sensor is also adjacent to the active circuit and configured to measure a temperature of the active circuit. A temperature controller is coupled to the active circuit and configured to receive a temperature signal from the temperature sensor. The temperature controller operates the heating element to heat the active circuit to maintain the temperature of the active circuit in a selected temperature range.