Patents Assigned to STMicroelectronics Pte Ltd
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Publication number: 20140061447Abstract: A sensor package includes a radiation source and a radiation detector provided on a substrate. A cover member is mounted on or affixed to the substrate over the source and detector. The cover member includes an opaque housing, a first transparent portion provided over the source, a second transparent portion provided over the detector and a transparent insert within the housing and positioned at one of said transparent portions. An opaque protrusion is provided on the housing separating a region associate with the first transparent portion (and radiation source) from a region associated with the second transparent portion (and detector), the protrusion attached to a surface of the substrate.Type: ApplicationFiled: September 4, 2013Publication date: March 6, 2014Applicants: STMicroelectronics Pte Ltd, STMicroelectronics (Research & Development) LimitedInventors: Colin Campbell, Laurent Herard
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Publication number: 20140061823Abstract: A micro-electrochemical sensor contains magnetic compounds inserted within a substrate that exert a magnetic force of attraction on paramagnetic beads held in contact with an electrode. The magnetic compounds can be contained within a fluid that is introduced into a void in the substrate. The electrode can be spaced apart from the magnetic compounds by a dielectric multi-layer membrane. During the fabrication process, different layers within the membrane-electrode structure can be tuned to have compressive or tensile stress so as to maintain structural integrity of the membrane, which is thin compared with the size of the void beneath it. During a process of forming the structure of the sensor, the tensile stress in a TiW adhesion layer can be adjusted to offset a composite net compressive stress associated with the dielectric layers of the membrane. The membrane can also be used in forming both the electrode and the void.Type: ApplicationFiled: August 28, 2012Publication date: March 6, 2014Applicant: STMICROELECTRONICS PTE LTD.Inventors: Shian-Yeu Kam, Tien-Choy Loh, Ying Yu, Fery Riswan, Frederic Sala
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Patent number: 8664044Abstract: A fan-out wafer level package is provided with a semiconductor die embedded in a reconstituted wafer. A redistribution layer is positioned over the semiconductor die, and includes a land grid array on a face of the package. A copper heat spreader is formed in the redistribution layer over the die in a same layer as a plurality of electrical traces configured to couple circuit pads of the semiconductor die to respective contact lands of the land grid array. In operation, the heat spreader improves efficiency of heat transfer from the die to the circuit board.Type: GrantFiled: November 2, 2011Date of Patent: March 4, 2014Assignees: STMicroelectronics Pte Ltd., STMicroelectronics Grenoble 2 SASInventors: Yonggang Jin, Romain Coffy, Jerome Teysseyre
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Patent number: 8664746Abstract: A silicon on insulater (SOI) wafer is provided. A dielectric layer is formed on an active silicon substrate of the wafer. The dielectric layer is patterned and etched to expose selected portions of the silicon substrate. Impurities are then introduced into the exposed portions of the silicon substrate to act as gettering regions. The dielectric layer is then removed and an epitaxial layer of silicon is grown on the silicon substrate. Trenches are etched in the epitaxial layer of silicon through the gettering regions, partially removing the gettering regions and any contaminants contained therein. Remaining portions of the gettering regions still act as gettering regions during subsequent process steps.Type: GrantFiled: September 20, 2011Date of Patent: March 4, 2014Assignee: STMicroelectronics Pte. Ltd.Inventors: Janusz Karol Korycinski, Wanliang Wen
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Publication number: 20140057394Abstract: A manufacturing process includes forming a reconstituted wafer, including embedding semiconductor dice in a molding compound layer and forming through-wafer vias in the layer. A fan-out redistribution layer is formed on a front side of the wafer, with electrical traces interconnecting the dice, through-wafer vias, and contact pads positioned on the redistribution layer. Solder balls are positioned on the contact pads and a molding compound layer is formed on the redistribution layer, reinforcing the solder balls. A second fan-out redistribution layer is formed on a back side of the wafer, with electrical traces interconnecting back ends of the through-wafer vias and contact pads positioned on a back face of the second redistribution layer. Flip-chips and/or surface-mounted devices are coupled to the contact pads of the second redistribution layer and encapsulated in an underfill layer formed on the back face of the second redistribution layer.Type: ApplicationFiled: August 24, 2012Publication date: February 27, 2014Applicants: STMicroelectronics Pte Ltd., STMicroelectronics (Grenoble 2) SASInventors: Anandan Ramasamy, Yonggang Jin, Yun Liu, Eric Saugier, Romain Coffy, How Yuan Hwang
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Publication number: 20140054727Abstract: A method of forming a transistor is disclosed, in which gate-to-substrate leakage is addressed by forming and maintaining a conformal oxide layer overlying the transistor gate. Using the method disclosed for an n-type device, the conformal oxide layer can be formed as part of the source-drain doping process. Subsequent removal of residual phosphorous dopants from the surface of the oxide layer is accomplished without significant erosion of the oxide layer. The removal step uses a selective deglazing process that employs a hydrolytic reaction, and an acid-base neutralization reaction that includes an ammonium hydroxide component.Type: ApplicationFiled: August 27, 2012Publication date: February 27, 2014Applicant: STMICROELECTRONICS PTE LTD.Inventors: Hong-Gap Chua, Yee-Chung Chan, Mei-Yu Muk
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Patent number: 8659085Abstract: The present disclosure is directed to an integrated circuit having a substrate and a first and a second interconnect structure over the substrate. Each interconnect structure has a first conductive layer over the substrate and a second conductive layer over the first conductive layer. The integrated circuit also includes a thin film resistor over a portion of the substrate between the first and the second interconnect structure that electrically connects the first conductive layers of the first and second interconnect structures.Type: GrantFiled: August 24, 2010Date of Patent: February 25, 2014Assignee: STMicroelectronics Pte Ltd.Inventors: Hui Chong Vince Ng, Olivier Le Neel, Calvin Leung
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Patent number: 8650953Abstract: A chemical sensor is provided on a first semiconductor die. A potentiostat is provided on a second semiconductor die. An analog to digital converter and a microcontroller are provided on a third semiconductor die. The first die is configured to be connected to the second die. The second die is configured to be connected to the third die. The chemical sensor detects a chemical in the surrounding environment and outputs a signal to the analog to digital converter. The analog to digital converter converts the signal to a digital signal and outputs the digital signal to the microcontroller. The microcontroller provides a measurement of the concentration of the chemical in the surrounding environment.Type: GrantFiled: October 31, 2011Date of Patent: February 18, 2014Assignee: STMicroelectronics Pte Ltd.Inventors: Suman Cherian, Olivier Le Neel
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Patent number: 8644053Abstract: An integrated circuit is formed having an array of memory cells located in the dielectric stack above a semiconductor substrate. Each memory cell has two adjustable resistors and two heating elements. A dielectric material separates the heating elements from the adjustable resistors. One heating element alters the resistance of one of the resistors by applying heat thereto to write data to the memory cell. The other heating element alters the resistance of the other resistor by applying heat thereto to erase data from the memory cell.Type: GrantFiled: July 29, 2013Date of Patent: February 4, 2014Assignee: STMicroelectronics Pte Ltd.Inventor: Olivier Le Neel
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Patent number: 8642119Abstract: The present disclosure is directed to a camera module that includes at least a semiconducting die, an image-sensing circuit, a lens, a lens aperture, and a coating that adheres to an exterior surface of the camera module. The coating is opaque to light and prevents light from accessing the camera other than through the lens aperture. The opaque coating is applied as a fluid and is cured. In one embodiment, a mask material is selectively applied to exterior surfaces of the semiconducting die, electrical interconnect layers, glass layers, the lens body, or the lens aperture. After applying the opaque coating, the selectively applied mask material is removed. Methods of selectively applying a mask material include applying a conformable and peelably releasable dope-like material, placing an array of joined, selectively shaped rigid masks over an array of assemblies, and applying a conformable mask material that is heat-expandable.Type: GrantFiled: September 22, 2010Date of Patent: February 4, 2014Assignee: STMicroelectronics PTE Ltd.Inventors: Wingshenq Wong, David Gani, Glenn De Los Reyes
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Patent number: 8637352Abstract: Ball grid array to pin grid array conversion methods are provided. An example method can include coupling a plurality of solder balls to a respective plurality of pin grid array contact pads. Each of the plurality of solder balls is encapsulated in a fixed material. A portion of the plurality of solder balls and a portion of the fixed material is removed to provide a plurality of exposed solder balls. The exposed solder balls are softened and each of a plurality of pin members is inserted in a softened, exposed, solder ball. The plurality of pin members forms a pin grid array package.Type: GrantFiled: November 22, 2011Date of Patent: January 28, 2014Assignee: STMicroelectronics Pte Ltd.Inventor: Kim-Yong Goh
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Publication number: 20140010962Abstract: The present disclosure is directed to systems and methods for adjusting adhesion strength between materials during semiconductor sensor processing. One or more embodiments are directed to using various surface treatments to a substrate to adjust adhesion strength between the substrate and a polymer. In one embodiment, the surface of the substrate is roughened to decrease the adhesive strength between the substrate and the polymer. In another embodiment, the surface of the substrate is smoothed to increase the adhesive strength between the substrate and the polymer.Type: ApplicationFiled: July 9, 2012Publication date: January 9, 2014Applicant: STMICROELECTRONICS PTE LTD.Inventors: Ying Yu, TienChoy Loh, ShianYeu Kam
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Publication number: 20140000804Abstract: A pick and place system with an integrated light source to partially cure a light-curable adhesives onto which components have been placed. After a light-curable adhesive in liquid or low viscosity form is applied to a location on a substrate, a pick-and-place head uses a vacuum introduced to its nozzle-like opening to pick a component and place it on to the light-curable adhesive. The pick-and-place head then transmit an appropriate light through the same nozzle-like opening to at least partially cure the adhesive. The component becomes, therefore, at least partially fixed to the substrate and will not shift as the substrate is moved.Type: ApplicationFiled: July 2, 2012Publication date: January 2, 2014Applicant: STMicroelectronics Pte Ltd.Inventors: Han Kong Looi, Cheng-hai Cheh
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Patent number: 8617987Abstract: An embedded wafer level ball grid array (eWLB) is formed by embedding a semiconductor die in a molding compound. A trench is formed in the molding compound with a laser drill. A first layer of copper is deposited on the sidewall of the trench by physical vapor deposition. A second layer of copper is then formed on the first layer of copper by an electroless process. A third layer of copper is then formed on the second layer by electroplating.Type: GrantFiled: December 30, 2010Date of Patent: December 31, 2013Assignee: STMicroelectronics Pte Ltd.Inventors: Kah Wee Gan, Yonggang Jin, Yun Liu, Yaohuang Huang
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Publication number: 20130320471Abstract: A wafer-level camera sensor package includes a semiconductor substrate with an optical sensor on a front surface. Through-silicon-vias (TSV) extend through the substrate and provide I/O contact with the sensor from the back side of the substrate. A glass cover is positioned over the front surface, and the cover and substrate are embedded in a molding compound layer (MCL), the front surface of the MCL lying coplanar with the front of the cover, and the back surface lying coplanar with the back of the substrate. Surface-mount devices, electromagnetic shielding, and through-wafer-connectors can be embedded in the MCL. A redistribution layer on the back surface of the MCL includes bottom contact pads for mounting the package, and conductive traces interconnecting the contact pads, TSVs, surface-mount devices, shielding, and through-wafer-connectors. Anisotropic conductive adhesive is positioned on the front of the MCL for physically and electrically attaching a lens array.Type: ApplicationFiled: May 31, 2012Publication date: December 5, 2013Applicant: STMICROELECTRONICS PTE LTD.Inventor: Jing-En Luan
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Publication number: 20130322039Abstract: A cap for a microelectromechanical system device includes a first layer of, e.g., Bismaleimide Triazine (BT) resin material in which a through-aperture is formed, laminated to a second layer of BT resin material that closes the aperture in the first layer, forming a cavity. The first and second layers are laminated with a thermosetting adhesive that is sufficiently thick to encapsulate particles that may remain from a routing operation for forming the apertures. The interior of the cavity, including exposed portions of the adhesive, and the exposed face of the first layer are coated with an electrically conductive paint. The cap is adhered to a substrate over the MEMS device using an electrically conductive adhesive, which couples the conductive paint layer to a ground plane of the substrate. The layer of conductive paint serves as a shield to prevent or reduce electromagnetic interference acting on the MEMS device.Type: ApplicationFiled: May 31, 2012Publication date: December 5, 2013Applicant: STMICROELECTRONICS PTE LTD.Inventors: Jerome Teysseyre, Glenn de los Reyes, Wee Chin Judy Lim
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Patent number: 8598681Abstract: The present disclosure is directed to a device and a method for forming a precision temperature sensor switch with a Wheatstone bridge configuration of four resistors and a comparator. When the temperature sensor detects a temperature above a threshold, the switch will change states. The four resistors in the Wheatstone bridge have the same resistance, with three of the resistors having a low temperature coefficient of resistance and the fourth resistor having a high temperature coefficient of resistance. As the temperature increases, the resistance of the fourth resistor will change. The change in resistance of the fourth resistor will change a voltage across the bridge. The voltage across the bridge is coupled to the comparator and compares the voltage with the threshold temperature, such that when the threshold temperature is exceeded, the comparator switches the output off.Type: GrantFiled: December 30, 2011Date of Patent: December 3, 2013Assignee: STMicroelectronics Pte Ltd.Inventors: Olivier Le Neel, Ravi Shankar
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Publication number: 20130314972Abstract: An integrated circuit is formed having an array of memory cells located in the dielectric stack above a semiconductor substrate. Each memory cell has two adjustable resistors and two heating elements. A dielectric material separates the heating elements from the adjustable resistors. One heating element alters the resistance of one of the resistors by applying heat thereto to write data to the memory cell. The other heating element alters the resistance of the other resistor by applying heat thereto to erase data from the memory cell.Type: ApplicationFiled: July 29, 2013Publication date: November 28, 2013Applicant: STMicroelectronics Pte Ltd.Inventor: Olivier Le Neel
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Patent number: 8591700Abstract: The present disclosure is directed to a susceptor support that includes a hub and a plurality of arms extending radially from the hub, where each arm has a terminal end positioned away from the hub. The susceptor support also includes a plurality of elongated rectangular tips formed at the terminal end of each arm, each tip having a length and a width, wherein the length is greater than the width.Type: GrantFiled: August 19, 2010Date of Patent: November 26, 2013Assignee: STMicroelectronics Pte Ltd.Inventors: Roy G. Gatchalian, Joseph Gregorio Soriano, Hee Cher Heng
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Patent number: 8576574Abstract: A conductive paint electromagnetic interference (EMI) shield for an electronic module or device. The conductive paint is composed of metal particles suspended in a fluidic carrier. In one embodiment, the conductive paint is sprayed onto exterior surfaces of an electronic module or device from a spray gun. The sprayed conductive paint is cured to remove the fluidic carrier, leaving a metal film coated to the outside of the module or device. In one embodiment used with electronic packages in array form, grooves are cut into an encapsulation material of a module so that the shield protection includes sidewalls of the package. In another embodiment used with camera modules, masking is used to selectively shield portions of the module. In a further embodiment, the shield is electrically connected to a ground conductor of a circuit of the electronic module.Type: GrantFiled: April 21, 2010Date of Patent: November 5, 2013Assignee: STMicroelectronics Pte Ltd.Inventors: Wingshenq Wong, David Gani, Glenn De Los Reyes