Patents Assigned to STMicroelectronics Pte Ltd
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Patent number: 9025339Abstract: On a circuit substrate on which an adhesive is used to couple electronic or structural components to the substrate, an adhesive dam is positioned to prevent the adhesive from interfering with the operation of the circuit. A contact pad can be provided at a selected location and with a selected shape, and solder deposited on the pad, then reflowed to form the dam. The dam can be a structure soldered to a contact pad, or the dam can be supported at its ends by another structure of the device, so that, at the location where it functions to contain the adhesive, it is not attached to the substrate.Type: GrantFiled: December 29, 2011Date of Patent: May 5, 2015Assignee: STMicroelectronics Pte Ltd.Inventors: Jing-En Luan, Hk Looi
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Patent number: 9016836Abstract: An ink jet printhead device includes a substrate and a plurality of thermal resistors on the substrate. Each thermal resistor includes first and second electrodes and a resistive layer extending therebetween. A polarity-changing driver is coupled to the plurality of thermal resistors and configured to change a driving polarity between the first and second electrodes of each of the plurality of thermal resistors.Type: GrantFiled: May 14, 2013Date of Patent: April 28, 2015Assignees: STMicroelectronics, Inc., STMicroelectronics Asia Pacific Pte. Ltd., STMicroelectronics Pte LtdInventors: Madanagopal Kunnavakkam, Jin Zhi Li, Teck Khim Neo, Kenneth W. Smiley, Chun Chek Bong
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Patent number: 9018753Abstract: A method is described for making electronic modules includes molding onto a substrate panel a matrix panel defining a plurality of cavities, attaching semiconductor die to the substrate panel in respective cavities of the molded matrix panel, electrically connecting the semiconductor die to the substrate panel, affixing a cover to the molded matrix panel to form an electronic module assembly, mounting the electronic module assembly on a carrier tape, and separating the electronic module assembly into individual electronic modules. An electronic module is described which includes a substrate, a wall member molded onto the substrate, the molded wall member defining a cavity, at least one semiconductor die attached to the substrate in the cavity and electrically connected to the substrate, and a cover affixed to the molded wall member over the cavity.Type: GrantFiled: August 2, 2013Date of Patent: April 28, 2015Assignee: STMicroelectronics Pte LtdInventor: Wing Shenq Wong
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Patent number: 9018645Abstract: An electronics assembly includes a semiconductor die assembly, an enclosure affixed to the semiconductor die assembly, the enclosure defining first and second chambers over the semiconductor die assembly, and first and second optical elements mounted in the first and second chambers, respectively. The semiconductor die assembly includes a semiconductor die encapsulated in a molded material, an encapsulation layer located on the top surface of the semiconductor die, and at least one patterned metal layer and at least one dielectric layer over the encapsulation layer. Conductive pillars extend through the encapsulation layer for electrical connection to the semiconductor die. The encapsulation layer blocks optical crosstalk between the first and second chambers. A method is provided for making the electronics assembly.Type: GrantFiled: August 29, 2013Date of Patent: April 28, 2015Assignee: STMicroelectronics Pte LtdInventor: Yonggang Jin
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Patent number: 9019688Abstract: The present disclosure is directed to a device and a method for achieving a precise capacitance of a capacitor. The method includes trimming a first capacitance of the capacitor to a second capacitance, the capacitor having a first conductive layer separated from a second conductive layer by a dielectric layer. Changing a first dielectric constant of the dielectric layer to a second dielectric constant, where the first dielectric constant corresponding to the first capacitance and the second dielectric constant corresponding to the second dielectric constant includes heating the dielectric layer above a threshold temperature for a time period. The heat is provided by either one of the plates of the capacitor or from a separate heater.Type: GrantFiled: December 2, 2011Date of Patent: April 28, 2015Assignee: STMicroelectronics Pte Ltd.Inventors: Olivier Le Neel, Ravi Shankar
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Patent number: 9021557Abstract: A system and method for realizing specific security features for a mobile device that may store sensitive and private data by providing secured communications to a paired remote device. In this respect, both the mobile device (which may be a mobile phone, for example) and the paired remote device (which may be a keychain, for example) include a SIM card that may have identification data stored therein. Once paired, the two devices may communicate encrypted security messages back and forth in order to implement various security measures to protect data and wireless communications. Such messages may be generated from initial information known only to each respective device such as a randomly generated offset number and a common time reference.Type: GrantFiled: October 27, 2011Date of Patent: April 28, 2015Assignee: STMicroelectronics Pte LtdInventor: Olivier Leneel
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Patent number: 9019636Abstract: Lens alignment apparatuses, methods and optical devices are disclosed. In accordance with various embodiments, a lens alignment apparatus may include at least one lens element positioned in a lens body. A lens alignment interface coupled to the lens element may be configured to permit the lens element to be angularly deflected relative to an axis of symmetry of the lens body. In other embodiments, a method of improving the resolution of an optical device may include translating a lens along an optical axis to maximize resolution at a first location, and determining a resolution in a second location in the imaging plane. The resolution in the second location may be improved by angularly deflecting the lens, and the position of the lens may then be fixed.Type: GrantFiled: December 28, 2010Date of Patent: April 28, 2015Assignee: STMicroelectronics Pte Ltd.Inventors: Jing-En Luan, Junyong Chen
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Patent number: 9018723Abstract: The present disclosure is directed to an infrared sensor that includes a plurality of pairs of support structures positioned on the substrate, each pair including a first support structure adjacent to a second support structure. The sensor includes plurality of pixels, where each pixel is associated with one of the pairs of support structures. Each pixel includes a first infrared reflector layer on the substrate between the first and the second support structures, a membrane formed on the first and second support structures, a thermally conductive resistive layer on the membrane and positioned above the first infrared reflector layer, a second infrared reflector layer on the resistive layer, and an infrared absorption layer on the second infrared reflector layer.Type: GrantFiled: June 27, 2013Date of Patent: April 28, 2015Assignee: STMicroelectronics Pte LtdInventors: Olivier Le Neel, Ravi Shankar, Tien Choy Loh
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Patent number: 9012269Abstract: Fan-out wafer level packaging includes an integrated circuit having a top surface, a bottom surface, a plurality of side surfaces, and a bond pad defined on the top surface. A layer of encapsulant substantially surrounds the side surfaces of the integrated circuit, the layer of encapsulant having a height substantially equal to a height of the integrated circuit. A bump is spaced apart from the integrated circuit, and a redistribution layer electrically couples the bond pad of the integrated circuit to the bump.Type: GrantFiled: June 4, 2012Date of Patent: April 21, 2015Assignee: STMicroelectronics PTE Ltd.Inventors: Yonggang Jin, Xavier Baraton, Faxing Che
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Patent number: 9013017Abstract: A method of making image sensor devices may include forming a sensor layer including image sensor ICs in an encapsulation material, bonding a spacer layer to the sensor layer, the spacer layer having openings therein and aligned with the image sensor ICs, and bonding a lens layer to the spacer layer, the lens layer including lens in an encapsulation material and aligned with the openings and the image sensor ICs. The method may also include dicing the bonded-together sensor, spacer and lens layers to provide the image sensor devices. Helpfully, the method may use WLP to enhance production.Type: GrantFiled: October 15, 2012Date of Patent: April 21, 2015Assignee: STMicroelectronics Pte LtdInventors: Yonggang Jin, Laurent Herard, WeeChinJudy Lim
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Patent number: 9013037Abstract: A flip chip structure formed on a semiconductor substrate includes a first plurality of copper pillars positioned directly over, and in electrical contact with respective ones of a plurality of contact pads on the front face of the semiconductor substrate. A layer of molding compound is positioned on the front face of the substrate, surrounding and enclosing each of the first plurality of pillars and having a front face that is coplanar with front faces of each of the copper pillars. Each of a second plurality of copper pillars is positioned on the front face of one of the first plurality of copper pillars, and a solder bump is positioned on a front face of each of the second plurality of pillars.Type: GrantFiled: September 14, 2011Date of Patent: April 21, 2015Assignee: STMicroelectronics Pte Ltd.Inventor: Yonggang Jin
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Patent number: 9013012Abstract: Embodiments of the present disclosure are related to MEMS devices having a suspended membrane that are secured to and spaced apart from a substrate with a sealed cavity therebetween. The membrane includes openings with sidewalls that are closed by a dielectric material. In various embodiments, the cavity between the membrane and the substrate is formed by removing a sacrificial layer through the openings. In one or more embodiments, the openings in the membrane are closed by depositing the dielectric material on the sidewalls of the openings and the upper surface of the membrane.Type: GrantFiled: March 5, 2013Date of Patent: April 21, 2015Assignee: STMicroelectronics Pte. Ltd.Inventors: Ravi Shankar, Olivier Le Neel, Shian Yeu Kam, Tien Choy Loh
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Publication number: 20150103297Abstract: An optical assembly may include a substrate, a housing carried by the substrate and having at least one adhesive-receiving recess in an upper surface thereof, and a lens carried by the housing. The optical assembly may also include a liquid crystal focus cell adjacent the lens and including cell layers and pairs of electrically conductive contacts associated therewith. The optical assembly may also include at least one electrically conductive member within the at least one adhesive-receiving recess and coupling together each pair of the electrically conductive contacts, and an adhesive body in the at least one adhesive-receiving recess covering the at least one electrically conductive member.Type: ApplicationFiled: October 10, 2013Publication date: April 16, 2015Applicant: STMICROELECTRONICS PTE. LTDInventors: WeeChinJudy LIM, David Gani, Hk Looi, Bs Aw, Cheng-hai Cheh
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Patent number: 9003644Abstract: A PNP apparatus may include a robotic arm, and a PNP tool head carried by the robotic arm. The PNP tool head may include a body configured to apply bonding pressure to a first area of an electronic device, and a pick-up tip movable between an extended position and a retracted position relative to the body as the pick-up tip rests against a second area of the electronic device. The pick-up tip may define a vacuum passageway therethrough to couple a vacuum source to the second area of the electronic device.Type: GrantFiled: October 15, 2012Date of Patent: April 14, 2015Assignee: STMicroelectronics Pte LtdInventors: Hk Looi, Cheng-hai Cheh, HaiKin Toh
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Patent number: 8999446Abstract: The present disclosure is directed to systems and methods for adjusting adhesion strength between materials during semiconductor sensor processing. One or more embodiments are directed to using various surface treatments to a substrate to adjust adhesion strength between the substrate and a polymer. In one embodiment, the surface of the substrate is roughened to decrease the adhesive strength between the substrate and the polymer. In another embodiment, the surface of the substrate is smoothed to increase the adhesive strength between the substrate and the polymer.Type: GrantFiled: July 9, 2012Date of Patent: April 7, 2015Assignee: STMicroelectronics Pte Ltd.Inventors: Ying Yu, TienChoy Loh, ShianYeu Kam
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Patent number: 8999850Abstract: Methods and apparatus for etching materials using tetramethylammonium hydroxide (TMAH) are described. The methods may involve including an additive when applying the TMAH to the material to be etched. The additive may be a gas, and in some situations may be clean dry air. The clean dry air may be provided with the TMAH to minimize or prevent the formation of hillocks in the etched structure. Apparatus for performing the methods are also described.Type: GrantFiled: December 29, 2011Date of Patent: April 7, 2015Assignee: STMicroelectronics Pte LtdInventors: Ying Yu, Tien Choy Loh, Shian Yeu Kam
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Patent number: 9000542Abstract: The present disclosure is directed to a device that includes a substrate and a sensor formed on the substrate. The sensor includes a chamber formed from a plurality of integrated cavities, a membrane above the substrate, the membrane having a plurality of openings, each opening positioned above one of the cavities, and a plurality of diamond shaped anchors positioned between the membrane and the substrate, the anchors positioned between each of the cavities. A center of each opening is also a center of one of the cavities.Type: GrantFiled: May 31, 2013Date of Patent: April 7, 2015Assignee: STMicroelectronics Pte Ltd.Inventors: Tien Choy Loh, Olivier Le Neel
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Publication number: 20150084171Abstract: A non-lead (QFN) semiconductor package is disclosed. The package includes a die attach pad and a semiconductor die supported by the die attached pad. The semiconductor die includes a plurality of pads on an active surface thereof. The package further includes a plurality of terminal leads, an encapsulant that encapsulates the semiconductor die, and a redistribution layer including a plurality of interconnections electrically connecting the pads to the terminal leads. A method of making the package is also disclosed.Type: ApplicationFiled: September 23, 2013Publication date: March 26, 2015Applicant: STMicroelectronics Pte. Ltd.Inventors: Yiyi Ma, Kim-Yong Goh, Xueren Zhang
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Patent number: 8987871Abstract: A cap for a microelectromechanical system device includes a first layer of, e.g., Bismaleimide Triazine (BT) resin material in which a through-aperture is formed, laminated to a second layer of BT resin material that closes the aperture in the first layer, forming a cavity. The first and second layers are laminated with a thermosetting adhesive that is sufficiently thick to encapsulate particles that may remain from a routing operation for forming the apertures. The interior of the cavity, including exposed portions of the adhesive, and the exposed face of the first layer are coated with an electrically conductive paint. The cap is adhered to a substrate over the MEMS device using an electrically conductive adhesive, which couples the conductive paint layer to a ground plane of the substrate. The layer of conductive paint serves as a shield to prevent or reduce electromagnetic interference acting on the MEMS device.Type: GrantFiled: May 31, 2012Date of Patent: March 24, 2015Assignee: STMicroelectronics Pte Ltd.Inventors: Jerome Teysseyre, Glenn de los Reyes, Wee Chin Judy Lim
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Publication number: 20150060891Abstract: An electronics assembly includes a semiconductor die assembly, an enclosure affixed to the semiconductor die assembly, the enclosure defining first and second chambers over the semiconductor die assembly, and first and second optical elements mounted in the first and second chambers, respectively. The semiconductor die assembly includes a semiconductor die encapsulated in a molded material, an encapsulation layer located on the top surface of the semiconductor die, and at least one patterned metal layer and at least one dielectric layer over the encapsulation layer. Conductive pillars extend through the encapsulation layer for electrical connection to the semiconductor die. The encapsulation layer blocks optical crosstalk between the first and second chambers. A method is provided for making the electronics assembly.Type: ApplicationFiled: August 29, 2013Publication date: March 5, 2015Applicant: STMicroelectronics Pte Ltd.Inventor: Yonggang Jin