Abstract: Photoluminescence from a sample detector is detected using an array of photo-sensitive detectors. At least one first photo-sensitive detector of the array is provided with a first type of linear polarization filter and at least one second photo-sensitive detector is provided with a second type of linear polarization filter. The first type of linear polarization filter has a plane of polarization which is at angled with respect to a plane of polarization of said second type of polarization filter.

Abstract: An apparatus includes a camera module configured to generate at least one image and a ToF SPAD based range detecting module configured to generate at least one distance determination to an object within a field of view of the camera module. A processor receives the at least one image from the camera module output and receives the at least one distance determination from the ToF SPAD based range detecting module. This data is processed by the processor to determine a depth map.

Abstract: An electronic device disclosed herein includes a first integrated circuit die having formed therein photodiodes and readout circuitry for the photodiodes, with the readout circuitry including output pads exposed on a surface of the first integrated circuit die. A second integrated circuit die has formed therein storage capacitor structures for the photodiodes and digital circuitry for performing image processing on data stored in the storage capacitor structures, with the storage capacitor structures including input pads exposed on a surface of the second integrated circuit die. The first and second integrated circuit die are in a face to face arrangement such that the output pads of the first integrated circuit die face the input pads of the second integrated circuit die. An interconnect couples the output pads of the first integrated circuit die to the input pads of the second integrated circuit die.

Abstract: An embodiment circuit includes a first voltage-controlled delay line (VCDL), a second VCDL, and a first flip-flop. The first VCDL includes a first input terminal configured to receive a first input voltage, and a second input terminal configured to receive a clock signal. The second VCDL includes a first input terminal configured to receive a second input voltage, and a second input terminal configured to receive the clock signal. The first flip-flop includes a reset pin coupled to an output terminal of the first VCDL, and a clock pin coupled to an output terminal of the second VCDL.

Abstract: A single photon avalanche diode based apparatus comprising: at least one array of single photon avalanche diodes configured to receive light generated externally to the apparatus, wherein the at least one array is configurable to be sub-divided into a plurality of sub-arrays, each sub-array able to receive a separate free space light communication channel; and a receiver configured to receive the output from each sub-array and output data based on the received plurality of sub-array separate free space light communication channel.

Abstract: An oven may include a housing having a cooking receptacle configured to hold content therein, a heating element carried by the housing and configured to heat the content, and a proximity detector carried by the housing in the cooking receptacle and configured to detect surface movement of the content. The proximity detector may include at least one SPAD.

Abstract: An input device may include an image sensor having an imaging surface comprising that includes an array of pixels, and an optical waveguide layer carried by the imaging surface and having an exposed user surface and a first refractive index associated therewith. The input device may also include a substrate between the optical waveguide layer and the image sensor and having a second refractive index associated therewith that is lower than first refractive index. A collimation layer may be between the image sensor and the substrate. A light source may be configured to transmit light into the optical waveguide so that the light therein undergoes a total internal reflection. The optical waveguide may be being adjacent the imaging surface so that an object brought into contact with the exposed user surface disturbs the total internal reflection results resulting in an image pattern on the imaging surface.

Abstract: An embodiment device includes an optical source configured to generate an optical carrier including an optical pulse train; and a modulator configured to modulate an amplitude of the optical pulse train, based on data generated by a data source, to produce a modulated optical signal.

Abstract: A driver circuit is configured to pass a current. The circuit includes a first transistor connected in series with the laser diode, and configured to regulate the current. A voltage regulator is configured to provide an input to a gate of the first transistor so as to regulate the current in dependence upon a regulator input and a feedback input at the voltage regulator.

Abstract: A time to digital converter (TDC) may include a sampling stage configured to sample an input signal based upon a plurality of timing signals having different respective phases, and provide a respective output for each of the different timing signals. A first synchronization stage may be configured to receive the outputs from the sampling stage, synchronize a first subset of the outputs to a first one of the plurality of timing signals, and synchronize a second subset of the outputs to a second one of the plurality of timing signals. A second synchronization stage may be configured to receive the synchronized outputs from the first synchronization stage, and synchronize all of the synchronized outputs from the first synchronization stage to the first one of the plurality of timing signals.

Abstract: An electronic device includes a ranging light source and a reflected light detector. A logic circuit causes the ranging light source to emit ranging light at a target. Reflected light from the target is detected using the reflected light detector, with the reflected light being a portion of the ranging light that reflects from the target back toward the reflected light detector. An intensity of the reflected light is determined using the reflected light detector. A distance to the target is determined based upon time elapsed between activating the ranging light source and detecting the reflected ranging light. Reflectance of the target is calculated, based upon the intensity of the reflected light and the distance to the target.

Abstract: A distance from an apparatus to at least one object is determined by generating a first signal and generating light modulated by the first signal to be emitted from the apparatus. Light reflected by the at least one object is detected using a Time-of-flight detector array, wherein each array element of the Time-of-flight detector array generates an output signal from a series of photon counts over a number of consecutive non-overlapping time periods. The output signals are compared to the first signal to determine at least one signal phase difference. From this at least one signal phase difference a distance from the apparatus to the at least one object is determined.

Abstract: A method for forming a molded proximity sensor with an optical resin lens and the structure formed thereby. A light sensor chip is placed on a substrate, such as a printed circuit board, and a diode, such as a laser diode, is positioned on top of the light sensor chip and electrically connected to a bonding pad on the light sensor chip. Transparent, optical resin in liquid form is applied as a drop over the light sensor array on the light sensor chip as well as over the light-emitting diode. After the optical resin is cured, a molding compound is applied to an entire assembly, after which the assembly is polished to expose the lenses and have a top surface flush with the top surface of the molding compound.

Abstract: An optical electronic device may include a plurality of different optical sources, and a global shutter sensor including an array of global shutter pixels, with each global shutter pixel including a plurality of storage elements. A controller may be coupled to the plurality of optical sources and the global shutter sensor and configured to cause a first optical source to illuminate and a first storage element in each global shutter pixel to store optical data during a first integration period, cause a second optical source to illuminate and a second storage element in each global shutter pixel to store optical data during a second integration period, and output the stored optical data from the first and second storage elements of the global shutter pixels after the first and second integration periods.

Abstract: An embodiment circuit includes a diode having a first terminal coupled to a first reference voltage; a first controllable switch coupled between a second terminal of the diode and a second reference voltage; and a capacitive element having a first terminal coupled to the first reference voltage and a second terminal controllably coupled to the second terminal of the diode.

Abstract: An embodiment circuit includes a first source follower configured to be controlled by a voltage at a first node, a photodiode controllably coupled to the first node, and a bias transistor configured to be controlled by a bias voltage. The bias transistor has a first terminal coupled to an output of the first source follower. The circuit additionally includes a storage node controllably coupled to the output of the first source follower, and an amplifier controllably coupled between the storage node and an output line. Also included in the circuit is a controllable switching element configured to couple a second terminal of the bias transistor to a supply voltage in response to a pixel operating in a first mode, and to couple the second terminal of the bias transistor to the output line in response to the pixel operating in a second mode.

Abstract: Disclosed herein is an electronic device including an integrated circuit substrate, with a pixel array area within the integrated circuit substrate. A first deep trench isolation structure is formed in the integrated circuit substrate about a perimeter of the pixel array area. First, second, third, and fourth pixels are within the pixel array area and spaced apart from one another. A storage capacitor area is within the integrated circuit substrate and interior to the first deep trench isolation structure. A second deep trench isolation structure is formed in the integrated circuit substrate about a perimeter of the storage capacitor area. The second deep trench isolation structure may serve to electrically isolate the storage capacitor area from the first, second, third, and fourth pixels.

Abstract: A circuit may include a first circuit configured to generate a voltage signal for generating an optical pulse, the voltage signal being generated based on a phase control signal, and an array of single photon avalanche diode (SPAD) cells configured to detect a phase of the optical pulse. The circuit may include a phase control circuit configured to generate the phase control signal based upon a target phase value and the detected phase of the optical pulse.

Abstract: An electronic device disclosed herein includes a single photon avalanche diode (SPAD) configured to detect an incoming photon and to generate a first pulse signal in response thereto. Pulse shaping circuitry is configured to generate a second pulse signal from the first pulse signal by high pass filtering the first pulse signal. The pulse shaping circuitry includes a transistor drain-source coupled between a first node and a reference node, and a capacitor coupling the first node to an anode of the SPAD.

Abstract: SPADs detect photons of a return light pulse and output corresponding pulse signals. First and second counters, when enabled in response to phase measurement value, are configured to count the pulse signals. The phase measurement value is set for a subsequent iteration of the return light pulse in response to processing of first and second count values of the first and second counters, respectively, for a current iteration. If the first count value exceeds the second count value by more than a difference threshold limit, the phase measurement value is decremented for the subsequent iteration. Otherwise, the phase measurement value is incremented for the subsequent iteration. If the difference threshold limit is not satisfied, the phase measurement value may be maintained for the subsequent iteration, but one of the counters is preloaded for the subsequent iteration with a value equal to a magnitude of the difference between the count values.