Abstract: An LDPC decoder has a determined number of processing units operating in parallel. Storage circuitry contains first words having a juxtaposition of a first type of message. The storage circuitry also contains second words having a juxtaposition of a second type of message. A message provision unit provides each processing unit with the messages. A message write unit may write words into the storage circuitry in a way that depends on the contents of the words. The message provision unit may provide data in a way that depends on the contents of the words.
Abstract: A MOS power component in which the active regions extend perpendicularly to the surface of a semiconductor chip substantially across the entire thickness thereof. A MOS power transistor according to the present invention alternately includes a source region of a first conductivity type, an intermediary region, and a drain region of the first conductivity type, each of these regions extending across the entire thickness of the substrate, the source and drain regions being contacted by conductive fingers or plates substantially crossing the substrate, insulated and spaced apart conductive fingers crossing from top to bottom the intermediary region, the horizontal distance between the insulated fingers being such that the intermediary region can be inverted when an appropriate voltage is applied to these insulated fingers.
Abstract: A mixer-amplifier of an RF signal including at least an amplifier circuit and a mixing circuit controlled at a local oscillator frequency, for amplifying a signal applied on at least one input terminal and converting a first frequency of this signal into a second, lower, frequency, and including a reverse feedback loop switched at the local oscillator frequency.
Abstract: A method ciphers a standardized stream of compressed audio or video data, wherein at least one part of the bits of data packets delimited by two consecutive synchronization markers is ciphered by pseudo-random stream.
Abstract: The invention relates to a method for the COFDM demodulation of a signal received from a transmission channel. The inventive method includes performing the fast Fourier transform of the signal received in a window corresponding to a symbol, each symbol being associated with a guard time reproducing one part of the symbol; supplying a set of estimated values for the module impulse response; determining coefficients, each coefficient being obtained from the product of the aforementioned set and a filtering function (FE) for a determined relative position of the filtering function in relation to the set; determining the maximum coefficient and the corresponding relative position; and positioning the window as a function of the relative position, the filtering function including a central part (LMAX) which has a constant amplitude and a duration equal to the duration of the guard time and which is surrounded by non-zero decreasing edges.
Abstract: A non-volatile memory point including a floating gate placed above a semiconductor substrate, the floating gate comprising active portions insulated from the substrate by thin insulating layers, and inactive portions insulated from the substrate by thick insulating layers that do not conduct electrons, the active portions being principally P-type doped, and the inactive portions comprising at least one N-type doped area forming a portion of a PN junction.
Type:
Grant
Filed:
September 22, 2006
Date of Patent:
March 9, 2010
Assignees:
STMicroelectronics S.A., STMicroelectronics SAS, France Universite d'Aix-Marseille
Inventors:
Rachid Bouchakour, Virginie Bidal, Philippe Candelier, Richard Fournel, Philippe Gendrier, Romain Laffont, Pascal Masson, Jean-Michel Mirabel, Arnaud Regnier
Abstract: A method and a circuit for reading an electronic charge retention element for a temporal measurement, of the type including at least one capacitive element whose dielectric exhibits a leakage and a transistor with insulated control terminal for reading the residual charges, the reading circuit including; two parallel branches between two supply terminals, each branch including at least one transistor of a first type and one transistor of a second type, the transistor of the second type of one of the branches consisting of that of the element to be read and the transistor of the second type of the other branch receiving, on its control terminal, a staircase signal, the respective drains of the transistors of the first type being connected to the respective inputs of a comparator whose output provides an indication of the residual voltage in the charge retention element.
Abstract: A device is provided for managing the current consumption peak on each powering-up of a domain in an electronic circuit. A plurality of domains are present and a global power supply grid provides power. Each domain is selectively supplied by a local supply grid connected to the global supply grid via a plurality of commanded switch transistors. A pre-charge transistor is used to pre-charge a domain at powering-up. A command circuit controls operation of the switch transistors through an analog command signal whose slew rate is controlled to ensure that switch transistor conduction is delayed to enable the pre-charge circuit to charge the domain to a sufficient degree that activation of the switch transistor will not draw excessive current.
Abstract: A method for the transmission of digital messages by the output terminals of a monitoring circuit which is integrated into a microprocessor, the digital messages being representative of first specific events which are dependent on the execution of a series of instructions by the microprocessor.
Abstract: A method is for processing an incident signal, in which the incident signal is delivered to a transconductor stage, and a current output of the transconductor stage is coupled to an output capacitor so as to deliver to the output capacitor a current signal lasting for at least part of the first half-period of each period of a periodic signal and to thus obtain a frequency-transposed signal at the output capacitor. Upon the occurrence of each part of the first half-period, the voltage of the current output, seen from the output capacitor, is reset to a value equal to that of the voltage of the output capacitor.
Abstract: A directional coupler having a first structure with distributed lines having a first conductive line intended to convey a main signal between two end terminals and having a second conductive line, coupled to the first one, intended to convey a secondary signal proportional to the main signal; and a second structure with local elements including, between a first terminal of the coupler intended to extract the secondary signal and a first end of the second line, two attenuators in series between which is interposed a low-pass filter and, between a second terminal of the coupler and the second end of the second line, at least one attenuator.
Abstract: An analog finite impulse response filter including at least one variable transconductance block having an input for receiving an input voltage and being adapted to sequentially apply each of a plurality of transconductance levels to the input voltage during at least one of a plurality of successive time periods to generate an output current at an output of the variable transconductance block, the at least one variable transconductance block including a plurality of fixed transconductance blocks each receiving the input voltage and capable of being independently activated to supply the output current; and a capacitor coupled to the output of the variable transconductance block to receive the output current and provide an output voltage of the filter.
Type:
Application
Filed:
August 12, 2009
Publication date:
February 25, 2010
Applicant:
STMicroelectronics S.A.
Inventors:
Eoin Ohannaidh, Stéphane Le Tual, Loïc Joet
Abstract: An integrated-circuit semiconductor device includes external electrical connection pads on one face and electrical connection vias under said pads. The electrical connection vias are arranged with a defined pitch in a defined direction. Each via is respectively associated with one of a plurality of adjacent zones of the face. These zones extend perpendicularly to the pitch direction. The electrical connection pads are grouped in adjacent pairs. An insulation space is located between the pads of each pair of electrical connection pads. In a direction perpendicular to the pitch direction, the pads in the pair are spaced apart. The pads of each pair of electrical connection pads extend over a pair of adjacent zones and are associated with two adjacent vias.
Type:
Application
Filed:
August 11, 2009
Publication date:
February 25, 2010
Applicants:
STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
Inventors:
Eric Sabouret, Laurent Hoareau, Yves Salmon
Abstract: An integrated circuit includes at least one photosensitive element capable of delivering an electrical signal when light of at least one wavelength of the visible spectrum reaches it, and an electrooptic system functioning as an electrochemical shutter. The electrooptic system is located in the path of at least one light ray capable of reaching the photosensitive element and possesses at least one optical property, dependent on electrochemical reaction, that can be modified by an electrical control signal. The optical property is preferably transmission.
Abstract: An integrated circuit includes at least one capacitor that is formed on a layer provided with at least one first trench. The capacitor, which is provided with a dielectric layer that separates two electrodes, conforms to the shape of the first trench, but leaves a part of the first trench unfilled. A material capable of absorbing stresses associated with the displacements of the walls of the trench is placed in the trench to fill the part of the first trench. A second trench is formed at least partly surrounding the first trench. This second trench is also at least partly filled with a material capable of absorbing stresses associated with the displacements of the walls of the second trench. A void may be included in the stress absorbing material which fills either of the first or second trenches.
Type:
Grant
Filed:
May 1, 2006
Date of Patent:
February 23, 2010
Assignees:
STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
Inventors:
Jean-Christophe Giraudin, Vincent Fiori, Philippe Delpech
Abstract: An image sensor includes a matrix of active pixels (PXA). A pair of sampling capacitors (C1) and (C2) per matrix column processes the information delivered by the active pixel matrix. Each matrix column further includes a differential amplifier configured in follower mode connected between the pixels of the column and the pair of sampling capacitors via a pair of switches (I1) and (I2).
Abstract: A combiner/splitter with distributed lines including a first line formed of a first planar winding in a first conductive level and of a second planar winding in a second conductive level; a second line formed of a third planar winding interdigited with the first winding in the first level, and of a fourth planar winding interdigited with the second winding in the second level; a first capacitive element connecting the external ends of the first and third windings; and a second capacitive element connecting the external ends of the second and fourth windings.
Abstract: An antenna generating an electromagnetic field for an electromagnetic transponder and a terminal provided with such an antenna. The antenna comprises a first inductive element designed to be connected to two terminals employing an energizing voltage, and a parallel resonant circuit coupled with the first inductive element.
Abstract: A method of fabricating a device, including the steps of forming a first silicon oxide layer within a first region of the device and a second silicon oxide layer within a second region of the device, implanting doping ions of a first type into the first region, implanting doping ions of a second type into the second region, and etching the first and second regions for a determined duration such that the first silicon oxide layer is removed and at least a part of the second silicon oxide layer remains.
Abstract: A device for extracting parameters for decoding a video data flow, contained in headers preceded by a starting code of series of data coded according to an MPEG standard, organized, independently and according to the starting code, and storage of the parameters in three register banks.