Patents Assigned to STMicroelectronics S.A. (Casalonga)
  • Patent number: 7662500
    Abstract: A package for a fuel cell having an upper plate having a plurality of openings, the front surface of a cell element being intended to be received under each opening to close it, each cell element having a first pad and a second connection pad, each opening being provided with at least one crossbar connecting two sides of the opening, this crossbar having at least a conductive track portion having a first end connected to a pad of a first cell element and having a second end connected to a pad of a neighboring cell element.
    Type: Grant
    Filed: December 21, 2007
    Date of Patent: February 16, 2010
    Assignee: STMicroelectronics S.A.
    Inventors: Yann Bedu, Christophe Serre
  • Patent number: 7660377
    Abstract: A device for providing a digital error signal, for a timing correction loop of a digital demodulator for digital transmission by phase modulation or amplitude and phase modulation, the device successively receiving pairs of digital signals representative of the components of complex signals, and having circuitry for providing a difference signal representative of the difference between the modulus of the complex signal corresponding to the last received pair of digital signals and the modulus of the complex signal corresponding to the previously-received pair of digital signals; circuitry for providing a weighting factor which depends on the angle between the complex signal corresponding to the last received pair of digital signals and the complex signal corresponding to the previously-received pair of digital signals; and circuitry for providing the error signal proportional to the product of the difference signal and of the weighting factor.
    Type: Grant
    Filed: November 9, 2005
    Date of Patent: February 9, 2010
    Assignee: STMicroelectronics S.A.
    Inventor: Jacques Meyer
  • Patent number: 7661040
    Abstract: The sequential access memory array is able to store p words each of n bits. Such p test words each made up of n test bits are written in the memory array, the p test words are extracted sequentially and, for each current word extracted, the n test bits that compose it are compared sequentially with n respective expected data bits before extracting the next test word.
    Type: Grant
    Filed: February 13, 2002
    Date of Patent: February 9, 2010
    Assignee: STMicroelectronics S.A.
    Inventors: Marc Beaujoin, Thomas Alofs, Paul Armagnat
  • Publication number: 20100025773
    Abstract: A region is locally modified so as to create a zone that extends as far as at least part of the surface of the region and is formed from a material that can be removed selectively with respect to the material of the region. The region is then covered with an insulating material. An orifice is formed in the insulating material emerging at the surface of the zone. The selectively removable material is removed from the zone through the orifice so as to form a cavity in place of the zone. The cavity and the orifice are then filled with at least one electrically conducting material so as to form a contact pad.
    Type: Application
    Filed: August 10, 2009
    Publication date: February 4, 2010
    Applicants: STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
    Inventors: Damien Lenoble, Philippe Coronel, Robin Cerutti
  • Publication number: 20100020648
    Abstract: An electronic charge retention circuit for time measurement, including: at least a first capacitive element, a first electrode of which is connected to a floating node (F); at least a second capacitive element, a first electrode of which is connected to the floating node, the first capacitive element having a leakage through its dielectric space and the second capacitive element having a capacitance greater than the first; and at least a first transistor having an isolated control terminal connected to the floating node.
    Type: Application
    Filed: July 20, 2007
    Publication date: January 28, 2010
    Applicant: STMicroelectronics S.A.
    Inventor: Francesco La Rosa
  • Publication number: 20100019869
    Abstract: A resonator including a resonant element having a bulk and columns of a material having a Young's modulus with a temperature coefficient having a sign opposite to that of the bulk.
    Type: Application
    Filed: July 8, 2009
    Publication date: January 28, 2010
    Applicants: STMicroelectronics S.A., Commissariat A L'energie Atomique
    Inventors: Cédric Durand, Fabrice Casset
  • Patent number: 7652864
    Abstract: A method and a circuit for detecting an overheating of an electronic switch of power supply of a load by an A.C. voltage, in which a voltage representative of the temperature in the vicinity of the switch is compared with a threshold, the result of this comparison being sampled at frequency corresponding to an even multiple of the frequency of the A.C. power supply voltage, to provide a signal indicative of the fact that a temperature threshold has been exceeded.
    Type: Grant
    Filed: May 29, 2007
    Date of Patent: January 26, 2010
    Assignee: STMicroelectronics S.A.
    Inventor: Laurent Moindron
  • Patent number: 7649212
    Abstract: A semiconductor component in which the active junctions extend perpendicularly to the surface of a semiconductor chip substantially across the entire thickness thereof. The contacts with the regions to be connected are provided by conductive fingers substantially crossing the entire region with which a contact is desired to be established.
    Type: Grant
    Filed: June 29, 2006
    Date of Patent: January 19, 2010
    Assignee: STMicroelectronics S.A.
    Inventor: Jean-Luc Morand
  • Publication number: 20100011171
    Abstract: A process to make the cache memory of a processor consistent includes the processor processing a request to write data to an address in its memory marked as being in the shared state. The address is transmitted to the other processors, data are written into the processor's cache memory and the address changes to the modified state. An appended memory associated with the processor memorizes the address, the data and an associated marker in a first state. The processor then receives the address with an indicator. If the indicator indicates that the processor must perform the operation and if the associated marker is in the first state, the data are kept in the modified state. If the indicator does not indicate that the processor must perform the operation and if the processor receives an order to mark the data to be in the invalid state, the marker changes to a second state.
    Type: Application
    Filed: September 15, 2009
    Publication date: January 14, 2010
    Applicant: STMicroelectronics S.A.
    Inventors: Jean-Philippe Cousin, Jean-Jose Berenguer, Gilles Pelissier
  • Publication number: 20100003573
    Abstract: A method for processing at least one wall of an opening formed in a silicon substrate, successively including the steps of implanting fluorine atoms into an upper portion of the wall of the opening, performing an oxidization step, and applying a specific processing to at least a portion of the non-implanted portion of the opening.
    Type: Application
    Filed: July 16, 2008
    Publication date: January 7, 2010
    Applicant: STMicroelectronics S.A.
    Inventors: Edgard Jeanne, Sylvain Nizou
  • Patent number: 7643808
    Abstract: A first and a second signal (base band and local oscillator), respectively modulated to a first and a second frequency, are mixed to deliver an output signal at a frequency obtained by combining the first and second frequencies. The mixing is accomplished through a variable resistance stage controlled by the second signal and connected between a first and a second potential to deliver the mixed output signal. A control stage is configured to drive the resistance variation of the variable resistance stage according to the first signal.
    Type: Grant
    Filed: July 5, 2006
    Date of Patent: January 5, 2010
    Assignee: STMicroelectronics S.A.
    Inventor: Vincent Knopik
  • Patent number: 7642792
    Abstract: A probe card and its corresponding illumination device are provided for performing electrical operating tests, preferably done in parallel, with respect to a plurality of chips provided with connection pads, under illumination conditions given by a lighting source, the probe card being a printed circuit board (PCB) including electrical connections to the chip on its lower face, the probe card also including electrical connections to the lighting.
    Type: Grant
    Filed: December 1, 2006
    Date of Patent: January 5, 2010
    Assignee: STMicroelectronics S.A.
    Inventor: Axel Jager
  • Patent number: 7643634
    Abstract: An integrated circuit is embodied on a monolithic substrate and incorporates a tuning module of the direct sampling type that is able to receive satellite digital television analog signals composed of several channels, as well as several channel decoding digital modules connected at the output of the tuning module so as to deliver respectively simultaneously several streams of data packets corresponding to several different selected channels.
    Type: Grant
    Filed: March 31, 2004
    Date of Patent: January 5, 2010
    Assignee: STMicroelectronics S.A.
    Inventors: Pierre Busson, Pierre-Oliver Jouffre, Bernard Louis-Gavet
  • Patent number: 7642579
    Abstract: A pixel having a MOS-type transistor formed in and above a semiconductor substrate of a first doping type, a buried semiconductor layer of a second doping type being placed in the substrate under the MOS transistor and separated therefrom by a substrate portion forming a well. The buried semiconductor layer comprises a thin portion forming a pinch area placed under the transistor channel area and a thick portion placed under all or part of the source/drain areas of the transistor.
    Type: Grant
    Filed: March 5, 2007
    Date of Patent: January 5, 2010
    Assignee: STMicroelectronics S.A.
    Inventors: Arnaud Tournier, François Roy
  • Publication number: 20090323381
    Abstract: A power supply circuit and a transponder having a circuit for rectifying an A.C. voltage and two power storage elements, the rectifying circuit providing a rectified voltage to at least one of the storage elements and an output voltage being provided by at least one of the storage elements, and at least one switching element for switching the circuit operation between a state of provision of a relatively high voltage and a state of provision of a relatively low voltage, the second state configuring the rectifying circuit in halfwave operation.
    Type: Application
    Filed: September 4, 2009
    Publication date: December 31, 2009
    Applicant: STMicroelectronics S.A.
    Inventor: Luc Wuidart
  • Patent number: 7638844
    Abstract: A single-crystal silicon region on insulator on silicon intended to receive at least one component, the insulator having overthicknesses.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: December 29, 2009
    Assignees: STMicroelectronics S.A., Commissariat à l'énergie atomique
    Inventors: Stéphane Monfray, Aomar Halimaoui, Philippe Coronel, Damien Lenoble, Claire Fenouillett-Beranger
  • Patent number: 7638828
    Abstract: The invention concerns a capacitor whereof one first electrode consists of a highly doped active region (D) of a semiconductor component (T) formed on one side of a surface of a semiconductor body, and whereof the second electrode consists of a conductive region (BR) coated with insulation (IL) formed beneath said active region and embedded in the semiconductor body.
    Type: Grant
    Filed: January 12, 2004
    Date of Patent: December 29, 2009
    Assignee: STMicroelectronics S.A.
    Inventor: Jean-Pierre Schoellkopf
  • Publication number: 20090314008
    Abstract: A self-cooled electronic component comprising a vertical monolithic circuit, in which the vertical monolithic circuit is electrically connected in series with a Peltier cooler so that the D.C. current flowing through the circuit supplies the cooler and in which the circuit and the cooler are placed against each other so that the cold surface of the cooler is in thermal contact with the circuit.
    Type: Application
    Filed: August 31, 2009
    Publication date: December 24, 2009
    Applicant: STMicroelectronics S.A.
    Inventor: JEAN-LUC MORAND
  • Patent number: 7636006
    Abstract: A monolithic interface circuit for providing a voltage, from a control circuit supplied by a supply voltage referenced to a reference voltage, to a terminal likely to be at a high voltage with respect to the reference voltage, comprising a high-voltage N-channel MOS transistor having its gate intended to receive a control signal referenced to the reference voltage and having its source intended to be connected to the reference voltage, and a high-voltage PNP transistor having its base connected to the drain of the MOS transistor, having its emitter intended to receive the supply voltage and having its collector intended to provide a voltage to the terminal likely to be at a high voltage.
    Type: Grant
    Filed: September 11, 2006
    Date of Patent: December 22, 2009
    Assignee: STMicroelectronics S.A.
    Inventors: Jerome Heurtier, Samuel Menard
  • Publication number: 20090311572
    Abstract: A fuel cell having its active stack resting on a thin conductive layer, bearing on a wafer provided with through gas inlet channels, the thin conductive layer protruding in the active stack in front of each channel and being transparent to the gas.
    Type: Application
    Filed: December 27, 2006
    Publication date: December 17, 2009
    Applicant: STMicroelectronics S.A.
    Inventors: Mathieu Roy, Fabien Pierre