Patents Assigned to STMicroelectronics S.r.l.
  • Patent number: 11862707
    Abstract: A method forms an HEMT transistor of the normally off type, including: a semiconductor heterostructure, which comprises at least one first layer and one second layer, the second layer being set on top of the first layer; a trench, which extends through the second layer and a portion of the first layer; a gate region of conductive material, which extends in the trench; and a dielectric region, which extends in the trench, coats the gate region, and contacts the semiconductor heterostructure. A part of the trench is delimited laterally by a lateral structure that forms at least one first step. The semiconductor heterostructure forms a first edge and a second edge of the first step, the first edge being formed by the first layer.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: January 2, 2024
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Ferdinando Iucolano, Alfonso Patti, Alessandro Chini
  • Patent number: 11862988
    Abstract: A first RF-to-DC circuit receives a radiofrequency signal and produces a first converted signal delivered to an energy storage circuit. A second RF-to-DC circuit, which is a down-scaled replica of the first RF-to-DC circuit, produces a second converted signal from the radiofrequency signal that is indicative of an open-circuit voltage of the first RF-to-DC circuit. The first RF-to-DC section includes N sub-stages, with a sub-set of sub-stages being selectively activatable. A window comparison of the second converted signal generates a first signal and a second signal indicative of whether the second converted signal is within a range of values proportional to a voltage reference signal. The sub-set of sub-stages is selectively deactivated, respectively activated, when the performed window comparison has a first result, respectively, a second result.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: January 2, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Roberto La Rosa, Alessandro Finocchiaro
  • Patent number: 11861998
    Abstract: A system for detecting a presence in an environment to be monitored includes an electrostatic charge variation sensor, a vibration sensor, and an environmental pressure sensor. A processing unit is configured to acquire, from the electrostatic charge variation sensor, an electrostatic charge variation signal, and detect in the electrostatic charge variation signal, first signal characteristics indicative of the presence of a subject in the environment to be monitored. The processing unit further validates the detection of presence of the subject using the vibration and pressure signals provided by the other sensors.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: January 2, 2024
    Assignee: STMicroelectronics S.r.l.
    Inventors: Enrico Rosario Alessi, Fabio Passaniti
  • Patent number: 11860223
    Abstract: A radio-frequency receiver includes built-in-self-test (BIST) circuitry which generates a self-test signal. A local oscillator signal is divided. A self-test oscillation signal is generated, based, at least in part, on the frequency-divided local oscillation signal. The self-test signal is generated based on the self-test oscillation signal. The BIST circuitry includes a divider, which divides the self-test oscillation signal. The frequency-divided local oscillation signal and the divided self-test oscillation signal are used to perform one or more of generating the self-test oscillation signal and controlling the generation of the self-test oscillation signal. The radio-frequency receiver may be an automotive radar receiver.
    Type: Grant
    Filed: September 20, 2021
    Date of Patent: January 2, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Giorgio Maiellaro, Angelo Scuderi, Angela Bruno, Salvatore Scaccianoce
  • Patent number: 11864361
    Abstract: The device has a first support element forming a first thermal dissipation surface and carrying a first power component; a second support element forming a second thermal dissipation surface and carrying a second power component, a first contacting element superimposed to the first power component; a second contacting element superimposed to the second power component; a plurality of leads electrically coupled with the power components through the first and/or the second support elements; and a thermally conductive body arranged between the first and the second contacting elements. The first and the second support elements and the first and the second contacting elements are formed by electrically insulating and thermally conductive multilayers.
    Type: Grant
    Filed: July 21, 2020
    Date of Patent: January 2, 2024
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Cristiano Gianluca Stella, Francesco Salamone
  • Patent number: 11863066
    Abstract: A voltage supply circuit and a method for controlling a voltage supply circuit are provided. The voltage supply circuit includes a positive charge pump stage that generates a positive voltage and a negative charge pump stage that generates a negative voltage. The voltage supply circuit also includes a control stage that compares a voltage representative of the negative voltage with a reference voltage and causes a slope of the positive voltage to decrease when the voltage representative of the negative voltage exceeds the reference voltage.
    Type: Grant
    Filed: February 14, 2023
    Date of Patent: January 2, 2024
    Assignees: STMicroelectronics International N.V., STMicroelectronics S.r.l.
    Inventors: Vikas Rana, Marco Pasotti, Fabio De Santis
  • Publication number: 20230421167
    Abstract: A signal processing circuit includes a filter generating a quantizer input signal from a noise shaping input signal and a quantizer output signal. A quantizer divides the quantizer input signal by a scaling factor to produce a noise shaping output signal and multiplies the noise shaping output signal by the scaling factor to produce the quantizer output signal. Receiver circuitry scales the quantizer output signal by a second scaling factor. A dynamic range optimization circuit compares a current value of the noise shaping input signal to a threshold value, lowers or raises the scaling factor in response to the comparison, and proportionally lowers or raises the scaling factor such that a ratio between the scaling factor and second scaling factor remains substantially constant.
    Type: Application
    Filed: June 22, 2022
    Publication date: December 28, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventor: Francesco STILGENBAUER
  • Publication number: 20230421039
    Abstract: Provided is a control device is for a switching voltage regulator having a switching circuit. The control device receives input and output voltages of the switching circuit and a measurement signal indicative of a current of the switching circuit. The control device has: a feedback module that detects an error signal indicative of a difference between the output voltage and a nominal voltage, and provides a control signal as a function of the error signal; a threshold-correction module that provides offset and ramp signals; and a driving-signal generation module coupled to the feedback and threshold-correction modules, which receives the measurement signal, compares the measurement signal with a threshold and, in response, provides a modulated signal for driving the switching circuit. The threshold is a function of the control, offset and ramp signals. The threshold-correction module provides the offset signal as a function of the input or output voltages.
    Type: Application
    Filed: June 7, 2023
    Publication date: December 28, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Stefano CASTORINA, Elena BRIGO, Ivan FLORIANI
  • Publication number: 20230418559
    Abstract: A convolutional accelerator includes a feature line buffer, a kernel buffer, a multiply-accumulate cluster, and mode control circuitry. In a first mode of operation, the mode control circuitry stores feature data in a feature line buffer and stores kernel data in a kernel buffer. The data stored in the buffers is transferred to the MAC cluster of the convolutional accelerator for processing. In a second mode of operation the mode control circuitry stores feature data in the kernel buffer and stores kernel data in the feature line buffer. The data stored in the buffers is transferred to the MAC cluster of the convolutional accelerator for processing. The second mode of operation may be employed to efficiently process 1×N kernels, where N is an integer greater than or equal to 1.
    Type: Application
    Filed: June 23, 2022
    Publication date: December 28, 2023
    Applicants: STMICROELECTRONICS S.r.l., STMicroelectronics International N.V.
    Inventors: Michele ROSSI, Thomas BOESCH, Giuseppe DESOLI
  • Publication number: 20230420557
    Abstract: A power MOSFET device includes an active area accommodating a first body region and a second body region having a first and, respectively, a second conductivity value. The second value is higher than the first value. A first channel region is disposed in the first body region between a first source region and a drain region, and the first channel region has and having a first channel length. A second channel region is disposed in the second body region between a second source region and the drain region, and the second channel region has and having a second channel length smaller than the first channel length. A first device portion, having a first threshold voltage, includes the first channel region, and a second device portion, having a second threshold voltage higher than the first threshold voltage, includes the second channel region.
    Type: Application
    Filed: June 15, 2023
    Publication date: December 28, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventors: Angelo MAGRI', Stefania FORTUNA
  • Publication number: 20230418548
    Abstract: An audio device includes a gain step selection circuit that receives a different requested gain value and an associated requested step size from each of a plurality of sources, compares each requested gain value to a same feedback gain value and generates a polarity based thereupon, performs step polarization on each requested step size as a function of the generated polarity therefor to thereby generate a plurality of step values, and outputs a least of the plurality of step values as an output step value. An accumulator circuit generates a current input gain value based upon the output step value and the feedback gain value, and then updates the feedback gain value to be equal to the current input gain value. A normalizing circuit multiplies an input data value by the current input gain value and applies a truncation function to a result thereof to produce an output data value.
    Type: Application
    Filed: June 22, 2022
    Publication date: December 28, 2023
    Applicant: STMicroelectronics S.r.l.
    Inventor: Francesco STILGENBAUER
  • Publication number: 20230420341
    Abstract: A power module includes a support, a first control contact area on the support, a second control contact area on the support, a first electronic power device, a second electronic power device, a first clip, a second clip, a third clip, and a package embedding the support, the first and the second electronic power devices as well as partially the first, the second and the third clips. The first electronic power device has a first conduction pad electrically coupled to the first clip, a second conduction pad electrically coupled to the third clip, and a control pad coupled to the first control contact area. The second electronic power device has a first conduction pad electrically coupled to the third clip, a second conduction pad electrically coupled to the second clip, and a control pad coupled to the second control contact area.
    Type: Application
    Filed: June 8, 2023
    Publication date: December 28, 2023
    Applicant: STMICROELECTRONICS S.r.l.
    Inventor: Sergio SAVINO
  • Patent number: 11851319
    Abstract: A device includes: a micromechanical sensing structure configured to provide an electrical detection quantity as a function of a load; and a package enclosing the micromechanical sensing structure and providing a mechanical and electrical interface with respect to an external environment. The package includes a housing structure defining a cavity housing the micromechanical sensing structure; and a package coating that coats, at least in part, the housing structure, the package coating including a mechanical interface configured to transfer, in a uniform manner, the load on the housing structure and on the micromechanical sensing structure, wherein the housing structure includes a deformable layer interposed and in contact between the micromechanical sensing structure and the package coating, and wherein the deformable layer defines a mechanical-coupling interface.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: December 26, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Anna Angela Pomarico, Giuditta Roselli, Daniele Caltabiano, Roberto Brioschi, Mohammad Abbasi Gavarti
  • Patent number: 11855604
    Abstract: A microelectromechanical resonator device has: a main body, with a first surface and a second surface, opposite to one another along a vertical axis, and made of a first layer and a second layer, arranged on the first layer; a cap, having a respective first surface and a respective second surface, opposite to one another along the vertical axis, and coupled to the main body by bonding elements; and a piezoelectric resonator structure formed by: a mobile element, constituted by a resonator portion of the first layer, suspended in cantilever fashion with respect to an internal cavity provided in the second layer and moreover, on the opposite side, with respect to a housing cavity provided in the cap; a region of piezoelectric material, arranged on the mobile element on the first surface of the main body; and a top electrode, arranged on the region of piezoelectric material, the mobile element constituting a bottom electrode of the piezoelectric resonator structure.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: December 26, 2023
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Federico Vercesi, Lorenzo Corso, Giorgio Allegato, Gabriele Gattere
  • Patent number: 11854809
    Abstract: A manufacturing method of an electronic device includes: forming a drift layer of an N type; forming a trench in the drift layer; forming an edge-termination structure alongside the trench by implanting dopant species of a P type; and forming a depression region between the trench and the edge-termination structure by digging the drift layer. The steps of forming the depression region and the trench are carried out at the same time. The step of forming the depression region comprises patterning the drift layer to form a structural connection with the edge-termination structure having a first slope, and the step of forming the trench comprises etching the drift layer to define side walls of the trench, which have a second slope steeper than the first slope.
    Type: Grant
    Filed: December 5, 2022
    Date of Patent: December 26, 2023
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Edoardo Zanetti, Simone Rascuna', Mario Giuseppe Saggio, Alfio Guarnera, Leonardo Fragapane, Cristina Tringali
  • Patent number: 11855588
    Abstract: In an embodiment, an electronic circuit includes: an input differential pair including first and second transistors; a first pair of transistors in emitter-follower configuration including third and fourth transistors, and an output differential pair including fifth and sixth transistors. The third transistor has a control terminal coupled to the first transistor, and a current path coupled to a first output terminal. The fourth transistor has a control terminal coupled to the second transistor, and a current path coupled to a second output terminal. The fifth transistor has a control terminal coupled to the first transistor, and a first current path terminal coupled to the first output terminal. The sixth transistor has a control terminal coupled to the second transistor, and a first current path terminal coupled to the second output terminal. First and second termination resistors are coupled between the first pair of transistors and the output differential pair.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: December 26, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Edoardo Marino, Alessio Vallese, Alessio Facen, Enrico Mammei, Paolo Pulici
  • Patent number: 11852676
    Abstract: An integrated circuit includes a sub-system and a reference sub-system. The reference sub-system is substantially identical to the sub-system but is non-operating by default. The integrated circuit includes a test circuit that obtains a parameter value of the sub-system and a reference parameter from the reference sub-system. The integrated circuit detects deterioration of the sub-system based on the parameter value and the reference parameter. The integrated circuit deactivates the sub-system and activates the reference sub-system responsive to detecting deterioration of the sub-system.
    Type: Grant
    Filed: February 15, 2022
    Date of Patent: December 26, 2023
    Assignee: STMICROELECTRONICS S.R.L.
    Inventors: Carlo Caimi, Massimiliano Pesaturo, Stefano Antonio Mastrorosa, Alfredo Lorenzo Poli, Marco Della Seta
  • Patent number: 11854954
    Abstract: An integrated circuit includes a semiconductor substrate, electronic components integrated in the semiconductor substrate, an electric connection structure overlying the semiconductor substrate, and an conductive region, with elongated shaped, having a first and a second end. The conductive region is formed in the electric connection structure, extends over an entire length of the substrate and is not directly electrically connected to the electronic components. A first and a second synchronization connection element are electrically coupled to the first end and to the second end, respectively, of the conductive region and have each a respective synchronization connection portion facing the coupling face.
    Type: Grant
    Filed: January 26, 2021
    Date of Patent: December 26, 2023
    Assignee: STMicroelectronics S.r.l.
    Inventors: Angelo Scuderi, Nicola Marinelli
  • Patent number: 11855830
    Abstract: An input signal has a desired signal component and an interfering signal component superimposed thereon. Interfering component estimation processing is applied to the input signal, obtaining as a result a filtered signal comprising a sequence of filtered data samples. The filtered signal is subtracted from the input signal obtaining as a result an output signal comprising a sequence of output data samples. The interfering component estimation processing applies conjugating processing to the input signal, providing a conjugated version of the input signal. An adaptive signal processing coefficient is computed and adaptive signal processing is applied to the conjugated version of the input signal using the adaptive processing coefficient.
    Type: Grant
    Filed: December 15, 2020
    Date of Patent: December 26, 2023
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Alessandro Barbieri, Fabio Dell'Orto
  • Patent number: 11852650
    Abstract: The present disclosure is directed to micro-electromechanical system (MEMS) accelerometers that are configured for a user interface mode and a true wireless stereo (TWS) mode of an audio device. The accelerometers are fabricated with specific electromechanical parameters, such as mass, stiffness, active capacitance, and bonding pressure. As a result of the specific electromechanical parameters, the accelerometers have a resonance frequency, quality factor, sensitivity, and Brownian noise density that are suitable for both the user interface mode and the TWS mode.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: December 26, 2023
    Assignee: STMICROELECTRONICS S.r.l.
    Inventors: Francesco Rizzini, Nicolo' Manca, Cristian Dall'Oglio