Abstract: An integrated transformer includes a primary winding and a secondary winding each having a spiral planar arrangement coils. A dielectric portion of dielectric material is interposed between the primary winding and the secondary winding. A field plate winding is electrically coupled with the primary winding. The field plate winding includes at least one field plate coil having a first lateral extension greater than a second lateral extension of a primary outer coil of the primary winding. The field plate coil is superimposed in plan view to the primary outer coil of the primary winding.
Abstract: An electronic device includes a circuit integrated on a die having front and back surfaces with die terminals on the front surface. The die is embedded in a package including substrate of thermally conductive material with front and back surfaces and a through-hole. The die is sunk in the through-hole. A first insulating material layer covers the die front surface and the package front surface with first windows for accessing die terminals. Package terminals and package track are arranged on the first insulating layer. A second insulating material layer covers the first insulating layer and the package tracks with second windows for accessing the package terminals.
Type:
Application
Filed:
June 8, 2015
Publication date:
December 17, 2015
Applicant:
STMICROELECTRONICS S.R.L.
Inventors:
Fulvio Vittorio Fontana, Giovanni Graziosi
Abstract: A battery charger operates in a current regulation mode and a voltage regulation mode. A value of the voltage on the battery being charged is sensed and compared against a target voltage value. The current regulation mode is active during charging while the sensed voltage is less than the target voltage value. When the sensed voltage reaches the target voltage value, the voltage regulation mode is enabled and the current regulation mode is inhibited.
Abstract: A MEMS resonant accelerometer is disclosed, having: a proof mass coupled to a first anchoring region via a first elastic element so as to be free to move along a sensing axis in response to an external acceleration; and a first resonant element mechanically coupled to the proof mass through the first elastic element so as to be subject to a first axial stress when the proof mass moves along the sensing axis and thus to a first variation of a resonant frequency. The MEMS resonant accelerometer is further provided with a second resonant element mechanically coupled to the proof mass through a second elastic element so as to be subject to a second axial stress when the proof mass moves along the sensing axis, substantially opposite to the first axial stress, and thus to a second variation of a resonant frequency, opposite to the first variation.
Type:
Application
Filed:
July 26, 2013
Publication date:
December 17, 2015
Applicants:
Politecnico Di Milano, STMicroelectronics S.r.l.
Inventors:
Barbara Simoni, Claudia Comi, Alberto Corigliano
Abstract: A microelectromechanical gyroscope having a supporting structure; a mass capacitively coupled to the supporting structure and movable with a first degree of freedom and a second degree of freedom, in response to rotations of the supporting structure about an axis; driving components, for keeping the mass in oscillation according to the first degree of freedom; a read interface for detecting transduction signals indicating the capacitive coupling between the mass and the supporting structure; and capacitive compensation modules for modifying the capacitive coupling between the mass and the supporting structure. Calibration components detect systematic errors from the transduction signals and modify the capacitive compensation modules as a function of the transduction signals so as to attenuate the systematic errors.
Type:
Grant
Filed:
October 9, 2012
Date of Patent:
December 15, 2015
Assignee:
STMICROELECTRONICS S.R.L.
Inventors:
Andrea Donadel, Tommaso Ungaretti, Carlo Caminada, Luciano Prandi
Abstract: A testing system for carrying out electrical testing of at least one first through via forms an insulated via structure extending only part way through a substrate of a first body of semiconductor material. The testing system has a first electrical test circuit integrated in the first body and electrically coupled to the insulated via structure. The first electrical test circuit enables detection of at least one electrical parameter of the insulated via structure.
Abstract: A differentiator generates a time derivative signal from a time-variable signal. A transconductance amplifier generates a biasing control signal as a function of the time derivative signal. A supply network functions to supply the differentiator and transconductance amplifier. The supply network is driven by the biasing control signal output from the transconductance amplifier. With this configuration, speed of operation of the differentiator and transconductance amplifier vary with the supply provided by the supply network, and the supply is modulated as a function of the received time-variable signal.
Abstract: A control device for a rectifier of a switching converter that includes a rectifier with at least one MOS transistor and a control device that is configured to generate a turn on and off signal for the at least one transistor. The control device also includes a measuring circuit to measure the conduction time of the body diode of the at least one transistor during each converter switching half-cycle. The control device is configured to, cycle by cycle: verify if the drain-source voltage of the at least one transistor is greater or less than a voltage threshold, and if the drain-source voltage is greater than the voltage threshold to turn off the at least one transistor, measure the conduction time of the body diode and increase the voltage threshold by a quantity in the next switching cycle.
Abstract: An embodiment of array of Geiger-mode avalanche photodiodes, wherein each photodiode is formed by a body of semiconductor material, having a first conductivity type and housing an anode region, of a second conductivity type, facing a top surface of the body, a cathode-contact region, having the first conductivity type and a higher doping level than the body, facing a bottom surface of the body, an insulation region extending through the body and insulating an active area from the rest of the body, the active area housing the anode region and the cathode-contact region. The insulation region is formed by a first mirror region of polycrystalline silicon, a second mirror region of metal material, and a channel-stopper region of dielectric material, surrounding the first and second mirror regions.
Type:
Grant
Filed:
May 19, 2014
Date of Patent:
December 8, 2015
Assignee:
STMICROELECTRONICS S.R.L.
Inventors:
Delfo Nunziato Sanfilippo, Piero Giorgio Fallica
Abstract: An integrated magnetic sensor formed by a semiconductor chip having a surface and accommodating a magnetic via and a sensing coil. The magnetic via is formed by a cylindrical layer of ferromagnetic material that extends perpendicular to the surface of the first chip and has in cross-section an annular shape of a circular or elliptical or curvilinear type. The sensing coil surrounds the magnetic via at a distance and is connected to an electronic circuit.
Abstract: A spectrometer including: a photodiode having a depleted region and generating an electrical detection signal indicating instants of detection of optical pulses; a converter generating an electrical delay signal, indicating delays between the instants of detection and corresponding instants of emission of the optical pulses; a memory, storing a theoretical function corresponding to the probability of triggering an avalanche by a charge carrier generated in the depleted region; and a computing stage which determines a statistical distribution of the delays between the instants of detection and the corresponding instants of emission; selects a Gaussian portion of the statistical distribution; calculates the ratio between the sum of the number of delays of the Gaussian portion and the sum of the number of delays of the statistical distribution; and determines an estimate of the wavelength of the optical pulses on the basis of the theoretical function and of the sample value.
Abstract: An integrated electronic device, delimited by a first surface and by a second surface and including: a body made of semiconductor material, formed inside which is at least one optoelectronic component chosen between a detector and an emitter; and an optical path which is at least in part of a guided type and extends between the first surface and the second surface, the optical path traversing the body. The optoelectronic component is optically coupled, through the optical path, to a first portion of free space and a second portion of free space, which are arranged, respectively, above and underneath the first and second surfaces.
Type:
Grant
Filed:
July 2, 2013
Date of Patent:
December 1, 2015
Assignee:
STMicroelectronics S.r.l.
Inventors:
Alberto Pagani, Alessandro Motta, Sara Loi
Abstract: A detection circuit is provided with a differential capacitive sensor and with an interface circuit having a first sense input and a second sense input, electrically connected to the differential capacitive sensor. Provided in the interface circuit are: a sense amplifier connected at input to the first sense input and to the second sense input and supplying an output signal related to a capacitive unbalancing of the differential capacitive sensor; and a common-mode control circuit, connected to the first sense input and to the second sense input and configured to control a common-mode electrical quantity present on the first sense input and on the second sense input. The common-mode control circuit is of a totally passive type and is provided with a capacitive circuit, which is substantially identical to an equivalent electrical circuit of the differential capacitive sensor and is driven with a driving signal in phase opposition with respect to a read signal supplied to the differential capacitive sensor.
Abstract: A current sensor includes input modules each including an amplifier having a first input coupled to a respective winding of a regulator; a transistor having a control input coupled to the amplifier output, a first terminal coupled to a second input of the operational amplifier, and a second terminal configured to provide a sense current representing an unbalance of a phase current with respect to an average current of a winding; a current generator configured to bias the transistor; and an output resistor coupling the first terminal to an intermediate node. An output stage includes an output amplifier having a first input coupled to the intermediate node, and an output transistor having a control terminal coupled to the output amplifier output, a first terminal coupled to a second input of the output amplifier, and a second terminal providing another sense current representing a total current of the regulator.
Abstract: A system for designing Network-on-Chip interconnect arrangements includes a Network-on-Chip backbone with a plurality of backbone ports and a set of functional clusters of aggregated IPs providing respective sets of System-on-Chip functions. The functional clusters include respective sub-networks attachable to any of the backbone ports and to any other functional cluster in the set of functional clusters independently of the source map of the Network-on-Chip backbone.
Abstract: One embodiment is a method for selecting and grouping key points extracted by applying a feature detector on a scene being analyzed. The method includes grouping the extracted key points into clusters that enforce a geometric relation between members of a cluster, scoring and sorting the clusters, identifying and discarding clusters that are comprised of points which represent the background noise of the image, and sub-sampling the remaining clusters to provide a smaller number of key points for the scene.
Type:
Grant
Filed:
February 7, 2013
Date of Patent:
December 1, 2015
Assignee:
STMicroelectronics S.r.l.
Inventors:
Paolo Pasteris, Giovanni Condello, Danilo Pietro Pau
Abstract: A power device includes a chip of semiconductor material and a further chip of semiconductor material on each of which at least one power transistor is integrated; each chip comprises a first conduction terminal on a first surface, and a second conduction terminal and a control terminal on a second surface opposite the first surface, and an insulating body embedding said chip and said further chip. In the solution according to one or more embodiments of the present disclosure, the first surface of said chip faces the second surface of said further chip, and the power device further comprises a first heat-sink arranged between said chip and said further chip and electrically coupled with the first conduction terminal of said chip and with the second conduction terminal of said further chip, the control terminal of said further chip being electrically insulated from the first heat-sink.
Type:
Grant
Filed:
April 26, 2013
Date of Patent:
December 1, 2015
Assignee:
STMicroelectronics S.r.l.
Inventors:
Cristiano Gianluca Stella, Gaetano Pignataro, Maurizio Maria Ferrara
Abstract: An electronic communications device includes a body of semiconductor material with an integrated electronic circuit, an inductive element, and a capacitive element. The capacitive element is formed by a first electrode and a second electrode positioned between the inductive element and the integrated electronic circuit. Tuning of the device circuitry is accomplished by energizing the inductive/capacitive elements, determining resonance frequency, and using a laser trimming operation to alter the structure of one or more of the first electrode, second electrode or inductive element and change the resonance frequency.
Type:
Application
Filed:
August 4, 2015
Publication date:
November 26, 2015
Applicant:
STMicroelectronics S.r.l.
Inventors:
Alberto Pagani, Allesandro Finocchiaro, Giovanni Girlando
Abstract: An embodiment of an IGBT device is integrated in a chip of semiconductor material including a substrate of a first type of conductivity, an active layer of a second type of conductivity formed on an inner surface of the substrate, a body region of the first type of conductivity extending within the active layer from a front surface thereof opposite the inner surface, a source region of the second type of conductivity extending within the body region from the front surface, a channel region being defined within the body region between the source region and the active layer, a gate element insulated from the front surface extending over the channel region, a collector terminal contacting the substrate on a rear surface thereof opposite the inner surface, an emitter terminal contacting the source region and the body region on the front surface, and a gate terminal contacting the gate element.
Abstract: A system and corresponding method determines a macroblock partition to transcode digital data from a first video standard to a second video standard with any spatial resolution. The system includes a processing module and an encoding module. The processing module processes digital data to determine a macroblock partition. The encoding module is coupled to the processing module for encoding the digital data based on the macroblock partition. The system is further coupled to a decoding module for receiving the digital data. The method determines the partition of a macroblock for transcoding digital data with any spatial resolution and without any motion estimation.
Type:
Grant
Filed:
October 16, 2008
Date of Patent:
November 24, 2015
Assignees:
STMICROELECTRONICS S.R.L., STMICROELECTRONICS INTERNATIONAL N.V.
Inventors:
Subarna Tripathi, Kaushik Saha, Emiliana Mario Picinelli