Abstract: The present disclosure concerns an integrated circuit comprising a substrate, the substrate comprising a first region having a first thickness and a second region having a second thickness smaller than the first thickness, the circuit comprising a three-dimensional capacitor formed inside and on top of the first region, and at least first and second connection terminals formed on the second region, the first and second connection terminals being respectively connected to first and second electrodes of the three-dimensional capacitor.

Abstract: A protection device includes a first inductive element connecting first and second terminals and a second inductive element connecting third and fourth terminals. A first component includes a first avalanche diode connected in parallel with a first diode string, anodes of the first avalanche diode and a last diode in the string being connected to ground, cathodes of the first avalanche diode and a first diode in the string being connected, and a tap of the first diode string being connected to the first terminal. A second protection component includes a second avalanche diode connected in parallel with a second diode string, anodes of the second avalanche diode and a last diode in the string being connected to ground, cathodes of the second avalanche diode and a first diode in the string being connected, and a tap of the second diode string being connected to the third terminal.

Abstract: A method for manufacturing electronic chips includes forming, on a side of an upper face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed, trenches laterally separating the integrated circuits. At least one metal connection pillar per integrated circuit is deposited on the side of the upper face of the substrate, and a protective resin extends in the trenches and on an upper face of the integrated circuits. The method further includes forming, from an upper face of the protective resin, openings located across from the trenches and extending over a width greater than or equal to that of the trenches, so as to clear a flank of at least one metal pillar of each integrated circuit. The integrated circuits are separated into individual chips by cutting.

Abstract: A power supply interface includes a first switch that couples an input terminal to an output terminal. A voltage dividing bridge is coupled to receive a supply potential. A comparator has a first input connected to a first node of the bridge and a second input configured to receive a constant potential. A digital-to-analog converter generates a control voltage that is selectively coupled by a second switch to a second node of the bridge. A circuit control controls actuation of the second switch based on operating mode and generates a digital value input to the converter based on a negotiated set point of the supply potential applied to the input terminal.

Abstract: A method for manufacturing electronic chips includes depositing, on a side of an upper face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed, a protective resin. The method includes forming, in the protective resin, at least one cavity per integrated circuit, in contact with an upper face of the integrated circuit. Metal connection pillars are formed by filling the cavities with metal. The integrated circuits are separated into individual chips by cutting the protective resin along cut lines extending between the metal connection pillars.

Abstract: The disclosure relates to microbattery devices and assemblies. In an embodiment, a device includes a plurality of microbatteries, a first flexible encapsulation film, and a second flexible encapsulation film. Each of the microbatteries includes a first contact terminal and a second contact terminal spaced apart from one another. The first flexible encapsulation film includes a first conductive layer electrically coupled to the first contact terminal of each of the microbatteries, and a first insulating layer on the first conductive layer. The second flexible encapsulation film includes a second conductive layer electrically coupled to the second contact terminal of each of the microbatteries, and a second insulating layer on the second conductive layer.

Abstract: A vertical capacitor includes a stack of layers conformally covering walls of a first material. The walls extend from a substrate made of a second material different from the first material.

Abstract: A device includes a diode. The anode of the diode includes first, second, and third areas. The first area partially covers the second area and has a first doping level greater than a second doping level of the second area. The second area partially covers the third area and has the second doping level greater than a third doping level of the third area. A first insulating layer partially overlaps the first and second areas.

Abstract: Methods and devices for protecting against electrical discharges are provided. One such device for protecting against electrical discharges includes a semiconductor substrate and an isolation trench in the semiconductor substrate. The isolation trench includes an enclosed space that contains a gas.

Abstract: A voltage converter includes a circuit formed by a parallel association, connected between first and second nodes, of a first branch and a second branch. The first branch includes a first controlled rectifying element having a first impedance. The second branch includes a resistor associated in series with a second rectifying element having a second impedance substantially equal to the first impedance. The second rectifying element may, for example, be a triac having its gate coupled to receive a signal from an intermediate node in the series association of the second branch. Alternatively, the second rectifying element may be a thyristor having its gate coupled to receive a signal at the anode of the thyristor.

Abstract: The disclosure concerns a battery assembly including two batteries having their active layers facing each other and sharing an encapsulation layer.

Abstract: The present description concerns a capacitor manufacturing method, including the successive steps of: a) forming a stack including, in the order from the upper surface of a substrate, a first conductive layer made of aluminum or an aluminum-based alloy, a first electrode, a first dielectric layer, and a second electrode; b) etching, by chemical plasma etching, an upper portion of the stack, said chemical plasma etching being interrupted before the upper surface of the first conductive layer; and c) etching, by physical plasma etching, a lower portion of the stack, said physical plasma etching being interrupted on the upper surface of the first conductive layer.

Abstract: ESD protection devices and methods are provided. In at least one embodiment, a device includes a first stack that forms a Zener diode. The first stack includes a substrate of a first conductivity type having a first region of a second conductivity type located therein. The first area is flush with a surface of the substrate. A second stack forms a diode and is located on and in contact with the surface of the substrate. The second stack includes a first layer of the second conductivity type having a second region of the first conductivity type located therein. The second area is flush, opposite the first stack, with the surface of the first layer. A third stack includes at least a second layer made of an oxygen-doped material, on and in contact with the second stack.

Abstract: A thyristor is formed from a vertical stack of first, second, third, and fourth semiconductor regions of alternated conductivity types. The fourth semiconductor region is interrupted in a gate area of the thyristor. The fourth semiconductor region is further interrupted in a continuous corridor that extends longitudinally from the gate area towards an outer lateral edge of the fourth semiconductor region. A gate metal layer extends over the gate area of the thyristor. A cathode metal layer extends over the fourth semiconductor region but not over the continuous corridor.

Abstract: A voltage converter delivers an output voltage between a first and a second node. The voltage converter includes a capacitor series-coupled with a resistor between the first and second nodes. The resistor is coupled in parallel with a bidirectional switch receiving at its control terminal a positive bias voltage referenced to the second node.

Abstract: The present disclosure concerns an integrated circuit comprising a substrate, the substrate comprising a first region having a first thickness and a second region having a second thickness smaller than the first thickness, the circuit comprising a three-dimensional capacitor formed inside and on top of the first region, and at least first and second connection terminals formed on the second region, the first and second connection terminals being respectively connected to first and second electrodes of the three-dimensional capacitor.

Abstract: An electronic component includes first and second separate semiconductor regions. A third semiconductor region is arranged under and between the first and second semiconductor regions. The first and third semiconductor regions define electrodes of a first diode. The second and third semiconductor regions define electrodes of a second diode. The first diode is an avalanche diode.

Abstract: An electronic device includes a base substrate with a mica substrate thereon. A top face of the mica substrate has a surface area smaller than a surface area of a top face of the base substrate. An active battery layer is on the mica substrate and has a top face with a surface area smaller than a surface area of a top face of the mica substrate. An adhesive layer is over the active battery layer, mica substrate, and base substrate. An aluminum film layer is over the adhesive layer, and an insulating polyethylene terephthalate (PET) layer is over the aluminum film layer. A battery pad is on the mica substrate adjacent the active battery layer, and a conductive via extends to the battery pad. A conductive pad is connected to the conductive via. The adhesive, aluminum film, and PET have a hole defined therein exposing the conductive pad.

Abstract: The present disclosure relates to a structure comprising, in a trench of a substrate, a first conductive region separated from the substrate by a first distance shorter than approximately 10 nm; and a second conductive region extending deeper than the first region.

Abstract: A device of protection against electrostatic discharges is formed in a semiconductor substrate of a first conductivity type that is coated with a semiconductor layer of a second conductivity type. A buried region of the second conductivity type is positioned at an interface between the semiconductor substrate and the semiconductor layer. First and second wells of the first conductivity type are formed in the semiconductor layer and a region of the second conductivity type is formed in the second well. A stop channel region of the second conductivity type is provided in the semiconductor layer to laterally separating the first well from the second well, where no contact is present between this stop channel region and either of the first and second wells.