Patents Assigned to STMicroelectronics
  • Photodiode with interfacial charge control and associated process
    Patent number: 8410570
    Abstract: A photodiode includes a first doped layer and a second doped layer that share a common face. A deep isolation trench has a face contiguous with the first and second doped layers. A conducting layer is in contact with a free face of the second doped layer. A protective layer is provided at an interface with the first doped layer and second doped layer. This protective layer is capable of generating a layer of negative charge at the interface. The protective layer may further be positioned within the second doped layer to form an intermediate protective structure.
    Type: Grant
    Filed: May 17, 2010
    Date of Patent: April 2, 2013
    Assignees: STMicroelectronics S.A., STMicroelectronics (Crolles 2) SAS
    Inventors: Jorge Regolini, Michael Gros-Jean
  • Control device for a system-on-chip and corresponding method
    Patent number: 8412795
    Abstract: A system such as a “System-on-Chip” includes an interconnection network, a set of initiator modules for transmitting data towards the interconnection network and at least one communication arbiter for deciding, as a function of a set of configuration values, which transmissions of the initiator modules have access to the interconnection network. At least one configuration value is associated with each initiator module. A control device coupled to at least one of the initiator modules detects a communication status associated with the transmissions of the coupled initiator and generates a communication status signal whose value is representative of such status, determines a filtered value representative of a series of the values of the communication status signal, and selectively varies one of the configuration values as a function of the filtered value.
    Type: Grant
    Filed: April 13, 2010
    Date of Patent: April 2, 2013
    Assignee: STMicroelectronics S.r.l.
    Inventors: Daniele Mangano, Giuseppe Falconeri, Giovanni Strani
  • Method for manufacturing semiconductor chips from a semiconductor wafer
    Patent number: 8409967
    Abstract: A method for manufacturing semiconductor chips from a semiconductor wafer, including the steps of: fastening, on a first support frame, a second support frame having outer dimensions smaller than the outer dimensions of the first frame and greater than the inner dimensions of the first frame; arranging the wafer on a surface of a film stretched on the second frame; carrying out wafer processing operations by using equipment capable of receiving the first frame; separating the second frame from the first frame and removing the first frame; and carrying out wafer processing operations by using equipment capable of receiving the second frame.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: April 2, 2013
    Assignee: STMicroelectronics (Tours) SAS
    Inventors: Vincent Jarry, Patrick Hougron, Dominique Touzet, José Mendez
  • High jitter and frequency drift tolerant clock data recovery
    Patent number: 8411811
    Abstract: In a method for recovery of a clock from a received digital data stream and an apparatus for recovering a clock from a received digital data stream, phase-shifted clock signals are generated from a receiver's clock. After selecting one of the phase-shifted clock signals, two other phase-shifted clock signals are determined. Depending on sample values taken at rising/falling edges of the three selected phase-shifted clock signals, counter values are increased and compared. The selection of phase-shifted clock signals and the steps of sampling the input digital data stream, comparing the values and increasing counter values, if required, are repeatedly performed until the comparison result of the counter values indicates that one of the latter determined phase-shifted clock signals strobes the received digital data stream in the center of a bit period.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: April 2, 2013
    Assignee: STMicroelectronics Pvt. Ltd.
    Inventor: Nitin Gupta
  • Memory device with boost compensation
    Patent number: 8411518
    Abstract: A memory circuit includes a memory cell configured to be re-writable. A write enable circuit is configured to enable writing a signal via a pair of bit lines to the memory cell depending on a write signal. A charge supply circuit is configured to supply a charge to at least one of the pair of bit lines. A charge supply controller is configured to control the charge supply circuit to supply the charge dependent on at least one of the temperature of the memory circuit and the potential difference supply of the memory circuit.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: April 2, 2013
    Assignee: STMicroelectronics Pvt. Ltd.
    Inventors: Dhori Kedar Janardan, Rakesh Kumar Sinha, Sachin Gulyani
  • Frame-based, on-demand spectrum contention source resolution
    Patent number: 8411630
    Abstract: A method and system by which a base station in a Wireless Regional Area Network (WRAN), and more generally a transceiver in a cognitive radio (CR) system, can communicate with other transceivers to fairly share transmission and reception of scheduled use (“occupancy”) of frames on a single channel within a frame-based, on demand spectrum contention system. The method and system disclose how the base station can initiate contentions for an increased share of the frames available in the following superframe of the CR system. The method and system assure fair and efficient access to the transmission channel by a random number based contention process.
    Type: Grant
    Filed: March 10, 2010
    Date of Patent: April 2, 2013
    Assignee: STMicroelectronics, Inc.
    Inventor: Wendong Hu
  • Method of generating electrical energy in an integrated circuit, corresponding integrated circuit and method of fabrication
    Patent number: 8410661
    Abstract: A method of generating electrical energy in an integrated circuit that may include setting into motion a (3D) three-dimensional enclosed space in the integrated circuit. The 3D enclosed space may include a piezoelectric element and a free moving object therein. The method may also include producing the electrical energy from impact between the free moving object and the piezoelectric element during the motion.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: April 2, 2013
    Assignees: STMicroelectronics (Rousset) SAS, Universite Aix-Marseille 1 Provence
    Inventors: Christian Schwarz, Christophe Monserie, Julien Delalleau
  • Error-locator-polynomial generation with erasure support
    Patent number: 8413023
    Abstract: A system and method for correcting errors in an ECC block using erasure-identification data when generating an error-locator polynomial. In an embodiment, a ECC decoding method, uses “erasure” data indicative of bits of data that are unable to be deciphered by a decoder. Such a method may use an Berlekamp-Massey algorithm that receives two polynomials as inputs; a first polynomial indicative of erasure location in the stream of bits and a syndrome polynomial indicative of all bits as initially determined. The Berlekamp-Massey algorithm may use the erasure identification information to more easily decipher the overall codeword when faced with a error-filled codeword.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: April 2, 2013
    Assignee: STMicroelectronics, Inc.
    Inventors: Vincent Brendan Ashe, Hakan C. Ozdemir, Razmik Karabed, Richard Barndt
  • Programmable pulse width discriminator
    Patent number: 8410819
    Abstract: Disclosed is a programmable pulse width discriminator circuit operable to receive a set of parameters from a user and indicate when an input signal satisfies conditions set by the user-defined parameters. The input signal is sampled by the pulse width discriminator circuit to detect a desired state of the input signal. The user may set the parameters such that the pulse width discriminator indicates the condition wherein the number of consecutive samples for which the input signal is the desired state is (i) greater than a first threshold value, (ii) less than a second threshold value, or (iii) between the first and second threshold values. In these embodiments, the user sets the first and second threshold values and selects which set of conditions are indicated by the output of the circuit.
    Type: Grant
    Filed: December 29, 2010
    Date of Patent: April 2, 2013
    Assignee: STMicroelectronics, Inc.
    Inventor: Vincent Himpe
  • Electrical fuse device based on a phase-change memory element and corresponding programming method
    Patent number: 8410527
    Abstract: A fuse device has a fuse element provided with a first terminal and a second terminal and an electrically breakable region, which is arranged between the first terminal and the second terminal and is configured to undergo breaking as a result of the supply of a programming electrical quantity, thus electrically separating the first terminal from the second terminal. The electrically breakable region is of a phase-change material, in particular a chalcogenic material, for example GST.
    Type: Grant
    Filed: August 17, 2011
    Date of Patent: April 2, 2013
    Assignee: STMicroelectronics S.r.l.
    Inventors: Fabio Pellizzer, Innocenzo Tortorelli, Agostino Pirovano, Roberto Bez
  • Method for designing masks used to form electronic components
    Patent number: 8413082
    Abstract: A method for designing masks adapted to the forming of integrated circuits, including the steps of: (a) forming a first test file including a set of configurations of integrated circuit elements; (b) forming a second test file comprising the elements of the first test file, less the elements corresponding to configurations forbidden by design rule manuals; (c) trans-forming the second test file by means of a set of logical operations implemented by computing means to obtain a mask file; (d) testing the mask file and, if the test is negative, modifying the design rule manuals; and (e) repeating steps (a) to (d) until the test of step (d) is positive.
    Type: Grant
    Filed: May 27, 2011
    Date of Patent: April 2, 2013
    Assignee: STMicroelectronics (Rousset) SAS
    Inventor: Julia Castellan
  • METHOD FOR PROTECTION OF A LAYER OF A VERTICAL STACK AND CORRESPONDING DEVICE
    Publication number: 20130075870
    Abstract: A device and corresponding fabrication method includes a vertical stack having an intermediate layer between a lower region and an upper region. The intermediate layer is extended by a protection layer. The vertical stack has a free lateral face on which the lower region, the upper region and the protection layer are exposed.
    Type: Application
    Filed: September 19, 2012
    Publication date: March 28, 2013
    Applicants: STMicroelectronics SA, STMicroelectronics (Crolles 2) SAS
    Inventors: STMicoelectronics (Crolles 2) SAS, STMicroelectronics SA,
  • OPTIMIZATION OF THE PROCESSING SPEED OF AN ELECTROMAGNETIC TRANSPONDER
    Publication number: 20130080810
    Abstract: A method for setting the clock frequency of a processing unit of an electromagnetic transponder, wherein a ratio between data, representative of a voltage across an oscillating circuit of the transponder and obtained for two values of the resistive load, is compared with one to decide whether to increase or decrease the clock frequency of the processing unit.
    Type: Application
    Filed: September 13, 2012
    Publication date: March 28, 2013
    Applicant: STMicroelectronics (Rousset) SAS
    Inventor: Luc Wuidart
  • Active impedance synthesis circuit, for example for XDSL splitters
    Patent number: 8406391
    Abstract: An arrangement includes a transformer having a primary winding and a secondary winding, the transformer exhibiting an impedance across the primary winding, and an impedance synthesis circuit. The impedance synthesis circuit includes a transfer function element having a frequency spectrum. The transfer function element has associated a gain element and a current source controlled by the transfer function element. The impedance synthesis circuit is connected to said secondary winding, so that the transformer mirrors the impedance synthesized by the impedance synthesis circuit into the impedance across said primary winding. The primary winding is adapted to define the high voltage side of an XDSL splitter, while the impedance synthesis circuit connected to the secondary winding is inherently a low voltage circuit.
    Type: Grant
    Filed: June 22, 2006
    Date of Patent: March 26, 2013
    Assignee: STMicroelectronics S.r.l.
    Inventors: Davide Maschera, Daniele Dario
  • Rendering method of an edge of a graphics primitive
    Patent number: 8406551
    Abstract: A method for rendering an edge of a graphics primitive to be displayed on a screen. Such edge has an inclination relative to a reference direction of the screen. The method includes the steps of: calculating, based on the inclination of the edge, an error coefficient representative of the distance of the edge from a center of a pixel of the screen; and associating a transparency coefficient to the pixel, based on the calculated error coefficient.
    Type: Grant
    Filed: May 18, 2010
    Date of Patent: March 26, 2013
    Assignee: STMicroelectronics S.r.l.
    Inventor: Andrea Castelnuovo
  • MEMS packaging scheme using dielectric fence
    Patent number: 8405202
    Abstract: A packaging scheme for MEMS device is provided. A method of packaging MEMS device in a semiconductor structure includes forming an insulation fence that surrounds the MEMS device on the semiconductor structure. The method further includes attaching a wafer of dielectric material to the insulation fence. The lid wafer, the insulation fence, and the semiconductor structure enclose the MEMS device.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: March 26, 2013
    Assignee: STMicroelectronics, Inc.
    Inventors: Venkatesh Mohanakrishnaswamy, Loi N. Nguyen, Venkata Ramana Yogi Mallela
  • Compressor control device and method for controlling a compressor
    Patent number: 8403648
    Abstract: A compressor control device includes a driving circuit, for controllably supplying a coil of an electric motor of a compressor. A temperature sensor is thermally coupled to the driving circuit and provides a temperature sensing signal correlated to a temperature in the driving circuit. A control stage, coupled to the driving circuit and to the temperature sensor, selectively prevents the driving circuit from supplying the coil, in response to a minimum temperature increment being detected by the temperature sensor within a pre-determined control time window.
    Type: Grant
    Filed: January 18, 2008
    Date of Patent: March 26, 2013
    Assignee: STMicroelectronics Design and Application s.r.o.
    Inventor: Albert Boscarato
  • Thermoelectric device
    Patent number: 8404959
    Abstract: A thermoelectric device includes a plurality of thin-film thermoelectric elements. Each thin-film thermoelectric element is a Seebeck-Peltier device. The thin-film thermoelectric elements are electrically coupled in parallel with each other. The thermoelectric device may be fabricated using conventional semiconductor processing technologies and may be a thin-film type device.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: March 26, 2013
    Assignee: STMicroelectronics, Inc.
    Inventor: William B. Donley
  • Low-complexity soft-decision decoding of error-correction codes
    Patent number: 8407563
    Abstract: A system and method for correcting errors in an ECC block using soft-decision data. In an embodiment, a soft-decision ECC decoding method, uses “soft” data indicative of how reliable bits of data are when read out. Such reliability information may be used to identify particular symbols with a higher likelihood of error such that these symbols may be changed in an attempt to reduce the total number of errors in the data. In an embodiment, a soft-decision ECC decoding path may include a reliability checker operable to receive bits of data read from a data store and operable to associate a reliability factor with each bit of data. Then, an update module may iteratively change bits or groups of bits based upon an ordering of the reliability factors.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: March 26, 2013
    Assignee: STMicroelectronics, Inc.
    Inventors: Razmik Karabed, Hakan C. Ozdemir, Vincent Brendan Ashe, Richard Barndt
  • Fluorescent lamp assembly having multiple settings and method
    Patent number: RE44101
    Abstract: A fluorescent lamp assembly includes a fluorescent lamp ballast capable of detecting at least one of a plurality of input signals and generating an output signal. The output signal is associated with a power level that is based on the at least one detected input signal. The fluorescent lamp assembly also includes a fluorescent lamp capable of receiving the output signal and generating light. An intensity of the light is based on the power level associated with the output signal.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: March 26, 2013
    Assignee: STMicroelectronics, Inc.
    Inventor: Thomas L. Hopkins