Abstract: A method for protecting, against laser attacks, an integrated circuit chip formed inside and on top of a semiconductor substrate and including in the upper portion of the substrate an active portion in which are formed components, this method including the steps of: forming in the substrate a gettering area extending under the active portion, the upper limit of the area being at a depth ranging between 5 and 50 ?m from the upper surface of the substrate; and introducing diffusing metal impurities into the substrate.

Abstract: A method of adjustment on manufacturing of a monolithic oscillator including circuit elements and a BAW resonator, this method including the steps of: a) forming the circuit elements and the resonator and electrically connecting them; b) covering the resonator with a frequency adjustment layer; c) measuring the output frequency of the oscillator; d) modifying the thickness of the frequency adjustment layer to modify the output frequency of the oscillator.

Abstract: An embodiment of a memory device includes a plurality of memory cells; each memory cell includes a latch adapted to store an information bit. Said latch includes a first logic gate including a first input terminal and a first output terminal and a second logic gate including a second input terminal and a second output terminal. Said first input terminal is connected to said second output terminal and said first output terminal is connected to said second input terminal. The memory device further includes reading and writing means adapted to perform a read operation or a write operation of the information bit. Said first logic gate includes a pull-up branch coupled between a terminal for providing a supply voltage and the first output terminal, and a pull-down branch coupled between the first output terminal and a terminal for providing a reference voltage.

Abstract: A pulse width modulated current control method and system architecture may achieve the high performance of an advanced current control for full-bridge stages, in terms of accuracy, error, speed, and frequency response, but with a reduced complexity in terms of used analog circuits, being comparable with that of an elementary peak current control. The only analog blocks used may be a current sense transducer, i.e. a series resistor or a sense-FET, and a comparator for the current sensing while the rest of the control circuitry is digital.

Abstract: A transmitter for generating, starting from a data-packet traffic at input, flows of information to be conveyed via optical signals with different wavelengths towards a plurality of targets in a communications network, the transmitter including: a destination decoder to identify, for each packet in the input packet traffic, a respective destination target in the plurality of targets; a plurality of emitter modules operating at different wavelengths for converting the electrical signals into optical signals; and a de-multiplexer, which is controlled by the destination decoder and is able to drive the emitter modules by sending selectively to each emitter module the electrical signals corresponding to a given packet of the input packet traffic according to the respective destination target identified by the destination decoder. A serialization module is set upstream of the de-multiplexer for converting the packet traffic into a serial flow of bits.

Abstract: The invention relates to a method of determining a zero-bias error of a gyroscope, an apparatus for determining a zero-bias error of a gyroscope and a system including the apparatus. The method includes the steps of: a. obtaining a set of outputs of the gyroscope; b. determining a dispersion degree of the outputs; c. determining whether the dispersion degree satisfies a predetermined condition and performing the step of d or e based upon a result of the determination; and d. determining an average of the outputs as the zero-bias error of the gyroscope when the dispersion degree satisfies the predetermined condition; or e. obtaining another set of outputs of the gyroscope and repeating performing the steps of b to c on the another set of outputs when the dispersion degree does not satisfy the predetermined condition.

Abstract: A system may monitor a vibration isolating connection between a first part and a second part. The system may include a light source, an optical sensor mounted to receive light from the light source, and a processing unit for providing an output indicative of the deformation of the vibration isolating connection based on the output of the optical sensor.

Abstract: An optical navigation device may have an adaptive sleep mode for preventing unwanted scrolling inputs. A motion indicator may move a device between a sleep mode and an active mode. According to the sleep mode, a number of different sleep states are defined which have further reduced frame rates. The device may be only woken from the deeper sleep modes once repeated motion events are detected. This may prevent the device from being woken accidentally, while preserving the user experience.

Abstract: An integrated circuit on a semiconductor substrate has logic gates comprising FDSOI-type transistors made on said substrate, including at least one first transistor comprising a gate with a first work function, and including a transistor comprising a second work function, a memory including memory cells, each memory cell comprising FDSOI type transistors, including at least one third nMOS transistor with a gate presenting a third work function, the third transistor comprising a buried insulating layer and a ground plane at least one fourth pMOS transistor with a gate presenting said third work function, the fourth transistor comprising a buried insulating layer and a ground plane, the ground planes of the third and fourth transistors being made in a same well separating these ground planes from said substrate.

Abstract: A circuit including an initiator of a transaction, an interconnect, and a controller. The controller is configured in response to a condition in a least one first part of the circuit to send a notification via the interconnect to at least one block in a second part of the circuit. The notification includes information about the condition in the first part of the circuit, the condition preventing a response to the transaction from being received by the initiator.

Abstract: An embodiment of a method for reducing chroma noise in digital image data and of a corresponding image processor. Chrominance components are subjected to low-pass filtering. The strength of the low-pass filtering is modulated in accordance with the dynamic range of the luminance signal and the dynamic range of each of the two chrominance signals in order to avoid color bleeding at image-object edges. Moreover, the low-pass filtering is selectively applied to pixels with similar luminance and chrominance values only. A combination of down-sampling and up-sampling units is employed so that comparatively small filter kernels may be used for removing chroma noise with low spatial frequency.

Abstract: A method that includes forming a first level of active circuitry on a substrate, forming a first probe pad electrically connected to the first level of active circuitry where the first probe pad having a first surface, contacting the first probe pad with a probe tip that displaces a portion of the first probe pad above the first surface, and performing a chemical mechanical polish on the first probe pad to planarize the portion of the first probe pad above the first surface. The method also includes forming a second level of active circuitry overlying the first probe pad, forming a second probe pad electrically connected to the second level of active circuitry, contacting the second probe pad with a probe tip that displaces a portion of the probe pad, and chemically mechanically polishing the second probe pad to remove the portion displaced.

Abstract: An embodiment of a method for channel estimation for an Orthogonal Frequency Division Multiplexing communication system, including estimating a Time Domain Least Squares channel impulse response having a given maximum number of L taps based on a channel covariance matrix Q, and for each tap l=1, . . . , L a respective channel impulse response in the time-domain ?l, wherein the channel impulse responses in the time-domain are grouped as a channel impulse response vector in the time domain ?. Specifically, an updated channel-impulse-response vector in the time domain {tilde over (h)} is determined by computing for each tap l the solution of the following system: Q1:l, 1:l{tilde over (h)}l×1=?1:l, wherein the updated channel-impulse-response vector in the time domain {tilde over (h)} is computed recursively via a Levinson Durbin algorithm.

Abstract: A transmission band of an analog signal including successive symbols to be transmitted is notched, where each symbol includes sub-carriers to be modulated. In particular, in each symbol the sub-carriers corresponding to a part of the transmission band to be notched are suppressed. In addition, in each symbol a chosen part of the remaining sub-carriers to be modulated is also suppressed.

Abstract: A method for decoding tail-biting convolutional codes. The method includes initializing a correction depth, selecting a first starting state from a set of encoding states, and initializing a metric value for the selected starting state as zero and the other states as infinity. The input bit stream is read and a Search Depth Viterbi algorithm (SDVA) is performed to determine path metrics and identify a minimum-metric path. The ending state for the minimum-metric path is determined and the output for this ending state is identified as “previous output.” A second starting state is set to the ending state of the minimum-metric path, and symbols equal to the correction depth from the previous output are read. The SDVA is performed on the second set of read symbols to generate a corrected output. A decoded output is generated by replacing symbols at the beginning of the previous output with the corrected output.

Abstract: A memory device may include a memory plane including a group of memory cells configured to store a block of bits including data bits and parity bits, and a detector for detecting a fault injection including a reader to read each bit, and a first checker to perform, when reading a block, a parity check based on the read value of each data and parity bit. The memory plane may include reference memory cells arranged between some of the memory cells to create packets of m memory cells. Each reference memory cell may store a reference bit and each packet of m memory cells may store m bits of the associated block, when m is greater than 1, with different parities. The detector may further include a second checker to perform, when reading the block, a check on the value of each reference bit.

Abstract: A method for evaluating the current coupling factor between an electromagnetic transponder and a terminal, wherein a ratio between data representative of a voltage across an oscillating circuit of the transponder and obtained for two pairs of inductive and capacitive values of this oscillating circuit is compared with one or several thresholds, the two pairs of values preserving a tuning of the oscillating circuit to a same frequency.

Abstract: A system and method is capable of performing a Low Density Parity Check (LDPC) coding operation on-the-fly without using a generator matrix. The system and method includes an input configured to receive data and an output configured to output a plurality of codewords. The system and method also includes a processor coupled between the input and the output. The processor is configured to encode the received data and produce the plurality of codewords using a plurality of parity bits. The processor creates the plurality of parity bits on-the-fly using a portion of an LDPC matrix and a protograph matrix.

Abstract: Systems and methods are for implementing a NSV2SV converter that converts a non-scalable video signal to a scalable video signal. In an implementation, a non-scalable video signal encoded in H.264/AVC standard is decoded and segmented into spatial data and motion data. The spatial data is resized into a desired resolution by down-sampling the spatial data. The motion data is also resized in every layer, except in the top layer, of a scalable video coding (SVC) encoder by using an appropriate measure. Further, the motion data is refined based on the resized spatial data in every layer of the SVC encoder. The refined motion data and the down-sampled spatial data are then transformed and entropy encoded in the SVC standard in every layer. The SVC encoded output from every layer is multiplexed to produce a scalable video signal.

Abstract: Systems and methods are disclosed herein for a motion detection system for video signal processing that includes a luminance motion detector, a chroma motion detector, and a smoothness detector. These systems and methods may also include a phase motion detector, a baseband YC separation circuitry for video signal processing, a chip for video signal processing, and a video signal processing system used in an electronic article.