Abstract: A frequency divider having a plurality of programmable latches connected in a feedback shift register configuration. A programmable latch of said plurality of latches comprises a program input to receive a program signal configured to select a polarity of the programmable latch among two opposite polarities. The frequency divider having a configuration module structured to provide at least the program signal to the program input to modify a divisor parameter of the frequency divider.

Abstract: A processing system includes a plurality of processing resources capable of executing a plurality of objects. The objects include a client object and one or more server objects. The client object is capable of requesting a service provided by at least one of the one or more server objects. The processing system also includes at least one hardware engine capable of receiving a request for the service from the processing resource executing the client object, formatting one or more messages associated with the requested service, and communicating the one or more messages to the processing resource executing at least one of the one or more server objects that provides the requested service.

Abstract: An analog-digital converter for converting an analog signal into a digital signal includes a first configuration register for configuring a first group of channels and a second configuration register for configuring a second group of channels. The conversion result of the channels of the first group is transferred to a memory via a direct memory access. Each channel of the second group of channels has an associated respective data register and the conversion results of the channels of the second group are stored in the respective data registers.

Abstract: A microelectronic device is provided with at least one transistor or triode with Fowler-Nordheim tunneling current modulation, and supported on a substrate. The triode or the transistor includes at least one first block forming a cathode and at least one second block forming an anode. The first block and the second block are supported on the substrate, and are separated from each other by a channel insulating zone also supported on the substrate. A gate dielectric zone is supported on at least the channel insulating zone, and a gate is supported on the gate dielectric zone.

Abstract: A method manufactures a vertical power MOS transistor on a semiconductor substrate comprising a first superficial semiconductor layer of a first conductivity type, comprising: forming trench regions in the first semiconductor layer, filling in said trench regions with a second semiconductor layer of a second conductivity type, to form semiconductor portions of the second conductivity type contained in the first semiconductor layer, carrying out an ion implantation of a first dopant type in the semiconductor portions for forming respective implanted body regions of said second conductivity type, carrying out an ion implantation of a second dopant type in one of the implanted body regions for forming an implanted source region of the first conductivity type inside one of the body regions, carrying out an activation thermal process of the first and second dopant types with low thermal budget suitable to complete said formation of the body and source regions.

Abstract: A half bridge switching dc-dc converter an input dc voltage to an output dc voltage. The converter includes a switching circuit for receiving the input dc voltage and generating a periodic square wave voltage oscillating from a high value corresponding to the input dc voltage to a low value corresponding to a reference voltage. The periodic square wave voltage oscillates at a main frequency with a main duty cycle equal to about 50% when the converter operates in a steady state. The converter further includes a conversion circuit for providing the output dc voltage from the square wave voltage based on the main frequency and on the main duty cycle. The converter still further comprises a switching control circuit controlling the switching circuit for temporarily varying the main duty cycle during at least one period of the square wave after a power on of the converter.

Abstract: The invention relates to microelectromechanical systems (MEMS), and more particularly, to MEMS switches using magnetic actuation. The MEMS switch may be actuated with no internal power consumption. The switch is formed in an integrated solid state MEMS technology. The MEMS switch is micron and/or nanoscale, very reliable and accurate. The MEMS switch can be designed into various architectures, e.g., a cantilever architecture and torsion architecture. The torsion architecture is more efficient than a cantilever architecture.

Abstract: Programs having a given instruction-set architecture are executed on a multiprocessor system comprising a plurality of processors, for example of a VLIW type, each of said processors being able to execute, at each processing cycle, a respective maximum number of instructions. The instructions are compiled as instruction words of given length executable on a first processor. At least some of the instruction words of given length are converted into modified-instruction words executable on a second processor. The operation of modifying comprises in turn at least one operation chosen in the group consisting of: splitting the instruction words into modified-instruction words; and entering no-operation instructions in the modified-instruction words.

Abstract: A current sensing circuit for a pulse width modulation (PWM) application may include first and second input terminals to be coupled to ends of a sensing resistance, an output terminal, and first and second internal circuit nodes. The current sensing circuit further may include an input block comprising a first transconductance amplifier to be coupled to a supply voltage. The first transconductance amplifier may be coupled to the first and second input terminals and to the first and second internal circuit nodes. The current sensing circuit may also include an amplifier block comprising an amplifier to be coupled to a reference voltage, and coupled to the first and second internal circuit nodes and the output terminal, and a feedback block comprising a second transconductance amplifier to be coupled to the supply voltage and being coupled to the output terminal and the first and second internal circuit nodes.

Abstract: A system comprises a memory storing data at addresses associated with pixels in images, each address being linked by a function to coordinates of a pixel in an ordered image reference frame, a device for processing the data associated with the pixels, where a pixel being processed is referenced by an associated vector relative to a reference pixel, and an interface device providing data to the processing device. A data request indicates a vector associated with a pixel being processed. The coordinates of the reference pixel are determined by applying the function to an address associated with the reference pixel. Next the coordinates of the pixel being processed are obtained based on the coordinates of the reference pixel and on the vector. Then the address of the data associated with the pixel being processed is determined by applying the inverse function of the function to the coordinates of the pixel being processed.

Abstract: An embodiment of a discharge circuit comprises an output circuit with one output connected to an electrical load to absorb a discharge current given by the load when a logic signal commands a discharge of the load. The discharge circuit also comprises a control circuit to give the output circuit an appropriate control signal so that a slope of an output potential of the output circuit diminishes gradually when the logic signal commands a discharge of the load. Limiting the slope of the output potential gradually (and not suddenly) may limit the electromagnetic radiation generated by these variations.

Abstract: A method for carrying out nucleic acid amplification, includes providing a reaction chamber (31), accommodating an array (36) of nucleic acid probes (37) at respective locations, for hybridizing to respective target nucleic acids; and introducing a solution (50) into the reaction chamber (31), wherein the solution (50) contains primers, capable of binding to target nucleic acids, nucleotides, nucleic acid extending enzymes and a sample including nucleic acids. The a structure of the nucleic acid probes (37) and of the primers so that a hybridization temperature (TH) of the probes (37) is higher than an annealing temperature (TA) of the primers, whereby hybridization and annealing take place in respective separate temperature ranges (RH, RA).

Abstract: The device may include a contactless element and a set of least two auxiliary elements. Each auxiliary element may include a slave SWP interface connected to a same master SWP interface of the contactless element through a SWP link, and a management module configured for activating at once only one slave SWP interface on the SWP link.

Abstract: A low profile chip scale module and method of making of the same. The low profile chip scale module includes embedded SMD and integrated EM shielding. An adhesive layer is arranged on a substrate, e.g., chip carrier. Dies and SMDs are arranged on the adhesive layer. An etched frame and molding is attached to the substrate. Inputs/outputs (I/O) are formed and the substrate is coated with a dielectric material. Metal lines and connections among bond pads are formed and another layer of dielectric material is applied as a protective layer. The substrate is cut into various predetermined sizes and a lens is attached to form the chip scale module.

Abstract: A transmission line formed in a device including a stack of first and second chips having their front surfaces facing each other and wherein a layer of a filling material separates the front surface of the first chip from the front surface of the second chip, this line including: a conductive strip formed on the front surface side of the first chip in at least one metallization level of the first chip; and a ground plane made of a conductive material formed in at least one metallization level of the second chip.

Abstract: A method of protecting a circuit from attacks aiming to discover secret data used during the execution of a cryptographic calculation by the circuit, by, executing a transformation calculation implementing a bijective transformation function, receiving as input a secret data, and supplying a transformed data, executing a cryptographic calculation receiving as input a data to process and the transformed data, and executing an inverse transformation calculation receiving as input the result of the cryptographic calculation, and supplying a result that the cryptographic calculation would have supplied if it had been applied to the data to process and directly to the secret data, the data to process belong to a stream of a multiplicity of data, the transformed data being supplied as input to the cryptographic calculation for all the data of the stream.

Abstract: A method of power recovery by an electromagnetic transponder in the field of a terminal, wherein: a ratio of the current coupling factor of the transponder with the terminal to an optimum coupling position with a resistive load value is evaluated; and a detuning of the oscillating circuit is caused if the ratio is greater than a first threshold greater than or equal to one.

Abstract: Systems and methods are disclosed that include reading passive engine status, detecting vibration, caused by the transfer of kinetic energy from at least one machine into the engine, and inhibiting active operation of the engine.

Abstract: The integrated circuit comprises an analog block and a digital block in and/or on the same substrate. At least part of a first integrated-circuit portion (BA2) corresponding to the analog block is produced in a native technology and a second integrated-circuit portion (BN2) corresponding to said digital block, is produced in a shrunk technological version associated with said native technology.

Abstract: An optical device includes at least one optical die (4) that is embedded, at least peripherally, in a plate made of an encapsulation material so that the optical die may transmit light, from one side of the plate to the other. An electronic package is formed by a semiconductor device which includes at least one optical, integrated-circuit chip with the optical device placed so that the optical die lies above optical integrated circuits formed in or on the integrated circuit chip. The optical device is attached onto the semiconductor device.