Abstract: A method of analog to digital voltage conversion including: generating a quadratic signal based on an analog time varying reference signal; generating a ramp signal based on the quadratic signal; and converting an analog input voltage to a digital output value based on a time duration determined by a comparison of the analog input voltage with the ramp signal.

Abstract: A method may denoise a digital video signal produced by a photoelectric sensor as a matrix of pixel signals affected by both thermal noise and impulsive noise. The method may include estimating the noise level associated to the pixel signals, and filtering the pixel signals with an attenuation factor that is a function of the estimated noise level.

Abstract: A low pin interface module is provided for testing an integrated circuit. The interface module includes an input-output module, a controlling module, a processing module and a storage module specific to the integrated circuit to be tested. The interface module reduces the required number of hardware pins in the integrated circuit for a standalone testing without limiting the integrated circuit testing features. A methodology and a control mechanism achieved with the interface module can be used for the standalone testing of any integrated circuit without using a Joint European Test Action Group test logic interface JTAG implemented following the IEEE Standard 1149.1-1990. The interface module is not limited by a particular debugging platform and allows access to all test features in the integrated circuit with a reduced number of hardware pins and thereby leading to enhanced testing speeds on a tester in parallel and a shorter time-to-a market cycle and a lower development cost.

Abstract: A method for transmitting data between a first and a second point comprises the steps of transmitting data, from the first to the second point, together with a signature comprising bits of a first authentication code, and transmitting an acknowledgement, from the second to the first point. The length of the first authentication code is greater than the length of the signature and the first authentication code comprises hidden authentication bits. The acknowledgement is produced by using hidden authentication bits of a second authentication code presumed to be identical to the first, produced at the second point.

Abstract: An electronic circuit including: a first branch, placed between two terminals of application of a D.C. voltage, including a series connection of a first constant current source, of a first diode-connected N-channel MOS transistor, of a first diode-connected P-channel MOS transistor, and of a second constant current source; a second branch, parallel to the first branch, comprising a series connection of a second N-channel MOS transistor connected as a current mirror on the first N-channel MOS transistor and of a second P-channel MOS transistor connected as a current mirror on the first P-channel transistor; and an input terminal connected between the first N-channel and P-channel transistors and an output terminal connected between the second N-channel and P-channel transistors.

Abstract: A control system for a phase generator including a delay block including delay units, and first and second multiplexers configured to receive output signals of each of the delay units and to respectively supply first and second output signals. The control system may include a controller configured to drive the first multiplexer and the second multiplexer respectively with a first select signal and a second select signal, a detection module configured to detect a phase difference between the first output signal and the second output signal and to generate a corresponding digital phase shift signal, the detection module including a phase comparator, and a Time-Digital converter circuit coupled thereto and having logic elements configured to generate the digital phase shift signal, and a logic circuit connected to the detection module and configured to process the digital phase shift signal and to generate a signal indicative of a control executed.

Abstract: A digital radio frequency (RF) modulator provides modulation for base-band TV signals. The RF modulator provides direct conversion of digital base-band audio and video signals to a desired RF channel frequency, without any analog up conversion. The RF modulator includes an audio module, a video module, and a RF converter. The audio module includes a pre-emphasis filter, a multi-stage audio interpolator and a complex frequency modulator to generate frequency modulated (FM) audio signals. The video module includes a complex VSB filter, a group-delay compensation filter and some processing logic to generate a filtered output video signal. The RF converter includes a complex adder, a complex multiplier and a RF interpolator to construct the base band TV signals and to shift the base band TV signals in a frequency domain to the desired RF channel frequency. The exponential video carrier is generated at baseband and has a frequency whose value is in the range of +/?13.5 MHz.

Abstract: A method for manufacturing an integrated electronic device. The method includes providing an SOI substrate having a semiconductor substrate, an insulating layer on the semiconductor substrate, and a semiconductor starting layer on the insulating layer; epitaxially growing the starting layer to obtain a semiconductor active layer on the insulating layer for integrating components of the device, and forming at least one contact trench extending from an exposed surface of the starting layer to the semiconductor substrate before the step of epitaxially growing the starting layer, wherein each contact trench clears a corresponding portion of the starting layer, of the insulating layer and of the semiconductor substrate, the epitaxial growing being further applied to the cleared portions thereby at least partially filling the at least one contact trench with semiconductor material.

Abstract: A harmonic rejection mixer for carrying out a frequency translation of a mixer input signal having a mixer input frequency, the mixer including an up-conversion mixer for generating an intermediate signal by multiplying the mixer input signal with a first local oscillation signal having a first local oscillation frequency, and a down-conversion mixer for generating a mixer output signal by multiplying the intermediate signal with a second local oscillation signal having a second local oscillation frequency. The first local oscillation frequency and the second local oscillation frequency are greater than the mixer input frequency. The first local oscillation signal is an l-time oversampled sine wave and the second local oscillation signal is an m-time oversampled sine wave.

Abstract: A processor system having a processor core configured to control an external apparatus in accordance with a control algorithm; a signal acquisition managing device configured to receive state signals provided by the apparatus, perform corresponding actions, and generate corresponding synchronized command signals; and a peripheral module structured to receive the synchronized command signals and generate output signals to be processed by the processor core in accordance with the control algorithm.

Abstract: A radiation detector of the ?E-E type is proposed.

Abstract: An embodiment of a process for forming an interface between a silicon carbide (SiC) layer and a silicon oxide (SiO2) layer of a structure designed to conduct current is disclosed. A first epitaxial layer having a first doping level is homo-epitaxially grown on a substrate. The homo-epitaxial growth is preceded by growing, on the first epitaxial layer, a second epitaxial layer having a second doping level higher than the first doping level. Finally, the second epitaxial layer is oxidized so as to be totally removed. Thereby, a silicon oxide layer of high quality is formed, and the interface between the second epitaxial layer and silicon oxide has a low trap density.

Abstract: An integrated circuit having a photosensitive cell with an entry face, a photosensitive element and at least two elements forming a light guide and placed between the entry face and the photosensitive element. The second element is located between the first element and the entry face such that the two elements guide the light coming from the entry face onto the photosensitive element and each element forms a light guide. The inner volume has a first surface located on the same side as the photosensitive element, a second surface located on the same side as the entry face, and a lateral surface joining said first surface to said second surface and separating the inner volume from the outer volume. The first surface of the inner volume of the second element has a smaller area than that of the second surface of the inner volume of the first element.

Abstract: An integrated circuit includes a number of pads. The integrated circuit further includes a cascode transistor having an open drain connection to a first one of the pads. A bias generator circuit is included in the integrated circuit. The bias generator circuit has an output connected to a gate terminal of the cascode transistor. In a first mode of operation, the bias generator outputs a bias signal that is derived from an integrated circuit supply voltage present at a second one of the pads. However, in a second mode of operation provided when the integrated circuit supply voltage is not present, the bias generator generates the bias signal derived from a voltage present at the first one of the pads.

Abstract: A method for producing a device including at least one integrated circuit and at least one N/MEMS. The method produces the N/MEMS in at least one upper layer arranged at least above a first section of a substrate, produces the integrated circuit in a second section of the substrate and/or in a semiconductor layer arranged at least above the second section of the substrate, and further produces a cover encapsulating the N/MEMS from at least one layer used for production of a gate in the integrated circuit and/or for producing at least one electrical contact of the integrated circuit.

Abstract: A back EMF signal from PWM driven motor is passed through an attenuation circuit. The attenuation circuit has a first mode of operation and a second mode of operation. The first mode of operation, used to sample a higher voltage back EMF signal during PWM on-time, applies the back EMF signal to a resistive divider formed of a first resistor and second resistor connected in series. The second mode of operation, used to sample a lower voltage back EMF signal during PWM off-time, applies the back EMF signal to a circuit comprised of a transistor conduction path in series with the second resistor. A control signal, responsive PWM on-time and off-time state, controls switching between the first and second modes.

Abstract: A data protection device for an interconnect network on chip (NoC) includes a header encoder that receives input requests for generating network packets. The encoder routes the input requests to a destination address. An access control unit controls and allows access to the destination address. The access control unit uses a memory to store access rules for controlling access to the network as a function of the destination address and of a source of the input request.

Abstract: An accelerated black frame is inserted into an output vertical blanking period, keeping the output VBI at the same length or shorter than the input VBI. The output VBI is not extended. Input video data is received at a frame memory at a first transmission rate during an input active frame period. The video data is transmitted from the frame memory to a display at a second transmission rate during an output active frame period. The second transmission rate is faster than the first rate, which would normally lead to an extended output VBI. The transmitting (pouring in of data into the frame buffer) ends at the same time as all the data has been received at the monitor (drained). A black data frame which consists of meaningless data is inserted into the output VBI such that the output VBI is not longer than the input VBI.

Abstract: Device for transmitting/receiving frequency modulated type radar waves that includes: a circuit for generating radar waves which includes a voltage-controlled oscillator coupled to a circulator which is itself connected to a transmit/receive antenna; a detection circuit including a first mixer which is fed by the circulator and the voltage-controlled oscillator, wherein voltage-controlled oscillator incluing an input for injecting a signal generated by an additional circuit, the additional circuit having its input fed by the output signal of voltage-controlled oscillator and including a second mixer which is fed by two signals generated on the basis of the output signal of voltage-controlled oscillator.

Abstract: A secure memory includes a bistable memory cell having a programmed start-up state, and means for flipping the state of the cell in response to a flip signal. The memory may include a clock for generating the flip signal with a period, for example, smaller than the acquisition time of an emission microscope.