Abstract: A semiconductor device type of field effect transistor (FET) primarily made of nitride semiconductor materials is disclosed. The FET includes a nitride semiconductor stack providing primary and auxiliary active regions and an inactive region surrounding the active regions; electrodes of a source, a drain, and a gate; an insulating film covering the electrodes and the semiconductor stack; and a field plate on the insulating film. A feature of the FET of the invention is that the field plate is electrically in contact with the auxiliary active region through the opening provided in the insulating film.

Abstract: A method of manufacturing a semiconductor device includes: forming a metal film containing Al on a surface of a substrate product including a substrate and a nitride semiconductor layer on the substrate, the metal film covering a via hole forming predetermined region, and the surface of the substrate product being located on the nitride semiconductor layer side, forming an etching mask having an opening for exposing the via hole forming predetermined region on a back surface of the substrate product, the back surface of the substrate product being located on the substrate side, and forming a via hole in the substrate product by reactive ion etching, the via hole reaching the surface from the back surface and exposing the metal film. In the forming of the via hole, a reaction gas containing fluorine is used during a period at least including a termination of etching.

Abstract: Disclosed is an optical semiconductor device including a semiconductor laser chip, an insulation substrate, a ground pattern, a mounted pattern, a resistor and an extension ground pattern. The insulation substrate has a surface mounting the semiconductor laser chip thereon. The ground pattern and the mounted pattern are provided on the surface. The mounted pattern has an opposite side opposite to the ground pattern. The resistor is disposed such that a side edge of the resistor separates from an extension region of the opposite side. The extension ground pattern is positioned in the extension region of the opposite side and is electrically connected to the ground pattern. The capacitor is disposed on the mounted pattern.

Abstract: A light emitting module including a semiconductor light emitting element, a first lens, a second lens, and an optical fiber stub, is disclosed. The first lens collimates light output from the semiconductor light emitting element. The second lens is a meniscus lens and condenses the collimated light to the optical fiber stub. A light entering surface of the second lens has a cross-sectional shape in which an increase rate of a curvature radius is zero or more. A light exiting surface of the second lens includes a first region and a second region. The first region has a cross-sectional shape in which a sign of the increase rate of the curvature radius is positive. The second region surrounds the first region and has a cross-sectional shape in which a sign of the increase rate of the curvature radius is negative.

Abstract: A photodiode (PD) device that monolithically integrates a PD element with a waveguide element is disclosed. The PD device includes a conducting layer with a first region and a second region next to the first region, where the PD element exists in the first region, while, the waveguide element exists in the second region and optically couples with the PD element. The waveguide element includes a core layer and a cladding layer on the conducting layer, which forms an optical confinement structure. The PD element includes an absorption layer on the conducting layer and a p-type cladding layer on the absorption layer, which form another optical confinement structure. The absorption layer has a length at least 12 ?m measured from the interface against the core layer.

Abstract: Disclosed is a semiconductor device including a semiconductor die, a base member, a side wall, first and second conductive films, and first and second conductive leads. The base member has a conductive main surface including a region that mounts the semiconductor die. The side wall surrounds the region and is made of a dielectric. The side wall includes first and second portions. The first and second conductive films are provided on the first and second portions, respectively and are electrically connected to the semiconductor die. The first and second conductive leads are conductively bonded to the first and second conductive films, respectively. At least one of the first and second portions includes a recess on its back surface facing the base member, and the recess defines a gap between the at least one of the first and second portions below the corresponding conductive film and the base member.

Abstract: A 2nd signal line has impedance lower than impedance of a 1st signal line. A capacitor includes a 1st extension part and a 2nd extension part, a 1st ground part and a 2nd ground part. The 1st extension part and the 2nd extension part are connected to a 2nd signal line and are on an insulation substrate to extend along a longitudinal direction of the 2nd signal line. The 1st ground part and the 2nd ground part are at least a part of a ground pattern, and are between the 1st extension part and the 2nd extension part and the 2nd signal line, and between the 1st extension part and the 2nd extension part and an end part of the insulation substrate, to be electrically coupled with the 1st extension part and the 2nd extension part.

Abstract: A semiconductor device includes a substrate, an active region and an inactive region surrounding the active region, a gate electrode, a drain electrode and a source electrode on the active region, a drain interconnection including a drain finger and a drain bar, and a source interconnection including a source finger and a source bar. The source bar is located on an opposite side of the drain bar across the active region in a first direction. The source electrode includes a first side facing the drain bar in the first direction and a first depression in a middle of the first side. A first depth of the first depression in the first direction is equal or more than a first interval between the drain bar and the first side in the first direction.

Abstract: A semiconductor device including a base, a buffer member, a frame, a lid, and a semiconductor element, is disclosed. The ceramic frame is mounted on the copper base with the molybdenum buffer member interposed therebetween. The semiconductor element is sealed in a space within the frame defined by the lid. The frame includes a top portion, a lower stage portion that is disposed below the top portion and is provided with an input electrode and an output electrode, and an upper stage portion. The upper stage portion is formed in an arrangement direction of the input electrode and the output electrode, and is formed below the top portion and above the lower stage portion. The upper stage portion includes an upper stage connection portion formed on the periphery of the lower stage portion in a direction intersecting the arrangement direction of the input electrode and the output electrode.

Abstract: A semiconductor amplifier 1 includes transistors 21a and 21b mounted side by side on a bottom plate 2 in a space in a package 6, a matching circuit 22a mounted between the transistors 21a, 21b on the bottom plate 2, a matching circuit 22b mounted on an opposite side of the transistor 21b from the transistor 21a on the bottom plate 2, an input terminal TIN installed on one side of a wiring substrate 3, an output terminal TOUT installed on the other side of the wiring substrate 3, and gate bias terminals T1G and T2G and drain bias terminals T1D and T2D installed at positions with the input terminal TIN and the output terminal TOUT of the wiring substrate 3, and the transistor 21a, the matching circuit 22a, the transistor 21b, and the matching circuit 22b are linearly placed between the input terminal TIN and the output terminal TOUT.

Abstract: A process of forming a field effect transistor (FET) of a type of high electron mobility transistor (HEMT) reducing damages caused in a semiconductor layer is disclosed. The process carries out steps of: (a) depositing an insulating film on a semiconductor stack; (b) depositing a conductive film on the insulating film; (c) forming an opening in the conductive film and the insulating film by a dry-etching using ions of reactive gas to expose a surface of the semiconductor stack; and (d) forming a gate electrode to be in contact with the surface of the semiconductor stack through the opening, the gate electrode filling the opening in the conductive film and the insulating film.

Abstract: A variable attenuator is an attenuator which is formed by coupling two transmission lines having an electrical length of ?/4 corresponding to a wavelength ? of an input signal, has one end of one transmission line as an input terminal, has the other end of the one transmission line as a through terminal, has one end of the other transmission line as a coupling terminal and has the other end of the other transmission line as an output terminal, wherein the variable attenuator has a resistor pair having the same impedance at both the through terminal and the coupling terminal, and has a resistor pair having the same impedance at both the input terminal and the output terminal.

Abstract: A semiconductor device includes a metal base, a semiconductor chip provided on the metal base, and a frame work located on the metal base and having a metal pattern of an input pattern, an output pattern, and a bias pad. The bias pad and the input pattern or the output pattern are electrically connected by a conductor located on the frame work. The conductor has a characteristic of isolation at a frequency around an input signal or an output signal of the semiconductor device.

Abstract: A method for inspecting a surface of a wafer, includes steps of: irradiating a surface of the wafer with a laser beam having three or more distinct wavelengths; detecting a reflected light from the surface of the wafer when the surface of the wafer is irradiated with the laser beam; and determining whether a foreign matter exists on the surface of the wafer based on reflectances of the surface of the wafer with respect to the laser beam having the three or more distinct wavelengths, wherein the step of determining whether the foreign matter exists includes a step of determining whether the foreign matter is a metal or a non-metal.

Abstract: A consecutive Doherty amplifier is disclosed. The Doherty amplifier includes a carrier amplifier, a power splitter, a peak amplifier, and a phase compensator. The carrier amplifier receives a radio frequency signal with interposing any signal splitters. The power splitter splits an output of the carrier amplifier into first and second split signals. The phase compensator transfers the second split signal to the peak amplifier. The first split signal is combined with the output of the peak amplifier.

Abstract: An optical semiconductor device comprises a semiconductor substrate, an optical 90-degree hybrid circuit provided on the substrate, a plurality of input optical waveguides provided on the substrate, and a plurality of output optical waveguides provided on the substrate. The plurality of input optical waveguides is optically coupled to input ends of the optical 90-degree hybrid circuit. The plurality of output optical waveguides is optically coupled to output ends of the optical 90-degree hybrid circuit. Each of the plurality of input optical waveguides includes a first curving portion and a first straight portion adjacent to the first curving portion, and each of the plurality of output optical waveguides includes a second curving portion. A central axis of the first curving portion is inwardly offset with respect to a central axis of the first straight portion, and a central axis of the second curving portion follows a raised sine curve.

Abstract: A high electron mobility transistor (HEMT) made of primarily nitride semiconductor materials is disclosed. The HEMT, which is a type of reverse HEMT, includes, on a C-polar surface of a SiC substrate, a barrier layer and a channel layer each having N-polar surfaces in respective top surfaces thereof. The HEMT further includes an intermediate layer highly doped with impurities and a Schottky barrier layer on the channel layer. The Schottky barrier layer and a portion of the intermediate layer are removed in portions beneath non-rectifying electrodes but a gate electrode is provided on the Schottky barrier layer.

Abstract: A process of forming a nucleus fanning layer in a nitride semiconductor epitaxial substrate is disclosed. The process includes steps of growing: a lower layer of the nucleus forming layer on a substrate; an upper layer of the nucleus thrilling layer on the lower layer; and a nitride semiconductor layer each by the metal organic chemical vapor deposition (MOCVD) technique. The growth of the nitride semiconductor layer is done at a temperature lower than a growth temperature for the upper layer, and the growth of the upper layer is done by supplying ammonia (NH3) at a flow rate greater than the flow rate of ammonia (NH3) timing the growth of the lower layer.

Abstract: An amplifier module that implements two or more amplifying units connected in series is disclosed. The amplifier module includes a package, input and output terminals, two or more amplifying units including the first unit and the final unit, an output bias terminal for supplying an output bias to one of amplifying units except for the final unit, and an input bias terminal for supplying an input bias to another one of the amplifying units except for the first unit. A feature of the amplifier module is that the output bias terminal and the input bias terminal are disposed in axial symmetry with respect to a reference axis connecting the input terminal with the output terminal in one side of the package.

Abstract: A semiconductor device type of field effect transistor (FET) primarily made of nitride semiconductor materials is disclosed. The FET includes a nitride semiconductor stack providing primary and auxiliary active regions and an inactive region surrounding the active regions; electrodes of a source, a drain, and a gate; an insulating film covering the electrodes and the semiconductor stack; and a field plate on the insulating film. A feature of the FET of the invention is that the field plate is electrically in contact with the auxiliary active region through the opening provided in the insulating film.