Patents Assigned to Sumitomo Electric Industries, Ltd.
  • Patent number: 10405424
    Abstract: A driver circuit includes: a multilayer board; a differential amplifier; inductor elements; power supply electrodes; and transmission lines, one of which includes a first connection portion electrically connected to one of the power supply electrodes through one of the inductor elements, and another of which includes a second connection portion electrically connected to another of the power supply electrodes through another of the inductor elements, one end of the one transmission line being electrically connected to one output terminal, one end of the other transmission line being electrically connected to another output terminal. The multilayer board includes a first recessed portion between the first connection portion and the second connection portion, a second recessed portion between the first connection portion and the one of the power supply electrodes, and a third recessed portion between the second connection portion and the another of the power supply electrodes.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: September 3, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Taizo Tatsumi
  • Patent number: 10399888
    Abstract: The invention provides a production method for a glass particulate deposit M which includes a deposition step where a starting rod 111 and a burner 222 for production of glass particles 130 are installed in a reactor 102, a glass source material is introduced into the burner 222, the glass source material is subjected to flame thermal decomposition in the flame formed by the burner 222 to thereby form glass particles 130, and the formed glass particles 130 are deposited on the starting rod 111 to produce a glass particulate deposit M. In the deposition step of the production method, at least two ejecting ports 231 are provided per one burner 222 for ejecting the glass source material from the burner 222, and a flow rate of the glass source material jetting out through one glass source material ejecting port 231 is from 4 m/s to 60 m/s.
    Type: Grant
    Filed: December 11, 2014
    Date of Patent: September 3, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Tomohiro Ishihara, Takashi Yamazaki
  • Patent number: 10404267
    Abstract: Provided is a transmission system including: a signal processing apparatus 2 configured to transmit, via a signal cable 4, a delta-sigma modulated signal obtained by performing delta-sigma modulation on a transmission signal that is an RF signal; and a wireless apparatus 3 configured to transmit, via the signal cable 4, a reception signal that is an RF signal. The signal processing apparatus 2 transmits the delta-sigma modulated signal to the wireless apparatus 3, and the wireless apparatus 3 transmits the reception signal to the signal processing apparatus 2. In the delta-sigma modulated signal, quantization noise is suppressed at the frequency of the reception signal. The reception signal is transmitted to the signal processing apparatus 2 while the delta-sigma modulated signal is being transmitted to the wireless apparatus 3.
    Type: Grant
    Filed: April 5, 2017
    Date of Patent: September 3, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Takashi Maehata
  • Publication number: 20190267152
    Abstract: An aluminum alloy wire composed of an aluminum alloy, wherein the aluminum alloy contains more than or equal to 0.03 mass % and less than or equal to 1.5 mass % of Mg, more than or equal to 0.02 mass % and less than or equal to 2.0 mass % of Si, and a remainder of Al and an inevitable impurity, Mg/Si being more than or equal to 0.5 and less than or equal to 3.5 in mass ratio, and the aluminum alloy wire has a dynamic friction coefficient of less than or equal to 0.8.
    Type: Application
    Filed: August 28, 2017
    Publication date: August 29, 2019
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD.
    Inventors: Misato Kusakari, Tetsuya Kuwabara, Yoshihiro Nakai, Taichiro Nishikawa, Yasuyuki Otsuka, Hayato Ooi
  • Publication number: 20190267412
    Abstract: A semiconductor integrated optical device includes: a supporting base including semi-insulating semiconductor; a first photoelectric convertor having first photodiode mesas; a second photoelectric convertor having second photodiode mesas; a first 90° optical hybrid having at least one first multimode waveguide mesa; a second 90° optical hybrid having at least one second multimode waveguide mesa; an optical divider mesa; first and second input waveguide mesas coupling the first and second 90° optical hybrids with the optical divider mesa, respectively; a conductive semiconductor region disposed on the supporting base, the conductive semiconductor region mounting the first photodiode mesas, the second photodiode mesas, the first multimode waveguide mesas, the second multimode waveguide mesas, and the optical divider mesa; a first island semiconductor mesa extending between the first and second multimode waveguide mesas; and a first groove extending through the first island semiconductor mesa and the conductive
    Type: Application
    Filed: February 22, 2019
    Publication date: August 29, 2019
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventors: Hideki Yagi, Naoko Konishi, Koji Ebihara, Takuya Okimoto
  • Publication number: 20190264348
    Abstract: In a gallium arsenide crystal body, an etching pit density of the gallium arsenide crystal body is more than or equal to 10 cm?2 and less than or equal to 10000 cm?2, and an oxygen concentration of the gallium arsenide crystal body is less than 7.0×1015 atoms·cm?3. In a gallium arsenide crystal substrate, an etching pit density of the gallium arsenide crystal substrate is more than or equal to 10 cm?2 and less than or equal to 10000 cm?2, and an oxygen concentration of the gallium arsenide crystal substrate is less than 7.0×1015 atoms·cm?3.
    Type: Application
    Filed: July 4, 2017
    Publication date: August 29, 2019
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Hiroshi FUKUNAGA, Katsushi AKITA, Yukio ISHIKAWA
  • Publication number: 20190267151
    Abstract: An aluminum alloy wire is composed of an aluminum alloy. The aluminum alloy contains equal to or more than 0.005 mass % and equal to or less than 2.2 mass % of Fe, and a remainder of Al and an inevitable impurity. In a transverse section of the aluminum alloy wire, a surface-layer crystallization measurement region in a shape of a rectangle having a short side length of 50 ?m and a long side length of 75 ?m is defined within a surface layer region extending from a surface of the aluminum alloy wire by 50 ?m in a depth direction, and an average area of crystallized materials in the surface-layer crystallization measurement region is equal to or more than 0.05 ?m2 and equal to or less than 3 ?m2.
    Type: Application
    Filed: August 28, 2017
    Publication date: August 29, 2019
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., AUTONETWORKS TECHNOLOGIES, LTD., SUMITOMO WIRING SYSTEMS, LTD.
    Inventors: Misato KUSAKARI, Tetsuya KUWABARA, Yoshihiro NAKAI, Taichiro NISHIKAWA, Yasuyuki OTSUKA, Hayato OOI
  • Patent number: 10396372
    Abstract: An electrolytic solution circulation type battery includes a tank which stores an electrolyte to be circulated to a battery cell, and a pressure adjustment mechanism configured to adjust the pressure of a gas phase portion in the tank. The pressure adjustment mechanism includes a pressure adjustment bag which is provided outside the tank and expands or contracts in response to changes in pressure of the gas phase portion in the tank.
    Type: Grant
    Filed: July 3, 2015
    Date of Patent: August 27, 2019
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Atsuo Ikeuchi, Takahiro Kumamoto
  • Patent number: 10392724
    Abstract: A process of forming an epitaxial wafer is disclosed. The process includes steps of (a) growing an aluminum nitride (AlN) layer at a first temperature and a first flow rate of ammonia (NH3); and (b) growing a gallium nitride (GaN) layer on the AlN layer. The step (b) includes a first period and a second period. At least one of a temperature from the first temperature to a second temperature that is lower than the first temperature and a flow rate of NH3 from the first flow rate to a second flow rate different from the first flow rate is carried out during the first period. The second period grows the GaN layer at the second temperature and the second flow rate of NH3.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: August 27, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Keiichi Yui
  • Patent number: 10396222
    Abstract: An infrared light-receiving device includes an optical absorption layer disposed on a principal surface of a substrate and an optical filter disposed on the optical absorption layer, the optical filter including first, second, and third semiconductor regions that are arranged in that order in a direction from the optical absorption layer to the optical filter, each of the first, second, and third semiconductor regions including an n-type InGaAs layer. The optical absorption layer includes a type-II superlattice structure. The first semiconductor region contains an n-type impurity with a concentration of 2.0×1019 cm?3 or more. The third semiconductor region contains an n-type impurity with a concentration of 3.0×1018 cm?3 or less and 8.0×1017 cm?3 or more. The second semiconductor region contains an n-type impurity with a concentration between the impurity concentration of the first semiconductor region and the impurity concentration of the third semiconductor region.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: August 27, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Sundararajan Balasekaran, Hiroshi Inada
  • Patent number: 10396719
    Abstract: A circuit device includes a differential circuit including differential input terminals; a differential amplifier circuit in which differential input nodes are connected to the differential input terminals; a first power supply terminal supplied with a first voltage; a second power supply terminal supplied with a second voltage; a common terminal; a first resistive element of which one end is connected to one differential input terminal and another end is connected to the common terminal; a second resistive element of which one end is connected to the first supply terminal and another end is connected to the common terminal; a third resistive element of which one end is connected to one differential input terminal and another end is connected to the second supply terminal; a bonding wire, and a capacitor of which one end is connected to the second supply terminal and another end is connected to the common terminal.
    Type: Grant
    Filed: May 24, 2018
    Date of Patent: August 27, 2019
    Assignee: Sumitomo Electric Industries, LTD
    Inventors: Naoki Itabashi, Taizo Tatsumi
  • Patent number: 10395924
    Abstract: A semiconductor stack includes a substrate made of silicon carbide, and an epi layer disposed on the substrate and made of silicon carbide. An epi principal surface, which is a principal surface opposite to the substrate, of the epi layer is a carbon surface having an off angle of 4° or smaller relative to a c-plane. In the epi principal surface, a plurality of first recessed portions having a rectangular circumferential shape in a planar view is famed. Density of a second recessed portion that is formed in the first recessed portions and is a recessed portion deeper than the first recessed portions is lower than or equal to 10 cm?2 in the epi principal surface.
    Type: Grant
    Filed: August 10, 2016
    Date of Patent: August 27, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Taro Nishiguchi, Yu Saitoh, Hirofumi Yamamoto
  • Patent number: 10396163
    Abstract: A silicon carbide epitaxial substrate includes a silicon carbide single crystal substrate and a silicon carbide layer. The silicon carbide single crystal substrate has a first main surface. The silicon carbide layer is on the first main surface. The silicon carbide layer includes a second main surface opposite to a surface thereof in contact with the silicon carbide single crystal substrate. The second main surface has a maximum diameter of more than or equal to 100 mm. The second main surface includes an outer peripheral region which is within 3 mm from an outer edge of the second main surface, and a central region surrounded by the outer peripheral region. The central region has a haze of less than or equal to 75 ppm.
    Type: Grant
    Filed: August 4, 2016
    Date of Patent: August 27, 2019
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Wada, Hironori Itoh, Takemi Terao, Kenji Kanbara, Taro Nishiguchi
  • Publication number: 20190256109
    Abstract: A control apparatus including: a unit configured to communicate with on-vehicle control devices via a communication line; a storage unit configured to store therein a reference table that defines whether each of the on-vehicle control devices is a permitted or unpermitted device; a monitoring unit configured to monitor whether there is a user operation that instructs start of an engine; and a determination unit configured to determine whether to permit start of the engine according to user operation, on the basis of the reference table and a state of update of a control program in the on-vehicle control device when user operation is detected. The permitted device is an on-vehicle control device for which start of the engine during update of the control program is permitted, and the unpermitted device is an on-vehicle control device for which start of the engine during update of the control program is not permitted.
    Type: Application
    Filed: April 13, 2018
    Publication date: August 22, 2019
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Tatsuya Izumi
  • Publication number: 20190259508
    Abstract: A connector terminal wire contains 0.1% by mass or more and 1.5% by mass or less of Fe, 0.02% by mass or more and 0.7% by mass or less of P, and 0% by mass or more and 0.7% by mass or less, in total, of at least one of Sn and Mg, with the balance being Cu and impurities.
    Type: Application
    Filed: September 12, 2017
    Publication date: August 22, 2019
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC TOYAMA CO., LTD.
    Inventors: Akiko Inoue, Kei Sakamoto, Tetsuya Kuwabara, Taichiro Nishikawa, Kiyotaka Utsunomiya, Minoru Nakamoto, Yusuke Oshima, Yoshihiro Nakai, Kazuhiro Nanjo, Hitoshi Tsuchida, Dai Kamogawa
  • Publication number: 20190259843
    Abstract: A semiconductor device and a process of forming the semiconductor device are disclosed. The semiconductor device type of a high electron mobility transistor (HEMT) has double SiN films on a semiconductor layer, where the first SiN film is formed by the lower pressure chemical vapor deposition (LPCVD) technique, while, the second SiN film is deposited by the plasma assisted CVD (p-CVD) technique. Moreover, the gate electrode has an arrangement of double metals, one of which contains nickel (Ni) as a Schottky metal, while the other is free from Ni and covers the former metal. A feature of the invention is that the first metal is in contact with the semiconductor layer but apart from the second SiN film.
    Type: Application
    Filed: February 19, 2019
    Publication date: August 22, 2019
    Applicants: SUMITOMO ELECTRIC INDUSTRIES, LTD., SUMITOMO ELECTRIC DEVICE INNOVATIONS, INC.
    Inventors: Kenta SUGAWARA, Yukinori NOSE
  • Publication number: 20190257002
    Abstract: A GaAs substrate has a first surface. The sum of the number of particles having a longer diameter of more than or equal to 0.16 ?m which are present in the first surface, per cm2 of the first surface, and the number of damages having a longer diameter of more than or equal to 0.16 ?m which are present in a second surface, per cm2 of the second surface, is less than or equal to 2.1, the second surface being formed by etching the first surface by 0.5 ?m in a depth direction.
    Type: Application
    Filed: May 26, 2017
    Publication date: August 22, 2019
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Shinya FUJIWARA, Yasuaki HIGUCHI
  • Publication number: 20190259512
    Abstract: A superconducting wire includes a main body portion, a substrate, and a cover portion. The main body portion includes a first main surface and a second main surface located opposite to the first main surface, and includes a superconducting material portion. The substrate supports the second main surface of the main body portion. The cover portion is formed at least on the first main surface of the main body portion. In the cover portion, surface roughness in a central portion in a width direction of the superconducting wire is smaller than surface roughness at an end portion in the width direction.
    Type: Application
    Filed: October 31, 2016
    Publication date: August 22, 2019
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Tatsuoki NAGAISHI, Takashi YAMAGUCHI
  • Publication number: 20190254569
    Abstract: A movement ability evaluating apparatus includes a communication unit and a control unit. The communication unit is configured to acquire front-back acceleration, right-left acceleration, and up-down acceleration during movement of a subject measured by an acceleration sensor attached to the waist of the subject. The control unit is configured to evaluate the movement ability of the subject, based on temporal change of the front-back acceleration, the right-left acceleration, and the up-down acceleration acquired by the communication unit. The movement ability of the subject includes at least one of front-back balance, right-left balance, and weight shift during movement of the subject.
    Type: Application
    Filed: June 2, 2017
    Publication date: August 22, 2019
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Yusuke ASADA, Hideaki TOSHIOKA
  • Publication number: 20190259891
    Abstract: An infrared light receiving device includes: a structure having a supporting base and a laminate body, the laminate body including a first superlattice layer, a second superlattice layer and a semiconductor region, the first superlattice layer, the second superlattice layer and the semiconductor region being arranged sequentially on the supporting base, and the laminate body having an array of semiconductor mesas for photodiodes and a recess defining the array of semiconductor mesas; and a first electrode connected to the first superlattice layer. The first superlattice layer has an n-type conductivity. The semiconductor region has a p-type conductivity. The first superlattice layer has a type-II superlattice structure and forming a heterojunction with the supporting base. The recess has first and second recess portions. The second recess portion has a bottom in the first superlattice layer. The first recess portion has a depth larger than that of the second recess portion.
    Type: Application
    Filed: February 14, 2019
    Publication date: August 22, 2019
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Daisuke Kimura, Sundararajan BALASEKARAN