Abstract: A method for binning and layout of an integrated circuit design which includes providing a table setting forth predefined widths of signal wires and corresponding spacing to shield wires, characterizing effects on timing, noise, and power distribution based on predefined widths and spacing combinations as functions of the length of the signal wire, and laying out the integrated circuit design based upon the predefined widths of signal wires and corresponding spacing to shield wires. The shield wires are adjacent and on both sides of the routed signal wire.

Abstract: The invention is related to methods and apparatus that provide a graphical-user-interface-based tool using drag and drop functionality to manipulate descriptions of the interface between two dissimilar API functions. A graphical-user-interface-based tool advantageously permits a user to draw lines between the parameter nodes of the two APIs to indicate the translation of data elements from a first form in which the nodes exist in one API to a second form in a different API. The graphical-user-interface-based tool also depicts the flow of information into a set of API call input parameters, and the flow of information resulting from that API call into another set of nodes. In one embodiment, API functions and parameters are represented as nodes within an object hierarchy, providing a convenient relationship between the nodes, and variables and methods written in an object oriented programming language.

Abstract: Converting document formatted for use on servers to and from documents formatted for use on small devices, including synchronizing two or more versions of the document. A user may edit documents formatted for use on small devices and the documents may be synchronized with documents on the server to keep the documents up to date. In one embodiment, an n-way merge process may restore document formatting, styles and/or data features that may have been lost from one or more documents when converting from an office format to a small device format. In one embodiment, the server may provide an office productivity environment, and the documents on the server may be office documents.

Abstract: In a networked computer system that includes clusters, each cluster is provided with a resource database and an agent that scans the systems in that cluster and collects storage resource details along with capacity information from the multiple systems that are members of that cluster. During the scanning process, this information is checked for completeness and integrity and stored in the resource database. Depending on the scan context, individual resources may be marked for reporting. The information in the database is then used to report consistent scan results back to the management or scanner software.

Abstract: A compile server and a class loader are disclosed. During execution of a program, the class loader transmits a compile service request and a run time service request, including a program instruction, over a network to a compile server. The class loader receives native machine code compiled from the instruction, where the native machine code is received over the network. Once received, the native machine code is executed. The compile server receives the compile service request and the run time service request, including the program instruction, over a network from the class loader, compiles the instruction into native machine code, and transmits the native machine code over the network to be executed. The compile server generates a compile thread for each compile service requests and processes multiple compile threads concurrently.

Abstract: A code generator utilizes a “generated_source” directory to store corresponding machine-generated software code. A “modified_source” directory stores user-written modifications associated with software generated by the code generator. During code generation, the code generator checks the modified_source directory for a class presently being generated by the code generator. If there are no user modifications (stored in the modified_source directory) associated with the class being processed, the code generator creates an implementation of the class. If the modified_source directory contains an implementation of the class being processed, the code generator creates an implementation of a base class for the class being processed. The base class is created in the generated_source directory, preserving the class created by the user.

Abstract: A garbage collector treats a garbage-collected heap as divided into heap regions, for each of which it maintains a respective remembered set, whose entries list the locations where references located in the heap outside that region refer to references inside that region. The remembered sets are used during space-incremental collection operations on collection sets of those regions; if the garbage collector determines that objects in the collection set are not referred to directly or indirectly from outside the collection set, it reclaims the memory space that they occupy. It places entries into the remembered sets independently of the locations at which the references were found, so any region can be chosen for inclusion in any collection set; no predetermined collection order is required. Instead, the garbage collector performs global marking operations and uses the results to select for collection-set membership the regions that it can most likely collect efficiently.

Abstract: The present application describes a method and a processor for handling register dependency conflicts between lesser and greater width instructions, colloquially referred to as “evil twins.” If there is a register dependency between a greater width producer instruction and a lesser width consumer instruction, a greater width source register is substituted for the source register specified by the lesser width producer. If there is a register dependency between a lesser width producer instruction and a greater width producer instruction, the greater width consumer instruction is replaced by multiple helper instructions. One or more of the helper instructions merge lesser width registers aliased onto the source registers specified by the greater width consumer instruction, into temporary registers. Another helper instruction executes the greater width consumer instruction using the temporary registers instead of the original source registers.

Abstract: A directory server system may include master servers and a non-master server, each server storing directory server data that includes updates, each update having a creation time. The master servers exchange replicate updates through update communications. Each master server may include an update state builder for maintaining local update state items including an estimate time indication related to update communications received by the local master server about the directory server data stored by the designated master server. A master server may also include an upper time builder for evaluating an upper time value that is the earliest one of the estimate time indications in the local update state items. A master server may also include a master-to-non-master replicate function, for sending to the non-master server the updates in the local directory server data which have an associated creation time no later than the upper time value.

Abstract: Techniques have been developed whereby information objects referenced in a requested information object (e.g., image, audio, video, application, and/or text objects referenced in an HTML document) are embedded in a composite object and supplied in as literal data therein in response to an object identifier (e.g., an URL request). Referenced information objects may be retrieved from cache or obtained from authoritative information servers and dynamically embedded in a composite information object. In some realizations, composite objects with embedded references are retrieved from cache. In some realizations, individual information objects (including those referenced) are cached and a composite object is dynamically prepared. In some realizations, though not all realizations, the caching techniques are employed in a proxy server implementation.

Abstract: A system for improving a memory's error detecting and error correcting capabilities. During operation, the system receives a data-word. Next, the system compresses the data-word into a compressed-word. If the amount of compression is greater than or equal to a compression-threshold, the system applies a strong error-correcting-code to the compressed-word to generate a coded-word. On the other hand, if the amount of compression is less than the compression-threshold, the system applies a weak error-correcting-code to the data-word to generate a coded-word. In either case the size of the coded-word is less than or equal to the size of a storage-word. The system then generates a flag that indicates the type of error-correcting code that was used to generate the coded-word. The system then stores the flag along with the coded-word in the memory.

Abstract: One embodiment of the present invention provides a system that facilitates performing a fast address lookup within a packet forwarder to determine where to forward a packet. Upon receiving the packet at an input link of the packet forwarder, the system reads a destination address from the packet. The system uses this destination address to lookup a corresponding entry in a forwarding table that is organized as a multi-bit trie. If the corresponding entry does not identify the output link for the packet, the system backtracks through the multi-bit trie to locate an entry with a prefix that matches the destination address and that identifies the output link for the packet. Finally, the system forwards the packet to the identified output link.

Abstract: Dual ported Input/Output (“I/O”) routers couple I/O devices to a cross-coupled switching fabric providing multiple levels of data path redundancy. Each I/O router possesses two or more internal ports allowing each I/O router to access multiple switches in a cross-coupled switching fabric. The additional redundant paths between each I/O device and each microprocessor complex provide additional means to balance data traffic and thereby maximize bandwidth utilization. I/O routers can be interleaved with single HBAs establishing access a switching fabric that uses cross-coupled nontransparent ports thus providing each I/O device with multiple paths upon which to pass data. Data paths are identified by a recursive address scheme that uniquely identifies each data path option available to each I/O device.

Abstract: A plurality of PCIe switch complexes are interposed between a plurality of I/O devices and a plurality of microprocessor complexes. Each PCIe switching complex comprises a plurality of PCIe switches wherein each switch possesses at least one non-transparent port. The non-transparent port is used to cross-couple each PCIe switch creating an active matrix of paths between the HBAs associated with each I/O device and each microprocessor. The paths between each HBA (I/O device) and each microprocessor are mapped using a recursive algorithm providing each I/O device with direct memory access to each microprocessor.

Abstract: Data buffering allocation in a microprocessor complex for a request of memory allocation is supported through a remote buffer batch allocation protocol. The separation of control and data placement allows simultaneous maximization of microprocessor complex load sharing, and minimization of inter-processor signaling/metadata migration. Separating processing control from data placement allows the location of data buffering to be chosen so as to maximize bus bandwidth utilization and achieve non-blocking switch behavior. This separation reduces the need for inter-processor communication and associated interrupts thus improving computation efficiency and performance.

Abstract: A system and method of processing multiple swap requests including receiving a first swap request in a pipeline and executing the first swap request. A second swap request is also received in the pipeline immediately following the first swap request. The first swap request and the second swap request are examined to determine if the first swap request and the second swap request swap a same register.

Abstract: A system, method, computer program product, and user interface for tracking multiple exchange rates for transactions in a financial software application. Historical exchange rates are applied to transactions involving currency conversions, and accurate reports are generated by retrieving appropriate historical rates according to the dates of the transactions. Exchange rates are stored by associating them with individual transactions or with date ranges. Generated reports accurately reflect historical exchange rate information where applicable.

Abstract: Methods and systems consistent with the present invention provide a Supernet, a private network constructed out of components from a public-network infrastructure. Supernet nodes can be located on virtually any device in the public network (e.g., the Internet), and both their communication and utilization of resources occur in a secure manner. As a result, the users of a Supernet benefit from their network infrastructure being maintained for them as part of the public-network infrastructure, while the level of security they receive is similar to that of a private network. The Supernet has an access control component and a key management component which are decoupled. The access control component implements an access control policy that determines which users are authorized to use the network, and the key management component implements the network's key management policies, which indicate when keys are generated and what encryption algorithm is used.

Abstract: A method for transferring data in a storage system is provided. The method includes setting a catch-up threshold for accepting data requests from a port where the queue value corresponds to a number of requests collected from an input queue for every CPU interrupt, and the input queue receives requests from the port and stores the requests to be collected by a CPU. The method also includes adjusting the catch-up threshold to reduce an imbalance between the number of requests made to the input queue and a number of requests made to an output queue in a particular period of time where the output queue receives requests from the CPU and stores the requests to be gathered by the port.

Abstract: A system for building and managing a modular application includes multiple libraries. Each one of the libraries includes at least one functional module. The build system also includes a selector capable of selecting a functional module from the libraries. A compiler for compiling the selected functional module is also included.