Abstract: The system for preventing unnecessary message duplication in electronic mail forms a message digest of each message received. The message digest is then compared with stored message digests from previous messages to determine if there is a match. If there is a match, this means that the first and second messages are the same, and so the second message is discarded. If, on the other hand, there is no match, then the second message processed because it is assumed that it is a message that is a non-redundant message. The list of stored message digests is culled based on some predetermined criteria to ensure that it does not grow indefinitely.

Abstract: A method and apparatus are disclosed for testing the accuracy of digital test images by comparing the value of each test image pixel with the average value of a corresponding reference image pixel array. The local image quantification verification test program accepts absolute differences between corresponding pixel and array values that are less than a specified difference maximum. The user may specify a difference maximum and a maximum array size, and may restrict the test image comparison to specified regions of the test image with specific difference tolerances for each region. This allows the user to focus the comparison on certain regions as more important than others and to focus a region on a particular object or group of objects.

Abstract: In a communication system, a delayed call dialing processing system and method are described. The delayed call dialing processing system includes logic that allows a caller wishing to call a callee to delegate the task of monitoring presence information to detect when the callee is present to accept the call. The delayed call dialing process system further allows the caller to delegate the task of monitoring the delayed call and then makes the delegated task visible to the caller to enable the caller to either reschedule the delayed call or cancel the delayed call after the call has been queued for delay dialing. When presence information indicates that the caller and the callee are available, the calls are put through and bridged.

Abstract: A memory system using low impedance memory bitlines that eliminate the need for a precharge clock signal. An equilibration circuit controlled by a reference voltage is connected to the first and second bitlines of a memory cell and is operable to maintain a predetermined equilibrium condition between the first and second bit lines. The equilibration circuit is operable to generate an impedance load in the first and second bit lines at a level that allows generation of differential signals in the bit lines. The memory cell bitlines can move from a sensed state “low” to the opposite state “high” without an intervening precharge, thereby providing a significant increase in performance.

Abstract: An enterprise application may be constructed or reconstructed according to a system and method for designing or redesigning enterprise applications. The design or redesign process may include identification of the application type, in addition to representation of the application type as a decomposition of software components. The design or redesign may focus on reviewing code level component design and utilization. The code level design or redesign may include an analysis of each component within each use case within each tier based on patterns, frameworks, and/or refactoring. The application design or redesign may yield recommendations for code creation or code improvements. The recommendations may include specific application enhancements. The recommendations may include specific code design to be incorporated during construction or reconstruction. The recommendations may include results for guiding the design or redesign phase for an application.

Abstract: A system for use by a computer to determine which network addresses are being used by other computers or other devices in a network includes an address inquiry message packet generator module configured to enable the computer to transmit address inquiry message packets over a network in one or more iterations. Each address inquiry message packet includes a network address. The address inquiry message packet generator module is configured to enable the computer to transmit address inquiry message packets for a selected number of network addresses during each iteration. An iteration control module is configured to control the timing of successive iterations of transmission of address inquiry message packets by the computer in relation to reception by the computer of response message packets responding to the address inquiry message packets.

Abstract: One embodiment of the present invention provides a system that validates sensor operability in a computer system. During operation, the system perturbs the computer system with an excitation, wherein the excitation may be physical or software-based. The system then receives a number of responses to the excitation through sensors in the computer system, wherein each response is represented as a value of a variable which may vary with time. Next, the system compares the received responses with a set of reference responses gathered from properly functioning sensors in a reference computer system. The system then determines from the comparison whether the sensors in the computer system are operating properly.

Abstract: The present invention provides methods and apparatus for a computer network system to provide compact and efficient representations of graphics commands on drawing/displaying lines, circles, etc. The methods and apparatus exploit the redundancies and/or relations of the information in drawing/displaying lines, circles, etc. and allow for fewer bytes and faster transmission rate (e.g., more graphics primitives per second) to a client tier (e.g., to a thin client appliance and/or a display on the desktop appliance). For example, one embodiment of the present invention uses commands that take advantage of the structure of spans created by drawing commands to send a base fill command, followed by fills whose locations and size are expressed as deltas with respect to each previous fill in the list. The deltas may comprise a difference between two commands, a difference between a command and another difference, a difference between two differences, and/or a plurality of differences.

Abstract: A system and method for implementing any one of multiple communication protocols with a single device driver. During initialization (e.g., after being attached to network interface device), a device driver receives a call (e.g., an ioctl) identifying a protocol to be implemented (e.g., PPP or SRP). The device driver configures device soft state structures for each network interface device with protocol-specific attributes (e.g., MTU size, references to protocol-specific packet handling functions). In response to an upper level protocol request (e.g., DL_INFO_REQ), the device driver dynamically assembles protocol-specific data to answer the request.

Abstract: One embodiment of the present invention provides a system that provides skew compensation for communications across a source-synchronous self-timed network. During each clock period, the system allows multiple synchronous transmitters to each transmit one data element and to assert one acknowledgement on a transmit clock line into the self-timed network. In doing so, the multiple synchronous transmitters do not wait for requests from the self-timed network before transmitting a subsequent data element. Similarly, during each clock period, the system allows multiple synchronous receivers to accept one data element from and to assert one request on a receive clock line coupled into the self-timed network. In doing so, the multiple synchronous receivers do not wait for acknowledgments from the self-timed network before receiving a subsequent data element. The self-timed network is configured to tolerate bounded skew between the multiple synchronous transmitters and multiple synchronous receivers.

Abstract: A processor avoids or eliminates repetitive replay conditions and frequent instruction resteering through various techniques including resteering the fetch after the branch instruction retires, and delaying branch resolution. A processor resolves conditional branches and avoids repetitive resteering by delaying branch resolution. The processor has an instruction pipeline with inserted delay in branch condition and replay control pathways. For example, an instruction sequence that includes a load instruction followed by a subtract instruction then a conditional branch, delays branch resolution to allow time for analysis to determine whether the condition branch has resolved correctly. Eliminating incorrect branch resolutions prevents flushing of correctly predicted branches.

Abstract: A method for evaluating a logic state of a design node involves compiling a logic design to generate an annotated symbol table and a levelized design, obtaining a logic evaluation cost from the levelized design, locating a strategic node using the logic evaluation cost, marking the strategic node, and computing the logic state of the design node using the annotated symbol table, the strategic node, and the levelized design.

Abstract: A system and method for distributing a portion of the processing of a received packet among a plurality of service threads. When an ISR or similar process retrieves a packet from a communication interface via a receive descriptor ring, it places the packet on one of a plurality of service queues. Each queue has an associated service thread or process that initiates upper layer protocol processing for queued packets. The ISR may select a particular service queue based on the packet's communication flow or connection. Alternatively, the ISR may use a processor identifier provided by the communication interface to select a queue (e.g., in a multi-processor computer system). Or, other information provided by the interface may be used.

Abstract: A computer system, method and software for detecting and purging stale entries from remembered sets associated with incrementally collectible regions used in an incremental garbage collection technique like the Trains algorithm is described. Stale entries are detected by a number of techniques, and then purged, eliminated, or scrubbed. These techniques make use of the summarized information about regions such as cards or incrementally collectible regions that indicate age of allocation, time a region was last scanned, last time an entry was inserted into a remembered set, as well as how far forward or backward objects in a given region refer in a generation.

Abstract: Disclosed are methods and apparatus for managing resources. In general terms, a resource manager manages resource consumption of several resource entities which are each capable of consuming resources. The resource manager tracks the availability of such resources and determines whether a resource is critically short or reaches a particular usage level. When a resource becomes critically short or reaches a particular usage level, the resource manager selects one or more resource entities based on one or more criteria. For example, a resource entity which has the least restrictive resource usage policy or state is selected. The resource manager then requests that the selected resource entity changes its resource usage state to a more restrictive state. Of course, when resource usage reaches an acceptable level, the resource manager may also inform each resource entity (or previously selected resource entities) that they may set their resource consumption state to a less restrictive state.

Abstract: A garbage collector for more efficient placement of objects referenced from external references. The expected life times of these objects is measured by trial and error, by the class or type, by how often the object has been evacuated or the external reference processed, by the stability and longevity of the root source, or by the prolificness of the class or type of object. The measured value is held in the header of each object in an AGE field available for this purpose. These objects may be evacuated into existing trains or into new trains, or into a combination of existing and new trains. When new trains are created the trains are distributed among the existing trains according to a distribution contour that may be linear, normal, gamma or any other contour that might be found useful. Also, when new trains are created the youngest train must be a new train.

Abstract: In order to synchronize two dissimilar video formats, two or more phase locked loop circuits (PLL's) may be used in tandem. A first PLL circuit may be connected to the first video format (Master) and generate an intermediate frequency. A second PLL circuit may use the intermediate frequency as the timebase for generating the pixel clock for the second video format (Slave). One or more Slaves may be connected to the generated pixel clock. The video synchronizing device may be a part of a graphics system, such as a graphics accelerator.

Abstract: A system for monitoring HTTP transactions between a server and a client, including a data collector which runs on the server and collects data from HTTP requests sent by the client to the server and data from HTTP responses sent by the server to the client, a debugging controller which controls an execution mode of the server, a graphical display which displays the collected data and through which replay requests are sent to the server, each replay request specifying a prior HTTP request to be interpreted by the server, a request player which runs on the server and modifies each replay request with a portion of the collected data associated with the prior HTTP request to be interpreted by the server.

Abstract: A graphics system and method for increasing efficiency of decompressing blocks of compressed geometry data and reducing redundant transformation and lighting calculations is disclosed. Multiple decompression pipelines are used to increases the decompression speed. A control unit receives blocks of compressed geometry data information and selectively routes them to a plurality of decompression pipelines. Each decompression pipeline is configured to decompress the blocks into a set of vertices. The reduction in redundant calculations is accomplished by delaying the formation of geometric primitives until after transformation and lighting has been performed on the vertices. Transformation and/or lighting are performed independently on a vertex-by-vertex basis without reference to which geometric primitives the vertices belong to. After transformation and or lighting, geometric primitives may be formed utilizing previously generated connectivity information.

Abstract: In a distributed computing environment, a message gate may be the message endpoint for a client or service. A message gate may provide a secure message endpoint that sends and receives type-safe messages. Devices may have a gate factory (e.g. message endpoint constructor) that is trusted code on the device for generating gates based on XML message descriptions. In one embodiment, the gate factory may construct a gate from the XML schema of the service, a URI for the service, and an authentication credential. Access to some services may be unrestricted. For such services, a gate may be constructed without an authentication credential, saving the overhead of running an authentication service and incorporating an authentication credential. Gate construction may also be optimized for certain clients that do not desire to perform checking of messages against a service's XML schema. If verification is not desired, a client may avoid or may chose to avoid building (e.g.