Abstract: A mechanism for enabling customized session managers to interact with a network server is disclosed. A programming interface enables customized session managers to “plug in” to and to interact with the server, making it possible to change session management functionality without having to make any changes to the core server. It also makes it possible to incorporate multiple session managers into the server. These aspects of the programming interface significantly increase the flexibility and scalability of the web server. The mechanism further includes a service engine for coordinating the interaction with the session managers. For each client request, the service engine determines which application needs to be invoked. Then, based upon that application, the service engine determines which, if any, associated session manager needs to be invoked to manage session (i.e. state) information for that application. The service engine invokes the session manager via the programming interface.

Abstract: Techniques for using the Internet to establish an international telephone call using a callback service where there is a rate difference between the source and destination countries are disclosed. In one approach the customer sends the call information to the callback service by connecting to their website and by completing an Internet based form. Alternatively call information can be provided in an e-mail. The callback service database places the call soon after the call information is received.

Abstract: The present invention provides a representation and encapsulation of active computing environments. In accordance with one or more embodiments of the present invention a “compute capsule” is implemented. Each compute capsule serves to represent and encapsulate an active computing environment. An active computing environment comprises one or more active processes and their associated state information. The associated state information is information in a form that can be understood by any computer and tells the computer exactly what the processes in the capsule are doing at any given time. In this way, the compute capsule is a host-independent encapsulation that can be suspended on one computer, moved to a new computer, and re-started on the new computer where the new computer is binary compatible.

Abstract: A multi-chip system and method are disclosed for incorporating a primitive assembler in each of one or more geometry chips and one or more rasterization chips. This system may allow per-primitive operations to be performed in the geometry chips, and also allow use of a vertex data interface for sending vertex data to the rasterization chips. The primitive assemblers in the geometry chips may assemble vertices into primitives for clipping tests. The geometry chips may also test an assembled primitive against the projected boundaries of a set of screen space regions, where each region is assigned to one of the rasterization chips. Those primitives residing in more than one region may be sub-divided into two or more new primitives so that each new primitive resides in only one screen space region. The geometry chip may then send the vertex data for each primitive to the corresponding rasterization chip.

Abstract: A memory subsystem and a method for use in accessing a memory system are disclosed. The memory subsystem comprising a plurality of SDRAM memory modules and a memory controller. The memory controller is capable of waiting to generate a memory clock signal for each of the SDRAM memory modules until a valid window for a control signal and an address signal; generating the memory clock signals during the valid window, and generating the control and address signals. The method comprises: waiting for a valid window for a control signal and an address signal; generating a memory clock during the valid window; and generating the control signal and the command signal a predetermined period of time after generating the memory clock signal.

Abstract: A system and method for enabling failover in an application server cluster. A “primary” application server computer in the cluster may provide a service or data necessary for other application server computers in the cluster to operate. In addition to the primary application server computer, one or more of the other application server computers may be designated as “backup” application server computers. Each backup application server may backup the processing information managed by the primary application server. When the primary application server itself becomes unavailable (e.g., due to a failure of the computer system or network), one or more of the backup application servers may be promoted to the role of primary application server.

Abstract: A system and method are disclosed for utilizing a Z slope test to select polygons that may be candidates for multiple storage methods. The method may calculate the absolute Z slope from vertex data and compare the calculated value with a specified threshold value. In some embodiments, for polygons that have an absolute Z slope less than the threshold value, parameter values may be rendered for only one sample position of multiple neighboring sample positions. The parameter values rendered for the one sample position may then be stored in multiple memory locations that correspond to the multiple neighboring sample positions. In some embodiments, storing parameter values in multiple memory locations may be achieved in a single write transaction. In some embodiments, utilization of the Z slope test method may be subject to user input and in other embodiments may be a dynamic decision controlled by the graphics system.

Abstract: A method and apparatus for automated calibration of I/O over a multi-variable eye window is provided. A transmitter may conduct data transmissions to a receiver of an integrated circuit (IC) over a plurality of signal lines. The data transmissions may be conducted according to a certain parameters or sets of parameters. Parameters may include voltage levels at which signals are transmitted or timing delays. The receiver may determine whether the correct data value was received over each signal line. The results may be recorded in a storage mechanism in the same IC as the receiver. The storage mechanism may, for each signal line, store a pass/fail result corresponding to the particular parameters for the data transmission. The system may select the parameters which subsequent transmissions are to be conducted over each of the plurality of signal lines from the storage mechanism.

Abstract: One embodiment of the present invention provides a system that decouples a tag access from a corresponding data access within a cache memory. The system operates by receiving a memory request at the cache memory, wherein the memory request includes an address identifying a memory location. Next, the system performs the tag access by looking up at least one tag from a tag array within the cache memory and comparing the at least one tag with a tag portion of the address to determine if a cache line containing the address is located in the cache memory. If the cache line containing the address is located in the cache memory but a data array containing the cache line is busy, the system performs the corresponding data access at a later time when the data array becomes free. Furthermore, if the memory request is for a load operation, the corresponding data access takes place without waiting for preceding load operations to complete.

Abstract: Provided is a method, system, program, and data structure for applying a patch to a computer system, wherein the patch includes content to add to the computer. A computer object is generated to include configuration information on the determined installed components. At least one patch includes content to add to the computer and is capable of being associated with at least one realization, wherein each realization defines a state of the computer. For each realization, a determination is made from the configuration information in the computer object as to whether the state defined by the realization exists in the computer. Data is written to the computer object indicating whether the state defined by the realization exists on the computer. The computer object is used to determine whether each patch is compatible with the installed components of the computer.

Abstract: A scheme is provided that permits the use of a selectable depacketization module to depacketize data streams. An RTP session manager is responsible for receiving RTP packets from a network and parsing/processing them. A depacketizer module is located using the type of data received on the stream. Thus a specific depacketizer is located at runtime depending on the coding decoding scheme (“codec”) used to compress the incoming data stream. A naming convention is followed in order for a specific depacketizer to be located. The depacketizer receives data that has already been parsed and is in a readable form. The depacketizer outputs this data using a well defined interface. This interface has been designed such that it is generic across a number of codecs. The interface passes all relevant information to the decoder where the actual depacketized data stream will be decompressed. The session manager need not know of any codec details since the depacketizer handles all codec specific issues.

Abstract: A method for dynamically allocating system resources is provided. The method initiates with identifying a goal associated with a corresponding partition of a resource being configured according to a first configuration. The method includes establishing a mathematical function yielding a value associated with the goal. Once a violation of the goal is detected due to a changing workload, alternative configurations are evaluated to meet the goal under the changing workload. Then, a highest ranked one of the alternative configurations is selected and substituted for the first configuration.

Abstract: A virtual heap for a process executing within a virtual machine is described. In one embodiment, the virtual persistent heap may allow the running of an application on a physical heap that is smaller than may otherwise be required. As an example, the virtual persistent heap may be an order of magnitude larger than the physical, in-memory heap. This feature is important for small consumer and appliance devices, as these devices may have a limited amount of memory. In one embodiment, the virtual heap may be maintained on non-volatile memory storage external to the device running the virtual machine, and portions of the heap for the current execution state of the process may be cached in and out of a “physical” heap resident in local memory on the device. For example, the device may connect to a server on the Internet, and the server may provide non-volatile storage space for the virtual heap.

Abstract: A graphics system comprises pixel calculation units and a sample buffer which stores a two-dimensional field of samples. Each pixel calculation unit selects positions in the two-dimensional field at which pixel values (e.g. red, green, blue) are computed. The pixel computation positions are selected to compensate for image distortions introduced by a display device and/or display surface. Non-uniformities in a viewer's perceived intensity distribution from a display surface (e.g. hot spots, overlap brightness) are corrected by appropriately scaling pixel values prior to transmission to display devices. Two or more sets of pixel calculation units driving two or more display devices adjust their respective pixel computation centers to align the edges of two or more displayed images. Physical barriers prevent light spillage at the interface between any two of the display images. Separate pixel computation positions may be used for distinct colors to compensate for color distortions.

Abstract: A system and method are disclosed for a rasterization pipeline with a parallel initialization path that may provide an increased rate of triangle processing. The edge walker, span walker, and sample generator modules of a rasterization pipeline may be modified to enable the next primitive in the sequence of primitives to be initialized, while the current primitive is processed. Consequently, these two processes that were done in series may now be done in parallel. Data transmitted between modules may be separated into initialization data (data the module needs to define a primitive) and primitive data (the processed output of each module). The second path is for additional initialization data, which allows each of these modules to receive the initialization data for the next primitive, while processing the primitive data for the current primitive.

Abstract: A system and method provides dynamic and static type support for multiple definitions of individual types in a distributed object environment. Fully scoped object names incorporating prefixes are used to distinguish objects. The fully scoped names are used for both dynamic type determination through an interface repository and for statically compiled types in client and server stub routines. In the interface repository, a prefix naming context is provided for each root interface definition language context, allowing multiple definitions for objects with the same interface definition language object name, where each such definition resides in a separate prefix naming context. In one embodiment, the prefix naming contexts are defined by prefix interface definition objects. In another embodiment, the fully scoped object names are embedded by an interface definition language compiler in stub and skeleton code routines. RRS.

Abstract: A multi-layer network element for forwarding received packets from an input port to one or more output ports with quality of service. When output queues exceed or meet a threshold value below the queue's capacity packets are randomly discarded. When the queue becomes full, the network element determines which flow caused the queue to overflow. The priority of that flow is lowered. In a multicast packet, the packet may have different priorities at each output port. Scheduling of multiple output queues at each output port uses a weight round robin approach that allocates a weight portion of packets to transmit at each time interval. A packet is not interrupted during its transmission, even if the weight portion is met during a packet's transmission. The excess number of bytes transmited as a result of not interrupting the packet are accounted for in the next round.

Abstract: A method and apparatus for determining clock insertion delays for a microprocessor design having a grid-based clock distribution. The method includes partitioning the complete clock net into a global clock net and a plurality of local clock nets, simulating a load for each of the local clock nets, simulating the global clock net, and combining the simulations to form the complete clock net. The method may further include evaluating the combination to determine whether the results converge and storing the simulation results in a Clock Data Model. When the results do not converge, the method re-simulates at least one of the local clock nets and re-simulates the global clock net. The Clock Data Model collects, manages, retrieves, and queries all of the simulation information. The method may further analyze the complete clock net to predict the clock skew for a given data transfer path for potential redesign.

Abstract: A management subsystem and method for discovering management device functions. A management subsystem includes a system controller coupled to a plurality of devices each configured to monitor system resources and a non-volatile storage device via a first communication path. The non-volatile storage device may store a plurality of functions associated with the devices. The system controller may access the non-volatile storage device during initialization and create a function list including assigning a unique identifier to each of the functions. The system controller may transmit the function list via a second communication path in response to receiving a request for the function list. Further, the system controller may obtain system management information from one of the devices by invoking a particular one of the functions in response to receiving a request including a particular unique identifier corresponding to the particular one of the functions.

Abstract: A memory array design is provided. Memory cells are defined an intersections of rows and columns. A pair of bitline segments are defined for each column. A connecting load device of each memory cell is connected to either a first or a second of the pair of bitline segments. An equal number of load devices in each column couple to each of the pair of bitlines.