Abstract: In a programmed computer system, normal processing results generated by a called method are returned to one or more calling methods by an exception rather than by the more conventional single-type return value. The programmer is granted flexibility through the ability to use multiple normal return types while retaining strong data typing. Better programming practices are promoted through the use of a single exception-technique for handling normal results as well as abnormal (i.e. error) results. The disclosed technique can be used with existing programming languages/environments such as the Java® language, and can provide a basis for new languages/environments that are specifically tailored to this processing technique.

Abstract: A mechanism is disclosed for determining pin assignments in an integrated circuit. More particularly, the mechanism involves accessing design information for the integrated circuit. The design information includes a floorplan that sets forth an arrangement of blocks in the integrated circuit and timing information for interconnections between the blocks. Based on the timing information, routing information is determined for the interconnections between the blocks. The routing information includes physical routes and physical pin placements for the interconnections.

Abstract: Many conventional lock-free data structures exploit techniques that are possible only because state-of-the-art 64-bit processors are still running 32-bit operating systems and applications. As software catches up to hardware, “64-bit-clean” lock-free data structures, which cannot use such techniques, are needed. We present several 64-bit-clean lock-free implementations: including load-linked/store conditional variables of arbitrary size, a FIFO queue, and a freelist. In addition to being portable to 64-bit software (or more generally full-architectural-width pointer operations), our implementations also improve on existing techniques in that they are (or can be) space-adaptive and do not require a priori knowledge of the number of threads that will access them.

Abstract: In accordance with one embodiment of the present invention, a technique for supporting dynamically typed languages in typed assembly languages is provided. According to one embodiment, a new bytecode instruction, “invokedynamic,” supplements “invokevirtual.” Prior to the execution of a typed assembly language program, it is determined whether a particular method-invoking instruction is a particular kind of instruction. If the instruction is of the particular kind, then the verifier refrains from performing the usual pre-execution type checking of the arguments that will be on the operand stack when the instruction is executed. Consequently, the bytecode instruction may be used to represent the invocation of a method that might not indicate formal parameter types. Because the verifier performs less stringent type checking in response to such an instruction, the JVM can execute assembly language programs that were generated based on source code that was written in a dynamically typed language.

Abstract: One embodiment of the present invention provides a system that resamples a quantized signal. During operation, the system receives the quantized signal. Next, the system smoothes and resamples the quantized signal to produce a resampled signal. The system then quantizes the resampled signal to produce a quantized resampled signal. For a given time point, the system determines a probability distribution for the resampled signal across quantization levels at the given time point by using information about the values of the resampled signal at neighboring time points. Note that the probability distribution specifies the probability that the resampled signal would be sampled at specific quantization levels. The system then uses the probability distribution to probabilistically select a quantization level for the resampled signal for the given time point.

Abstract: A method of determining effective bandwidth includes selecting a first packet size and sending a first packet having the first packet size from a first node to a second node. A confirmation that the first packet was received in the second node is received. A transfer time of the first packet is recorded. A second packet size is selected and a second packet having the second packet size is sent from the first node to the second node. A confirmation that the second packet was received in the second node is received and a transfer time of the second packet is recorded. An effective bandwidth between the first node and the second node is calculated and the effective bandwidth can be output.

Abstract: An assembly comprising first and second electronic devices and an optical coupling device that optically couples an optical waveguide on the first electronic device to an optical waveguide on the second electronic device. In this way, optical proximity communication between the devices is possible. The electronic devices may be integrated circuit chips. The first optical waveguide is positioned relative to the optical coupling device to direct an optical signal to the optical coupling device. Further, the second optical waveguide is positioned relative to the optical coupling device to receive the optical signal, which is directed from the optical coupling device to the second optical waveguide. Thus, the optical coupling device optically couples the first optical waveguide to the second optical waveguide.

Abstract: Method and apparatus for determining data encoding format in RMI-IIOP messages. Embodiments may provide a mechanism to use Java serialization rather than, or as an alternative to, CORBA Common Data Representation (CDR), for the marshaling and unmarshaling of data in RMI-IIOP message exchanges. In one embodiment, a server-side Object Request Broker (ORB) may be configured to support the encoding of data in RMI-IIOP messages in accordance with CDR encoding and Java serialization encoding. In one embodiment, an Interoperable Object References (IOR) published by the server may include information that indicates which encoding type(s) are supported by the server-side ORB on the server that hosts the associated object. A client-side ORB may optionally use Java serialization or CDR as the data encoding format for RMI-IIOP messages to invoke the associated object on the server. Each RMI-IIOP message may include an indication of which encoding type is used in the message.

Abstract: A method for determining a maximum IR drop on a power grid of a circuit is disclosed. The method includes dividing a reference timing signal into multiple bins. Each one of the bins having a corresponding bin duration. The bins being divided by a corresponding fuzzy boundaries. Each one of the fuzzy boundaries having a corresponding boundary duration. Each one of the of bins is analyzed including selecting one of the bins, identifying a first set devices that transition to their corresponding maximum current states during the selected bin and identifying a second set of devices that transition to their corresponding maximum current states during at least one of the boundaries of the selected bin, but not within the selected bin. A maximum current demand equal to a sum of the maximum current states of the first and second plurality of devices is calculated. A system for testing a circuit is also disclosed.

Abstract: A system and method for allowing peers to exchange messages with other peers independently of their network location in a peer-to-peer environment. Messages may be transparently routed, potentially traversing partitions (e.g. firewalls and NATs), and using different protocols to reach the destination peers. In one embodiment, any peer node may serve as a relay peer that allows peers inside a partition to have a presence outside the partition and provides a mechanism for peers outside partitions to discover and communicate with peers inside the partitions. In one embodiment, a relay peer may maintain information on routes to other peers and assist in relaying messages to other peers. In one embodiment, any peer may query a relay peer for route information. In one embodiment, messages may include routing information as part of their payloads.

Abstract: Embodiments of the present invention include the steps of (i) defining a first resource containing information objects defining a set of users; (ii) discovering said information objects based on said first resource definition; (iii) associating each of said information objects with a user from said set of users and said first resource. Embodiments of the present invention can include delegation of discovery tasks to allow additional resources to be defined.

Abstract: Software-based cache coherence protocol. A processing unit may execute a memory request using a processor thread. In response to detecting a cache hit to shared or a cache miss associated with the memory request, a cache may provide both a trap signal and coherence information to the processor thread of the processing unit. After receiving the trap signal and the coherence information, the processor thread may perform a cache coherence operation for the memory request using at least the received coherence information. The processing unit may include a plurality of processor threads and a load balancer. The load balancer may receive coherence requests from one or more remote processing units and distribute the received coherence requests across the plurality of processor threads. The load balance may preferentially distribute the received coherence requests across the plurality of processor threads based on the operation state of the processor threads.

Abstract: One embodiment of the present invention provides a system that facilitates capacitive communication between integrated circuit chips. The system includes a substrate having an active face upon which active circuitry and signal pads reside, and a back face opposite the active face. The system additionally includes an integrated circuit chip having an active face upon which active circuitry and signal pads reside, and a back face opposite the active face. Additionally, the integrated circuit chip is pressed against the substrate such that the active face of the integrated circuit chip is parallel to and adjacent to the active face of the substrate, and capacitive signal pads on the active face of the integrated circuit chip overlap signal pads on the active face of the substrate. The arrangement of the substrate and integrated circuit chip facilitates communication between the integrated circuit chip and the substrate through capacitive coupling via the overlapping signal pads.

Abstract: One embodiment of the present invention provides a system that facilitates efficiently resolving symbolic references in a virtual machine to support in-place execution. During operation, the system loads an in-place executable file into the virtual machine, and receives a pointer that points to an unresolved symbol value in the in-place executable file. This unresolved symbol value includes an offset value that points to a subsequent unresolved symbol value in a chain of unresolved symbol values within the in-place executable file, and a token value that can be used to look up a corresponding resolved reference value in an unresolved symbol table. The system then uses the token value to look up the corresponding resolved reference in the unresolved symbol table, and replaces the unresolved symbol value with the corresponding resolved reference.

Abstract: One embodiment of the present invention provides a system that facilitates interleaved execution of a head thread and a speculative thread within a single processor pipeline. The system operates by executing program instructions using the head thread, and by speculatively executing program instructions in advance of the head thread using the speculative thread, wherein the head thread and the speculative thread execute concurrently through time-multiplexed interleaving in the single processor pipeline.

Abstract: The embodiments provide an arbiter in a microprocessor that can handle requests to access a shared resource from function units with different priorities without starving the access opportunities of requests from function units with low priority. In one embodiment, a microprocessor is provided. The microprocessor includes a shared resource and a plurality of requesting entities accessing the shared resource. Each of the plurality of requesting entities has a priority value and requests from the each of the plurality of requesting entities are assigned the priority value. The plurality of requesting entities are function units of the microprocessor. The microprocessor also includes a priority-encode arbiter with an adjustable ring counter disposed between the shared resource and the plurality of requesting entities to control the access requests of the plurality of requesting entities to the shared resource.

Abstract: An infrastructure element can receive a first DMA request including a first address and the data, generate a meta request that comprises a resource key value and a doorbell address, and transmit the meta request via the infrastructure using the doorbell address. A remote DMA adapter can receive the meta request at the doorbell address and generate a remote direct memory access request message using the resource key, the first address and the data from the received meta request.

Abstract: A data type encoding and compression system for a computer system is described. The encoding and compression system encodes and compresses programming language data structure and data type information for use in a kernel, system program or user application. The encoded and compressed data structure and data type information is generated using an encoding called compact type format (CTF). The data encoding and compression system includes merging logic that identifies common data structures within object files used to generate a given kernel module, system program or user application. Data structures common to a parent and a given child module are removed from the child module, during the merging process, and replaced by links from the child to the parent, thereby reducing the total size of the CTF data.

Abstract: An apparatus for cooling a computer system includes a fan for flowing an air to a first assembly and a second assembly, a first filter for filtering an air to a first assembly, and a second filter for filtering an air to a second assembly. The first filter is disposed at a side of the first assembly and the second filter is disposed on an opening of a wall which separates the first assembly and the second assembly.

Abstract: A mechanism is disclosed for determining an accelerated test for a device. The method comprises calculating an estimated amount of damage that an element of the device would suffer if the device were operated under a set of specified conditions over a certain period of time (e.g., expected lifetime of the device). The method further comprises determining an accelerated test to which to subject the element in order to cause the element to suffer an actual amount of damage that is approximately equal to the estimated amount of damage. The accelerated test may be an accelerated test cycle, such as an accelerated temperature cycle.