Patents Assigned to Sun Microsystems
  • Patent number: 6304961
    Abstract: The invention relates to a computer system and method for fetching a next instruction. In one embodiment, a computer system includes an instruction cache, a next fetch address register, and a fetch unit. The instruction cache includes an instruction array for storing a plurality of processor instructions and a next address fetch array for storing at least one next fetch address. Each next fetch address associated with at least one of the processor instructions stored in the instruction array and indicating a location of a processor instruction to be fetched. In another embodiment, an apparatus includes a first device configured to fetch a first instruction stored in an instruction cache, a second device configured to unconditionally store a next fetch address associated with the first instruction, and a third device configured to unconditionally fetch a second instruction stored at a location indicated by the stored next fetch address.
    Type: Grant
    Filed: February 14, 1997
    Date of Patent: October 16, 2001
    Assignee: Sun Microsystems, Inc.
    Inventors: Robert Yung, Kit Sang Tam, Alfred K. W. Yeung, William N. Joy
  • Patent number: 6303444
    Abstract: A method for providing low power MOS devices that include buried wells specifically designed to provide a resistive path between the bulk material of the device and a well tie contact. By providing a resistive path, an equivalent RC circuit is introduced to the device that allows the bulk material potential to track the gate potential, thereby advantageously lowering the threshold voltage as the device turns on and raising the threshold voltage as the device turns off. In addition, the introduction of the resistive path also allows the bulk material potential to be controlled and stabilize at an equilibrium potential between clock cycles.
    Type: Grant
    Filed: October 19, 2000
    Date of Patent: October 16, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: James B. Burr
  • Patent number: 6305011
    Abstract: A method and apparatus for mandating a hierarchy of TIPs (Technological Instrumental Packages), each defining an interface for handling a related data structure, such as a symbol table or a parse tree. The present invention structures a TIP into a plurality of abstract levels, which include an encapsulated concrete representation, a representation level, a definition level, and a conceptual level. The interface to a TIP consists of, for example, the conceptual level and a portion of the definition level. The concrete representation and representation level are hidden from the computer programmer. In addition, the present invention designates an interface for each level to perform creation/deletion, access, update, and output.
    Type: Grant
    Filed: January 16, 1996
    Date of Patent: October 16, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: Vladimir Olegovich Safonov
  • Patent number: 6304992
    Abstract: A data block includes a plurality of sub-blocks. Each sub-block includes a sub-block check bit that may be used to detect the presence of a bit error within the sub-block. A composite sub-block is generated, which is the column-wise exclusive-or of the bits of each sub-block. In one embodiment, the composite sub-block is not stored, but rather used for computational purposes only. A plurality of composite check bits is used to detect a bit position of a bit error within the composite sub-block. If a bit error within the data block occurs, the sub-block check bits may be used to detect in which sub-block the error occurred. The composite check bits may be used to determine which bit position of the composite sub-block is erroneous. The erroneous bit position of the composite sub-block also identifies the bit position of the erroneous bit in the sub-block identified by the sub-block check bits.
    Type: Grant
    Filed: September 24, 1998
    Date of Patent: October 16, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: Robert Cypher
  • Patent number: 6304893
    Abstract: An interprise computing manager in which an application is composed of a client (front end) program which communicates utilizing a network with a server (back end) program. The client and server programs are loosely coupled and exchange information using the network. The client program is composed of a User Interface (UI) and an object-oriented framework (Presentation Engine (PE) framework). The UI exchanges data messages with the framework. The framework is designed to handle two types of messages: (1) from the UI, and (2) from the server (back end) program via the network. The framework includes a component, the mediator which manages messages coming into and going out of the framework.
    Type: Grant
    Filed: July 1, 1996
    Date of Patent: October 16, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: Sheri L. Gish
  • Patent number: 6304098
    Abstract: Method and circuitry for improving noise immunity of differential data channels that use a shared reference channel by substantially matching their respective noise transfer functions. Any combination of various circuit parameters at the reference channel including termination resistance R, channel impedance Zo, and parasitic inductance L are scaled to substantially match the noise transfer function of the reference channel to that of the data channels.
    Type: Grant
    Filed: March 14, 2000
    Date of Patent: October 16, 2001
    Assignee: Sun Microsystems, Inc.
    Inventors: Robert J. Drost, Neil C. Wilhelm
  • Patent number: 6304125
    Abstract: A method of generating and distributing clock signals is described. The method provides synchronous clock signals in as many phases as a designer of a given circuit finds useful. The method acknowledges timing constraints of the controlled system, and adjusts the clock phases appropriately to meet the needs of the local data circuits using the clock signals. The method uses stages of clock signal generators which are coupled to appropriate portions of the datapath and to each other for controlling the datapath and to provide information about clock signal timing to each other. By adding delay elements, the method can also be used to test the design of the given circuit.
    Type: Grant
    Filed: September 4, 1998
    Date of Patent: October 16, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: Ivan E. Sutherland
  • Patent number: 6304908
    Abstract: A method for delivering a message unit to a destination network resource within a transport communications layer includes the steps of configuring a mapping to the destination network resource based upon a source address of the message unit, and sending the message unit to the destination network resource based upon the mapping.
    Type: Grant
    Filed: July 29, 1999
    Date of Patent: October 16, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: Kevin E. Kalajan
  • Publication number: 20010028365
    Abstract: A graphical user interface (GUI) is configurable in an embodiment of the invention. A user configures sliding panels located on the edges of the GUI. A sliding panel is configured with an application that runs in the sliding panel. The sliding panel is present in the GUI in either a closed or an open representation. The sliding panel's GUI representation is determined based on the position of the user's cursor. When the cursor is within a closed sliding panel's closed representation, the sliding panel is expanded to its open representation. By moving the cursor outside the sliding panel, the user can close the panel. There is no need for the user to consciously manage the elements in the GUI. The elements are managed based on the configuration information supplied by the user and the information available at runtime.
    Type: Application
    Filed: January 16, 2001
    Publication date: October 11, 2001
    Applicant: SUN MICROSYSTEMS, INC.
    Inventor: Frank Ludolph
  • Patent number: 6301615
    Abstract: A system and method for monitoring the performance of one or more computers on a network. The system and method utilize the standard output of preexisting performance monitoring utilities and filters this output to transform the data into a standardized format which may consist of key-value pairs. The reformatted data is provided to one or more clients for analysis. Separate threads are used to independently redirect the output of individual utilities to a superserver via associated sockets. The superserver uses a filter associated with a particular utility to reformat the data received from a socket corresponding to that utility. The system and method may be used to monitor varying numbers of computers and each computer may have varying numbers of preexisting utilities executed thereon.
    Type: Grant
    Filed: October 14, 1998
    Date of Patent: October 9, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: Jeffrey Kutcher
  • Patent number: 6301585
    Abstract: A method and system for incrementally serializing an object graph to a persistent form. An object graph is a set of nested objects, each with one or more properties. An object graph in a first environment is serialized to a temporary serialized form. At substantially the same time, the temporary serialized form is read into a second environment and deserialized in the second environment. By deserializing instantiation statements taken from the temporary form, a copy of the object graph is created in the second environment, wherein the objects have default values. For each object, only statements in the temporary serialized form that would alter the second environment are maintained in a final serialized form. The properties of classes are accessed through public APIs to avoid reliance on private implementations of classes. Therefore, serialized forms will typically still be deserializable even when private implementations are different across different platforms or across the same platform over time.
    Type: Grant
    Filed: March 17, 1999
    Date of Patent: October 9, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: Philip S. Milne
  • Patent number: 6301676
    Abstract: One embodiment of the present invention provides a system that supports recovery in the event a previous process holding a lock used for mutual exclusion purposes loses ownership of the lock. This loss of ownership may occur due to the previous process dying or the lock becoming unmapped. Under the present invention a process first attempts to acquire the lock. If the attempt to acquire the lock returns with an error indicating that the previous process holding the lock lost ownership of the lock, the process attempts to make program state protected by the lock consistent. If the attempt to make the program state consistent is successful, the system reinitializes and unlocks the lock. Otherwise, the system marks the lock as unrecoverable so that subsequent processes attempting to acquire the lock are notified that the lock is not recoverable.
    Type: Grant
    Filed: January 22, 1999
    Date of Patent: October 9, 2001
    Assignee: Sun Microsystems, Inc.
    Inventors: Aswini S. Kumar, Daniel A. Stein
  • Patent number: 6301594
    Abstract: A method and circuit for adjusting an exponent of an unnormalized floating-point number to generate an exponent of a normalized floating-point number. The method includes the steps of: (1) generating a shift count indicating the number of bit positions, if any, a mantissa of an unnormalized floating-point number is to be left shifted to normalize the unnormalized floating-point number, (2) generating a right shift indicator indicating the number of bit positions, if any, the mantissa is to be right shifted to normalize the unnormalized floating-point number, (3) incrementing the value of an exponent of the unnormalized floating-point number, (4) concurrently with the incrementing step, complementing a plurality of bits of the shift count and (5) adding the exponent, the shift count and the right shift indicator to generate an exponent of a normalized floating-point number. The method and circuit may be implemented in a floating-point adder.
    Type: Grant
    Filed: March 11, 1999
    Date of Patent: October 9, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: Sadar U. Ahmed
  • Patent number: 6300967
    Abstract: The present invention comprises a method for providing feedback to the user of a graphical user interface using visual and operational clues. In an embodiment of the invention, the user is provided visual clues that inform the user in what direction the display area can be scrolled. The display area may contain a list, a text box, a pop-up menu or any kind of data. Operational clues help the user determine what actions move the list and what actions do not move the list. The invention can be implemented in the form of a list. A list is comprised of one or more fields. At the top of the list and at the bottom of the list is a blank space that functions as one of the visual clues. The purpose of the blank space is to inform the user they are at the top of the list and cannot scroll any further up or that they are at the bottom of the list and cannot scroll any further down. Another form of visual clue is provided through the use of partially visible fields.
    Type: Grant
    Filed: April 25, 2000
    Date of Patent: October 9, 2001
    Assignee: Sun Microsystems, Inc.
    Inventors: Annette Wagner, Osana Tishkova, Michael Arent, Richard Berlin, Fazeel Mufti
  • Patent number: 6300677
    Abstract: An electronic assembly is described herein having a first semiconductor integrated circuit substrate with circuitry disposed thereon. This semiconductor integrated circuit substrate is coupled with a package through a first plurality of electrical connections. Sandwiched between portions of the semiconductor integrated circuit substrate and the package is an electronic assembly which is coupled to the semiconductor substrate circuitry and also the package through low resistance, low inductance connections. An electronic subassembly is described which includes a second semiconductor substrate having circuitry disposed thereon, the circuitry forming one or more of a capacitor, a charge pump, or a voltage regulator. Insulating material is disposed over the circuitry, and vias are formed therethrough. Metal bands are disposed to be continuous around the outside of the subassembly, thereby also forming a connection with the second semiconductor circuitry.
    Type: Grant
    Filed: August 31, 1999
    Date of Patent: October 9, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: Raoul B. Salem
  • Patent number: 6301624
    Abstract: A method for processing events generated by software and hardware entities installed on a computer network that avoids overload conditions at large event processing rates is provided. In one embodiment, the method includes the steps of providing a protocol translation facility that is configured to translate messages from a first network communications protocol to a second network communications protocol. The protocol translation facility is further configured to receive events transmitted by software and hardware entities on the network. The protocol translation facility forwards the events to a management information server. An event is received, and a determination is made whether an association between the protocol translation facility and the entity exists.
    Type: Grant
    Filed: December 4, 1998
    Date of Patent: October 9, 2001
    Assignee: Sun Microsystems, Inc.
    Inventors: Linda Lee, Subodh Bapat, Rajeev Angal
  • Patent number: 6300965
    Abstract: A system and method for performing visible object determination based upon a dual search of a cone hierarchy and a bounding (e.g. hull) hierarchy. Visualization software running on a host processor represents space with a hierarchy of cones constructed by recursive refinement, and generates a hierarchy of bounding hulls from a given collection of objects by recursively grouping clusters of objects. Hull nodes in the hull hierarchy reflect cluster membership. Each hull node stores parameters which characterize a bounding hull for the corresponding cluster or object. The visualization software searches the cone and hull hierarchies starting with the root cone and the root hull. Each leaf-cone is assigned a visibility distance value which represents the distance to its closest known object. The visibility distance value of a non-leaf cone is set equal to the maximum of the visibility distance values for its subcone children.
    Type: Grant
    Filed: February 9, 1999
    Date of Patent: October 9, 2001
    Assignee: Sun Microsystems, Inc.
    Inventors: Henry Sowizral, Karel Zikan
  • Patent number: 6301626
    Abstract: A system and method is provided that displays different symbols on an input device corresponding to different input device layouts. On a keyboard type input device, each key on the keyboard has an individually controllable display device which displays one or more symbols in a given symbol set. Software detects which keyboard layout should be used, downloads the keyboard layout over a network, such as the Internet, and causes the display device in each key to display the appropriate symbol or symbols. A virtual machine embedded in the keyboard provides a platform independent execution environment and simplifies the development of different types of input device layouts. This unique arrangement obviates the need for purchasing different keyboards and software to accommodate the different character sets used by different languages or different specialized software applications.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: October 9, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: Paul Keith Knox
  • Patent number: 6301680
    Abstract: A technique to detect and correct single bit errors and to detect paired bit errors in a data block. Two bits of the data block are paired and transferred on the same data path in different cycles. Check bits are computed prior to transferring the data block. A syndrome bits vector is computed when the data block is received. The syndrome bits vector includes a number of syndrome bits that is identical to the number of check bits. A value of the syndrome bits vector is used to detect and correct single bit errors and to detect paired double bit errors that occur in the data block without using an extended check bit. If the syndrome bits vector contains all zero bits, the data block is accepted without modification. If the syndrome bits vector is identical to a predetermined special vector V, a paired double bit error has occurred and either an unrecoverable error message is generated or a re-operation on the data block is requested.
    Type: Grant
    Filed: September 24, 1998
    Date of Patent: October 9, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: Robert Cypher
  • Patent number: 6298437
    Abstract: A method is provided for I/O data transfer between memory and disk. In one embodiment, an application program generates N data transfer requests. Thereafter, a data transfer list is created that comprises N entries each comprising a file sector descriptor and a buffer address. The application program is suspended in favor of initiating the operating system. Thereafter, N data transfers are performed, each one of which comprises transferring data between a file sector and a buffer identified by the file sector descriptor and a buffer address, respectively, contained in one of the entries of the data transfer list. On completion of N data transfers, the operating system is suspended and the application program is reinitiated.
    Type: Grant
    Filed: May 25, 1999
    Date of Patent: October 2, 2001
    Assignee: Sun Microsystems, Inc.
    Inventor: Robert M. Lane