Abstract: A method is provided for load balancing requests for a replicated service or application among a plurality of servers operating instances of the replicated service or application. A policy is selected for choosing a preferred server from the plurality of servers according to one or more specified status or operational characteristics of the servers, such as the least-loaded or closest server. The policy is encapsulated within multiple levels of objects or modules that are distributed among the servers offering the replicated service and a central server that receives requests for the service. Status objects gather or retrieve information concerning the specified status or operational characteristic(s) of each of the plurality of servers. An individual server monitor object operates for each instance of the replicated service to invoke one or more status objects and receive the necessary information. A central replicated monitor object receives the information from each individual server monitor object.

Abstract: A method of loading objects from primary memory includes the step of creating hash values for listed objects to create a hash index specifying a set of hash values. The hash index is loaded into primary memory to form a primary memory hashed index object directory. A calculated hash value is derived for an invoked object. The calculated hash value is matched with a hash value in the primary memory hashed index object directory. In response to this matching operation, an object corresponding to the calculated hash value is loaded into primary memory.

Abstract: An information handling system includes a plurality of transmission lines coupled together at one end through resistance elements having a particular resistance, a driver circuit coupled to one of the transmission lines, a plurality of receiver circuits individually coupled to distinct ones of the transmission lines for resolving the signals, and on-chip termination resistors having a resistance corresponding to the characteristic impedance and that can be coupled or decoupled from the output node by on-chip circuitry. In this embodiment, the termination resistors are separate and distinct from driver circuitry. However, when the node is in a receive configuration, its corresponding termination resistor is tied to the transmission line at that node, and its corresponding driver circuit presents a high impedance output to that node.

Abstract: Run time sampling techniques have been developed whereby representative object lifetime statistics may be obtained and employed to adaptively affect tenuring decisions, memory object promotion and/or storage location selection. In some realizations, object allocation functionality is dynamically varied to achieve desired behavior on an object category-by-category basis. In some realizations, phase behavior affects sampled lifetimes e.g., for objects allocated at different phases of program execution, and the dynamic facilities described herein provide phase-specific adaptation tenuring decisions, memory object promotion and/or storage location selection. In some realizations, reversal of such decisions is provided.

Abstract: Embodiments of the invention display hierarchical information efficiently. Hierarchical information is displayed in a vertical browser comprising a path list and a choices list. A choices list displays selection choices at a given hierarchical level. When a selection is made in the choices list, the selection is displayed in the path list. The choices list is updated to reflect the next hierarchical level. The path list displays a plurality of choices that represent the traversal path through the hierarchical information. Backwards traversal is possible by selecting an entry in the path list. The path list is updated to remove the selected entry and any successive entry. The hierarchical level that contains the path list entry is displayed in the choices list. The path and choices list can be independently sized and are automatically maintained to remove irrelevant information.

Abstract: In accordance with the present invention a method and system for transmitting multibyte characters in a network comprises the steps, performed by a processor, of receiving a set of fixed-length characters; converting each fixed-length character into a multibyte character to determine a length corresponding to the multibyte characters; and transmitting the length and the multibyte characters.

Abstract: The present invention provides dual in-line buffers for an instruction fetch unit. In one embodiment, an apparatus for a microprocessor includes an instruction cache unit that stores power of two size instruction cache lines, and dual in-line buffers of an instruction fetch unit connected to the instruction cache unit, in which the dual in-line buffers store power of two size instruction cache lines fetched from the instruction cache unit, and the fetched instruction cache lines include a non-power of two size instruction.

Abstract: Raw image data is separated from color image data such that image data can be operated on independent of a color model. Alternatively, image data can be associated with a color model and image processing operations can operate on the image data in terms of the color model. No color model is presupposed for a given image. When an image processing operation uses a color system, a color system can be selected in which the operation is performed and the source image will be converted. Different color systems can be associated with the same image data to process the image. Where it is not necessary to perform an image processing operation in a color system, the operation can access the image data independent of a color system. In an embodiment of the invention, a Tile object class is comprised of an array of Channel objects. A Channel object is associated with one or more storage bands of image data.

Abstract: Decoding of addresses in a register file is simplified by reducing the number of bits used for addressing by one. Bits are read from even/odd cell combinations simultaneously, and a reserved address line is driven high. The reserved address line is coupled to each driver corresponding to a storage cell. Individual even cells may also be read. Writing to even/odd cell combinations may be performed in a similar manner. However, when writing, an even write enable line and an odd write enable line are provided to indicate whether an even cell, an odd cell, or an even/odd cell combination should be written to simultaneously. By simplifying the decoding stage, performance of reading and writing tasks may be performed much faster and use less resources.

Abstract: Techniques are discussed whereby hyperlinks that exist in an on-line document can be automatically updated (re-linked) when the location of the document to which a link points changes. In one embodiment, the administrator of the on-line document is notified by E-mail when a link destination pointed to by that document has changed. Comparison of the old document content to the new content, if any, is used to facilitate a determination whether to automatically re-link or remove the appropriate hyperlink. In alternate embodiments, receiving sites or trusted third parties are authorized to update links to documents on the receiving site contained in documents on a feeding site.

Abstract: A system and method for executing platform-independent code on a co-processor is described. The system includes a processor, a main memory and the co-processor, each interconnected with each other. The processor and the co-processor operate under control of an operating system. A memory manager operatively coupled to the operating system initializes a runtime environment including an address space in the main memory for the platform-independent code. A runtime shim operatively coupled to the operating system provides the initialized runtime environment to the co-processor through the operating system. The co-processor executes the platform-independent code responsive to the runtime shim with reference to the address space in the main memory.

Abstract: A system and method for circuitry design verification testing which provides for maximized code re-use without unnecessary allocation of system resources. A circuit simulation subsystem is interfaced with a test subsystem. The test subsystem employs a system transaction class which collects convenience routines and thereby maximizes code re-use. The system transaction class contains pointers to device transaction classes which correspond to each of the functional models in the simulation subsystem, but does not require instantiation of all of the device transaction classes and associated device objects. One or more configuration transaction classes derived from the system transaction class define transactions between selected ones of the functional models within the simulation subsystem. The configuration transaction classes inherit the convenience routines of the system transaction class, but cause instantiation of the respective functional models only when needed for a transaction.

Abstract: A fiber optic cable is provided with a thermal shield which consists (proceeding outward from the cable) of a temperature insulating layer of a foam plastic such as polyethylene, a plastic film wrap such as aluminized nylon, a metallic braid such as tinned copper and an outer jacket of plastic as additional temperature insulation and to facilitate pulling the cable. The film wrap and outer jacket are optional. For further shielding a second layer of foam plastic may be positioned outside the first metallic braid followed by a second plastic film wrap, a second metallic braid and an outer plastic jacket. If the shielded cable is near a source of heat, such as a hot water pipe or an air conditioning duct, the fiber optic cable temperature is uniform throughout its cross-section. Without the thermal shield instability of the signals in different fibers may occur because of heat differential.

Abstract: Methods, systems, and software for installing and operating selected software applications on a client computer that is in communication with a server computer on a computer network are described. In one aspect of the present invention, a method for controlling the degree of access to operating system resources for a software program running on a computer that is running said operating system is provided. The degree of access to the operating system resources is defined for the software program, and at least one file including instructions for executing the software program is loaded on the computer from the server computer. The file is examined to determine the degree of system-level access available to the software program when the software program is being executed by the computer. The software program is executed, and a program instruction associated with the software program is intercepted when the software is being executed on the computer.

Abstract: In a logic circuit having PMOS pull-up devices and NMOS pull-down devices, the PMOS pull-up devices are sized relative to the NMOS pull-down devices according to the number of transistors that simultaneously turn on. In one embodiment, the PMOS transistor width is determined by multiplying the effective NMOS transistor width by a predetermined factor indicative of a current carrying ratio between one of the PMOS pull-up transistors and one of the NMOS pull-down transistors and dividing by the number of PMOS pull-up transistors that simultaneously turn on to charge the output node high. Where the PMOS pull-up devices are parallel-connected, the NMOS transistor width is divided by the number of NMOS transistors.

Abstract: The invention is a method and apparatus for navigating displayed screen elements. In accordance an embodiment of the invention, the method comprises the steps of generating a reference anchor, accepting a navigation input from a user, and determining a next displayed element to be selected based on the user-entered navigation input and the positions of the displayed elements to the reference anchor.

Abstract: Systems and methods for implementing message dispatch for an object-oriented program are provided. Receiver type information is collected at a site of a method that dispatches messages to receiver objects. The receiver type information is saved for subsequent execution of the program. By saving the receiver type information, the program may be more efficient as it is not necessary to collect the receiver type information again. Additionally, inlining information may be saved with the receiver type information.

Abstract: A management information loader is used in connection with a management information server, the management information server using management information in connection with performing least one management operation in connection with a network comprising a plurality of interconnected devices. The management information loader comprises an operator interface module, a plurality of compilers and a control module. The operator interface module enables an operator to provide a management information file identification identifying at least one management information file containing management information to be used by the management information server. Each of the compilers facilitates conversion of files containing management information from a respective format to a common format.

Abstract: A method of controlling impedance of a driver capable of launching signals at a driving end of a transmission line and capable of terminating signals at the receiver end of the transmission line controls the impedance of the driver across process, voltage, and temperature (PVT) variations by selectively enabling and disabling at least one of a plurality of output elements according to an impedance control code. The impedance control code compensates for variations in output impedance due to PVT variations.

Abstract: An integrated circuit device package is integrated with a heat dissipation member to reduce the number of junctions in a packaged integrated circuit device. For example, the integrated circuit device package may include a substrate and a thermally conductive lid coupled to a first surface of the substrate, forming a closed cavity which encloses an integrated circuit die. The thermally conductive lid may be integrated with the heat dissipation member.